mirror of https://gitee.com/openkylin/linux.git
arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
Beacon Embeddedworks is launching a development kit based on the i.MX8M Mini SoC. The kit consists of a System on Module (SOM) + baseboard. The SOM has the SoC, eMMC, and Ethernet. The baseboard has an wm8962 audio CODEC, a single USB OTG, and three USB host ports. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Adam Ford
Shawn Guo
parent
9251dad3a3
commit
593816fa2f
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2020 Compass Electronics Group, LLC
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*/
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/ {
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leds {
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compatible = "gpio-leds";
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led0 {
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label = "gen_led0";
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gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
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default-state = "none";
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};
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led1 {
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label = "gen_led1";
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gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
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default-state = "none";
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};
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led2 {
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label = "gen_led2";
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gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
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default-state = "none";
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};
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led3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led3>;
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label = "heartbeat";
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gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_audio: regulator-audio {
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compatible = "regulator-fixed";
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regulator-name = "3v3_aud";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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sound {
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compatible = "fsl,imx-audio-wm8962";
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model = "wm8962-audio";
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audio-cpu = <&sai3>;
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audio-codec = <&wm8962>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"AMIC", "MICBIAS",
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"IN3R", "AMIC";
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};
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_espi2>;
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cs-gpios = <&gpio5 9 0>;
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status = "okay";
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eeprom@0 {
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compatible = "microchip,at25160bn", "atmel,at25";
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reg = <0>;
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spi-max-frequency = <5000000>;
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spi-cpha;
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spi-cpol;
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pagesize = <32>;
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size = <2048>;
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address-width = <16>;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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status = "okay";
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wm8962: audio-codec@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
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clock-names = "xclk";
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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PLLVDD-supply = <®_audio>;
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SPKVDD1-supply = <®_audio>;
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SPKVDD2-supply = <®_audio>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0000 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x0000 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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pca6416_0: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcal6414>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
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};
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pca6416_1: gpio@21 {
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compatible = "nxp,pcal6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&uart2 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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assigned-clocks = <&clk IMX8MM_CLK_UART3>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
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bus-width = <4>;
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vmmc-supply = <®_usdhc2_vmmc>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_espi2: espi2grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
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MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
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MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
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MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
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MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
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>;
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};
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pinctrl_led3: led3grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
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>;
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};
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pinctrl_pcal6414: pcal6414-gpio {
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fsl,pins = <
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MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
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MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
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MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
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MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
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MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
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MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
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MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
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>;
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};
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pinctrl_usdhc2_gpio: usdhc2grpgpio {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
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MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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};
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@ -0,0 +1,19 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2020 Compass Electronics Group, LLC
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*/
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/dts-v1/;
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#include "imx8mm.dtsi"
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#include "imx8mm-beacon-som.dtsi"
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#include "imx8mm-beacon-baseboard.dtsi"
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/ {
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model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
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compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
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chosen {
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stdout-path = &uart2;
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};
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};
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@ -0,0 +1,410 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2020 Compass Electronics Group, LLC
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*/
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/ {
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usdhc1_pwrseq: usdhc1_pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1_gpio>;
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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clocks = <&osc_32k>;
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clock-names = "ext_clock";
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post-power-on-delay-ms = <80>;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0 0x80000000>;
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};
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};
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&A53_0 {
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cpu-supply = <&buck2_reg>;
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};
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&ddrc {
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operating-points-v2 = <&ddrc_opp_table>;
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ddrc_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-25M {
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opp-hz = /bits/ 64 <25000000>;
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};
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opp-100M {
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opp-hz = /bits/ 64 <100000000>;
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};
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opp-750M {
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opp-hz = /bits/ 64 <750000000>;
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};
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@4b {
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compatible = "rohm,bd71847";
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reg = <0x4b>;
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 GPIO_ACTIVE_LOW>;
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rohm,reset-snvs-powered;
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regulators {
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buck1_reg: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck2_reg: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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rohm,dvs-run-voltage = <1000000>;
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rohm,dvs-idle-voltage = <900000>;
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};
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buck3_reg: BUCK3 {
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// BUCK5 in datasheet
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regulator-name = "BUCK3";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck4_reg: BUCK4 {
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// BUCK6 in datasheet
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5_reg: BUCK5 {
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// BUCK7 in datasheet
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1605000>;
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regulator-max-microvolt = <1995000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6_reg: BUCK6 {
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// BUCK8 in datasheet
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regulator-name = "BUCK6";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: LDO2 {
|
||||
regulator-name = "LDO2";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: LDO3 {
|
||||
regulator-name = "LDO3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: LDO4 {
|
||||
regulator-name = "LDO4";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo6_reg: LDO6 {
|
||||
regulator-name = "LDO6";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "microchip, at24c64d", "atmel,24c64";
|
||||
pagesize = <32>;
|
||||
read-only; /* Manufacturing EEPROM programmed at factory */
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
rtc@51 {
|
||||
compatible = "nxp,pcf85263";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_UART1>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm43438-bt";
|
||||
shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
|
||||
host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
|
||||
device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
clocks = <&osc_32k>;
|
||||
clock-names = "extclk";
|
||||
};
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
pm-ignore-notify;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&usdhc1_pwrseq>;
|
||||
status = "okay";
|
||||
|
||||
brcmf: bcrmf@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wlan>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicirq {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
|
||||
MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
|
||||
MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
|
||||
MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
|
||||
MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
|
||||
MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_gpio: usdhc1grpgpio {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wlan: wlangrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue