mirror of https://gitee.com/openkylin/linux.git
ARM: OMAP2+: CM: determine CM base address from device tree
There is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo <t-kristo@ti.com>
This commit is contained in:
parent
fe87414f71
commit
5970ca2db9
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@ -71,6 +71,7 @@ int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
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extern int cm_register(struct cm_ll_data *cld);
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extern int cm_register(struct cm_ll_data *cld);
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extern int cm_unregister(struct cm_ll_data *cld);
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extern int cm_unregister(struct cm_ll_data *cld);
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int omap_cm_init(void);
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int omap_cm_init(void);
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int omap2_cm_base_init(void);
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# endif
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# endif
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@ -395,6 +395,7 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
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int __init omap2xxx_cm_init(void)
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int __init omap2xxx_cm_init(void)
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{
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{
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omap2_cm_base_init();
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return cm_register(&omap2xxx_cm_ll_data);
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return cm_register(&omap2xxx_cm_ll_data);
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}
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}
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@ -354,6 +354,7 @@ static struct cm_ll_data am33xx_cm_ll_data = {
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int __init am33xx_cm_init(void)
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int __init am33xx_cm_init(void)
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{
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{
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omap2_cm_base_init();
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return cm_register(&am33xx_cm_ll_data);
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return cm_register(&am33xx_cm_ll_data);
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}
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}
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@ -673,6 +673,8 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
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int __init omap3xxx_cm_init(void)
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int __init omap3xxx_cm_init(void)
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{
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{
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omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD);
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omap2_cm_base_init();
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return cm_register(&omap3xxx_cm_ll_data);
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return cm_register(&omap3xxx_cm_ll_data);
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}
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}
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@ -36,6 +36,8 @@ void __iomem *cm_base;
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/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
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/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
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void __iomem *cm2_base;
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void __iomem *cm2_base;
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#define CM_NO_CLOCKS 0x1
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/**
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/**
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* omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
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* omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
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* @cm: CM base virtual address
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* @cm: CM base virtual address
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@ -224,17 +226,78 @@ static struct omap_prcm_init_data cm2_data = {
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.index = TI_CLKM_CM2,
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.index = TI_CLKM_CM2,
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};
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};
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static struct omap_prcm_init_data omap2_prcm_data = {
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.index = TI_CLKM_CM,
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.flags = CM_NO_CLOCKS,
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};
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static struct omap_prcm_init_data omap3_cm_data = {
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.index = TI_CLKM_CM,
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/*
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* IVA2 offset is a negative value, must offset the cm_base address
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* by this to get it to positive side on the iomap
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*/
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.offset = -OMAP3430_IVA2_MOD,
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};
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static struct omap_prcm_init_data am3_prcm_data = {
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.index = TI_CLKM_CM,
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.flags = CM_NO_CLOCKS,
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};
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static struct omap_prcm_init_data am4_prcm_data = {
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.index = TI_CLKM_CM,
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.flags = CM_NO_CLOCKS,
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};
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static const struct of_device_id omap_cm_dt_match_table[] = {
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static const struct of_device_id omap_cm_dt_match_table[] = {
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{ .compatible = "ti,omap3-cm", .data = &cm_data },
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{ .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
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{ .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
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{ .compatible = "ti,omap4-cm1", .data = &cm_data },
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{ .compatible = "ti,omap4-cm1", .data = &cm_data },
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{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
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{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
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{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
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{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
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{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
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{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
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{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
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{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
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{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
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{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
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{ .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
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{ .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
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{ }
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{ }
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};
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};
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/**
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* omap2_cm_base_init - initialize iomappings for the CM drivers
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*
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* Detects and initializes the iomappings for the CM driver, based
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* on the DT data. Returns 0 in success, negative error value
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* otherwise.
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*/
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int __init omap2_cm_base_init(void)
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{
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struct device_node *np;
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const struct of_device_id *match;
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struct omap_prcm_init_data *data;
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void __iomem *mem;
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for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
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data = (struct omap_prcm_init_data *)match->data;
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mem = of_iomap(np, 0);
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if (!mem)
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return -ENOMEM;
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if (data->index == TI_CLKM_CM)
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cm_base = mem + data->offset;
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if (data->index == TI_CLKM_CM2)
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cm2_base = mem + data->offset;
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data->mem = mem;
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}
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return 0;
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}
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/**
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/**
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* omap_cm_init - low level init for the CM drivers
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* omap_cm_init - low level init for the CM drivers
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*
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*
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@ -244,7 +307,6 @@ static const struct of_device_id omap_cm_dt_match_table[] = {
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int __init omap_cm_init(void)
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int __init omap_cm_init(void)
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{
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{
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struct device_node *np;
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struct device_node *np;
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void __iomem *mem;
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const struct of_device_id *match;
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const struct of_device_id *match;
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const struct omap_prcm_init_data *data;
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const struct omap_prcm_init_data *data;
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int ret;
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int ret;
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@ -252,11 +314,10 @@ int __init omap_cm_init(void)
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for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
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for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
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data = match->data;
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data = match->data;
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mem = of_iomap(np, 0);
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if (data->flags & CM_NO_CLOCKS)
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if (!mem)
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continue;
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return -ENOMEM;
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ret = omap2_clk_provider_init(np, data->index, mem);
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ret = omap2_clk_provider_init(np, data->index, data->mem);
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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}
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@ -516,6 +516,7 @@ static struct cm_ll_data omap4xxx_cm_ll_data = {
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int __init omap4_cm_init(void)
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int __init omap4_cm_init(void)
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{
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{
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omap2_cm_base_init();
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omap_cm_base_init();
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omap_cm_base_init();
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return cm_register(&omap4xxx_cm_ll_data);
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return cm_register(&omap4xxx_cm_ll_data);
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@ -387,7 +387,6 @@ void __init omap2420_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
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omap2xxx_check_revision();
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omap2xxx_check_revision();
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omap2xxx_prm_init();
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omap2xxx_prm_init();
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omap2xxx_cm_init();
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omap2xxx_cm_init();
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@ -417,7 +416,6 @@ void __init omap2430_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
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omap2xxx_check_revision();
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omap2xxx_check_revision();
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omap2xxx_prm_init();
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omap2xxx_prm_init();
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omap2xxx_cm_init();
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omap2xxx_cm_init();
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@ -451,6 +449,8 @@ void __init omap3_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
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/* XXX: remove this once OMAP3 is DT only */
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
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omap3xxx_check_revision();
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omap3xxx_check_revision();
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omap3xxx_check_features();
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omap3xxx_check_features();
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@ -552,7 +552,6 @@ void __init ti814x_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
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omap3xxx_check_revision();
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omap3xxx_check_revision();
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ti81xx_check_features();
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ti81xx_check_features();
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am33xx_prm_init();
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am33xx_prm_init();
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@ -573,7 +572,6 @@ void __init ti816x_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
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omap3xxx_check_revision();
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omap3xxx_check_revision();
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ti81xx_check_features();
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ti81xx_check_features();
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am33xx_prm_init();
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am33xx_prm_init();
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@ -596,7 +594,6 @@ void __init am33xx_init_early(void)
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omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
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omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
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omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
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omap3xxx_check_revision();
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omap3xxx_check_revision();
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am33xx_check_features();
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am33xx_check_features();
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am33xx_prm_init();
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am33xx_prm_init();
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omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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NULL);
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NULL);
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omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
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omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
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omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
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omap3xxx_check_revision();
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omap3xxx_check_revision();
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am33xx_check_features();
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am33xx_check_features();
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omap44xx_prm_init();
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omap44xx_prm_init();
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
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OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
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omap4xxx_check_revision();
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omap4xxx_check_revision();
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omap4xxx_check_features();
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omap4xxx_check_features();
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@ -682,8 +676,6 @@ void __init omap5_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
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omap4_pm_init_early();
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omap4_pm_init_early();
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omap44xx_prm_init();
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omap44xx_prm_init();
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@ -712,8 +704,6 @@ void __init dra7xx_init_early(void)
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE));
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OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
|
||||||
omap4_pm_init_early();
|
omap4_pm_init_early();
|
||||||
omap44xx_prm_init();
|
omap44xx_prm_init();
|
||||||
|
|
|
@ -521,9 +521,15 @@ struct omap_prcm_irq_setup {
|
||||||
/**
|
/**
|
||||||
* struct omap_prcm_init_data - PRCM driver init data
|
* struct omap_prcm_init_data - PRCM driver init data
|
||||||
* @index: clock memory mapping index to be used
|
* @index: clock memory mapping index to be used
|
||||||
|
* @mem: IO mem pointer for this module
|
||||||
|
* @offset: module base address offset from the IO base
|
||||||
|
* @flags: PRCM module init flags
|
||||||
*/
|
*/
|
||||||
struct omap_prcm_init_data {
|
struct omap_prcm_init_data {
|
||||||
int index;
|
int index;
|
||||||
|
void __iomem *mem;
|
||||||
|
s16 offset;
|
||||||
|
u16 flags;
|
||||||
};
|
};
|
||||||
|
|
||||||
extern void omap_prcm_irq_cleanup(void);
|
extern void omap_prcm_irq_cleanup(void);
|
||||||
|
|
|
@ -689,7 +689,6 @@ int __init omap_prcm_init(void)
|
||||||
|
|
||||||
void __init omap3_prcm_legacy_iomaps_init(void)
|
void __init omap3_prcm_legacy_iomaps_init(void)
|
||||||
{
|
{
|
||||||
omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD);
|
|
||||||
omap2_clk_legacy_provider_init(TI_CLKM_PRM,
|
omap2_clk_legacy_provider_init(TI_CLKM_PRM,
|
||||||
prm_base + OMAP3430_IVA2_MOD);
|
prm_base + OMAP3430_IVA2_MOD);
|
||||||
omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get());
|
omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get());
|
||||||
|
|
Loading…
Reference in New Issue