mirror of https://gitee.com/openkylin/linux.git
Merge commit 'v2.6.27-rc6' into x86/unify-cpu-detect
Conflicts: arch/x86/kernel/cpu/amd.c arch/x86/kernel/cpu/common.c arch/x86/kernel/cpu/common_64.c arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
commit
59c37bf892
|
@ -144,8 +144,8 @@ prototypes:
|
|||
void (*kill_sb) (struct super_block *);
|
||||
locking rules:
|
||||
may block BKL
|
||||
get_sb yes yes
|
||||
kill_sb yes yes
|
||||
get_sb yes no
|
||||
kill_sb yes no
|
||||
|
||||
->get_sb() returns error or 0 with locked superblock attached to the vfsmount
|
||||
(exclusive on ->s_umount).
|
||||
|
@ -409,12 +409,12 @@ ioctl: yes (see below)
|
|||
unlocked_ioctl: no (see below)
|
||||
compat_ioctl: no
|
||||
mmap: no
|
||||
open: maybe (see below)
|
||||
open: no
|
||||
flush: no
|
||||
release: no
|
||||
fsync: no (see below)
|
||||
aio_fsync: no
|
||||
fasync: yes (see below)
|
||||
fasync: no
|
||||
lock: yes
|
||||
readv: no
|
||||
writev: no
|
||||
|
@ -431,13 +431,6 @@ For many filesystems, it is probably safe to acquire the inode
|
|||
semaphore. Note some filesystems (i.e. remote ones) provide no
|
||||
protection for i_size so you will need to use the BKL.
|
||||
|
||||
->open() locking is in-transit: big lock partially moved into the methods.
|
||||
The only exception is ->open() in the instances of file_operations that never
|
||||
end up in ->i_fop/->proc_fops, i.e. ones that belong to character devices
|
||||
(chrdev_open() takes lock before replacing ->f_op and calling the secondary
|
||||
method. As soon as we fix the handling of module reference counters all
|
||||
instances of ->open() will be called without the BKL.
|
||||
|
||||
Note: ext2_release() was *the* source of contention on fs-intensive
|
||||
loads and dropping BKL on ->release() helps to get rid of that (we still
|
||||
grab BKL for cases when we close a file that had been opened r/w, but that
|
||||
|
|
|
@ -44,7 +44,7 @@ detailed description):
|
|||
- LCD brightness control
|
||||
- Volume control
|
||||
- Fan control and monitoring: fan speed, fan enable/disable
|
||||
- Experimental: WAN enable and disable
|
||||
- WAN enable and disable
|
||||
|
||||
A compatibility table by model and feature is maintained on the web
|
||||
site, http://ibm-acpi.sf.net/. I appreciate any success or failure
|
||||
|
@ -1375,18 +1375,13 @@ with EINVAL, try to set pwm1_enable to 1 and pwm1 to at least 128 (255
|
|||
would be the safest choice, though).
|
||||
|
||||
|
||||
EXPERIMENTAL: WAN
|
||||
-----------------
|
||||
WAN
|
||||
---
|
||||
|
||||
procfs: /proc/acpi/ibm/wan
|
||||
sysfs device attribute: wwan_enable (deprecated)
|
||||
sysfs rfkill class: switch "tpacpi_wwan_sw"
|
||||
|
||||
This feature is marked EXPERIMENTAL because the implementation
|
||||
directly accesses hardware registers and may not work as expected. USE
|
||||
WITH CAUTION! To use this feature, you need to supply the
|
||||
experimental=1 parameter when loading the module.
|
||||
|
||||
This feature shows the presence and current state of a W-WAN (Sierra
|
||||
Wireless EV-DO) device.
|
||||
|
||||
|
|
|
@ -3,3 +3,4 @@
|
|||
2 -> Hauppauge HVR850 (au0828) [2040:7240]
|
||||
3 -> DViCO FusionHDTV USB (au0828) [0fe9:d620]
|
||||
4 -> Hauppauge HVR950Q rev xxF8 (au0828) [2040:7201,2040:7211,2040:7281]
|
||||
5 -> Hauppauge Woodbury (au0828) [2040:8200]
|
||||
|
|
|
@ -88,14 +88,14 @@ zc3xx 0471:0325 Philips SPC 200 NC
|
|||
zc3xx 0471:0326 Philips SPC 300 NC
|
||||
sonixj 0471:0327 Philips SPC 600 NC
|
||||
sonixj 0471:0328 Philips SPC 700 NC
|
||||
zc3xx 0471:032d Philips spc210nc
|
||||
zc3xx 0471:032e Philips spc315nc
|
||||
sonixj 0471:0330 Philips SPC 710NC
|
||||
zc3xx 0471:032d Philips SPC 210 NC
|
||||
zc3xx 0471:032e Philips SPC 315 NC
|
||||
sonixj 0471:0330 Philips SPC 710 NC
|
||||
spca501 0497:c001 Smile International
|
||||
sunplus 04a5:3003 Benq DC 1300
|
||||
sunplus 04a5:3008 Benq DC 1500
|
||||
sunplus 04a5:300a Benq DC3410
|
||||
spca500 04a5:300c Benq DC1016
|
||||
sunplus 04a5:300a Benq DC 3410
|
||||
spca500 04a5:300c Benq DC 1016
|
||||
sunplus 04f1:1001 JVC GC A50
|
||||
spca561 04fc:0561 Flexcam 100
|
||||
sunplus 04fc:500c Sunplus CA500C
|
||||
|
@ -175,19 +175,21 @@ sunplus 08ca:2060 Aiptek PocketDV5300
|
|||
tv8532 0923:010f ICM532 cams
|
||||
mars 093a:050f Mars-Semi Pc-Camera
|
||||
pac207 093a:2460 PAC207 Qtec Webcam 100
|
||||
pac207 093a:2463 Philips spc200nc pac207
|
||||
pac207 093a:2463 Philips SPC 220 NC
|
||||
pac207 093a:2464 Labtec Webcam 1200
|
||||
pac207 093a:2468 PAC207
|
||||
pac207 093a:2470 Genius GF112
|
||||
pac207 093a:2471 PAC207 Genius VideoCam ge111
|
||||
pac207 093a:2472 PAC207 Genius VideoCam ge110
|
||||
pac207 093a:2471 Genius VideoCam ge111
|
||||
pac207 093a:2472 Genius VideoCam ge110
|
||||
pac7311 093a:2600 PAC7311 Typhoon
|
||||
pac7311 093a:2601 PAC7311 Phillips SPC610NC
|
||||
pac7311 093a:2601 Philips SPC 610 NC
|
||||
pac7311 093a:2603 PAC7312
|
||||
pac7311 093a:2608 PAC7311 Trust WB-3300p
|
||||
pac7311 093a:260e PAC7311 Gigaware VGA PC Camera, Trust WB-3350p, SIGMA cam 2350
|
||||
pac7311 093a:260f PAC7311 SnakeCam
|
||||
pac7311 093a:2608 Trust WB-3300p
|
||||
pac7311 093a:260e Gigaware VGA PC Camera, Trust WB-3350p, SIGMA cam 2350
|
||||
pac7311 093a:260f SnakeCam
|
||||
pac7311 093a:2621 PAC731x
|
||||
pac7311 093a:2624 PAC7302
|
||||
pac7311 093a:2626 Labtec 2200
|
||||
zc3xx 0ac8:0302 Z-star Vimicro zc0302
|
||||
vc032x 0ac8:0321 Vimicro generic vc0321
|
||||
vc032x 0ac8:0323 Vimicro Vc0323
|
||||
|
@ -220,6 +222,7 @@ sonixj 0c45:60c0 Sangha Sn535
|
|||
sonixj 0c45:60ec SN9C105+MO4000
|
||||
sonixj 0c45:60fb Surfer NoName
|
||||
sonixj 0c45:60fc LG-LIC300
|
||||
sonixj 0c45:6128 Microdia/Sonix SNP325
|
||||
sonixj 0c45:612a Avant Camera
|
||||
sonixj 0c45:612c Typhoon Rasy Cam 1.3MPix
|
||||
sonixj 0c45:6130 Sonix Pccam
|
||||
|
@ -234,7 +237,7 @@ zc3xx 10fd:0128 Typhoon Webshot II USB 300k 0x0128
|
|||
spca561 10fd:7e50 FlyCam Usb 100
|
||||
zc3xx 10fd:8050 Typhoon Webshot II USB 300k
|
||||
spca501 1776:501c Arowana 300K CMOS Camera
|
||||
t613 17a1:0128 T613/TAS5130A
|
||||
t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops
|
||||
vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC
|
||||
pac207 2001:f115 D-Link DSB-C120
|
||||
spca500 2899:012c Toptro Industrial
|
||||
|
|
|
@ -222,8 +222,7 @@ W: http://code.google.com/p/aceracpi
|
|||
S: Maintained
|
||||
|
||||
ACPI
|
||||
P: Andi Kleen
|
||||
M: ak@linux.intel.com
|
||||
P: Len Brown
|
||||
M: lenb@kernel.org
|
||||
L: linux-acpi@vger.kernel.org
|
||||
W: http://www.lesswatts.org/projects/acpi/
|
||||
|
@ -751,11 +750,13 @@ P: Ville Syrjala
|
|||
M: syrjala@sci.fi
|
||||
S: Maintained
|
||||
|
||||
ATL1 ETHERNET DRIVER
|
||||
ATLX ETHERNET DRIVERS
|
||||
P: Jay Cliburn
|
||||
M: jcliburn@gmail.com
|
||||
P: Chris Snook
|
||||
M: csnook@redhat.com
|
||||
P: Jie Yang
|
||||
M: jie.yang@atheros.com
|
||||
L: atl1-devel@lists.sourceforge.net
|
||||
W: http://sourceforge.net/projects/atl1
|
||||
W: http://atl1.sourceforge.net
|
||||
|
@ -1594,7 +1595,7 @@ S: Supported
|
|||
EMBEDDED LINUX
|
||||
P: Paul Gortmaker
|
||||
M: paul.gortmaker@windriver.com
|
||||
P David Woodhouse
|
||||
P: David Woodhouse
|
||||
M: dwmw2@infradead.org
|
||||
L: linux-embedded@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 27
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Rotary Wombat
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -18,15 +18,7 @@
|
|||
#include <linux/compiler.h>
|
||||
#include <asm/types.h>
|
||||
|
||||
#ifdef __ARMEB__
|
||||
# define __BIG_ENDIAN
|
||||
#else
|
||||
# define __LITTLE_ENDIAN
|
||||
#endif
|
||||
|
||||
#define __SWAB_64_THRU_32__
|
||||
|
||||
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
|
||||
{
|
||||
__u32 t;
|
||||
|
||||
|
@ -48,8 +40,19 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
|||
|
||||
return x;
|
||||
}
|
||||
#define __arch_swab32 __arch_swab32
|
||||
|
||||
#include <linux/byteorder.h>
|
||||
#define __arch__swab32(x) ___arch__swab32(x)
|
||||
|
||||
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
|
||||
# define __BYTEORDER_HAS_U64__
|
||||
# define __SWAB_64_THRU_32__
|
||||
#endif
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#include <linux/byteorder/big_endian.h>
|
||||
#else
|
||||
#include <linux/byteorder/little_endian.h>
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -61,8 +61,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
|
|||
#define MT_DEVICE_NONSHARED 1
|
||||
#define MT_DEVICE_CACHED 2
|
||||
#define MT_DEVICE_IXP2000 3
|
||||
#define MT_DEVICE_WC 4
|
||||
/*
|
||||
* types 4 onwards can be found in asm/mach/map.h and are undefined
|
||||
* types 5 onwards can be found in asm/mach/map.h and are undefined
|
||||
* for ioremap
|
||||
*/
|
||||
|
||||
|
@ -215,11 +216,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
|
|||
#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
|
||||
#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
|
||||
#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED)
|
||||
#define ioremap_wc(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_WC)
|
||||
#define iounmap(cookie) __iounmap(cookie)
|
||||
#else
|
||||
#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
|
||||
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
|
||||
#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
|
||||
#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC)
|
||||
#define iounmap(cookie) __arch_iounmap(cookie)
|
||||
#endif
|
||||
|
||||
|
|
|
@ -18,13 +18,13 @@ struct map_desc {
|
|||
unsigned int type;
|
||||
};
|
||||
|
||||
/* types 0-3 are defined in asm/io.h */
|
||||
#define MT_CACHECLEAN 4
|
||||
#define MT_MINICLEAN 5
|
||||
#define MT_LOW_VECTORS 6
|
||||
#define MT_HIGH_VECTORS 7
|
||||
#define MT_MEMORY 8
|
||||
#define MT_ROM 9
|
||||
/* types 0-4 are defined in asm/io.h */
|
||||
#define MT_CACHECLEAN 5
|
||||
#define MT_MINICLEAN 6
|
||||
#define MT_LOW_VECTORS 7
|
||||
#define MT_HIGH_VECTORS 8
|
||||
#define MT_MEMORY 9
|
||||
#define MT_ROM 10
|
||||
|
||||
#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED
|
||||
#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000
|
||||
|
|
|
@ -159,6 +159,7 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
|
|||
#ifdef CONFIG_ARCH_OMAP730
|
||||
static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP730_MCBSP1_BASE,
|
||||
.virt_base = io_p2v(OMAP730_MCBSP1_BASE),
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP1_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP1_TX,
|
||||
|
@ -167,6 +168,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
|
|||
.ops = &omap1_mcbsp_ops,
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP730_MCBSP2_BASE,
|
||||
.virt_base = io_p2v(OMAP730_MCBSP2_BASE),
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP3_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP3_TX,
|
||||
|
@ -184,6 +186,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
|
|||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP1510_MCBSP1_BASE,
|
||||
.virt_base = OMAP1510_MCBSP1_BASE,
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP1_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP1_TX,
|
||||
|
@ -193,6 +196,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
|||
.clk_name = "mcbsp_clk",
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP1510_MCBSP2_BASE,
|
||||
.virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP2_TX,
|
||||
|
@ -201,6 +205,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
|||
.ops = &omap1_mcbsp_ops,
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP1510_MCBSP3_BASE,
|
||||
.virt_base = OMAP1510_MCBSP3_BASE,
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP3_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP3_TX,
|
||||
|
@ -219,6 +224,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
|||
#ifdef CONFIG_ARCH_OMAP16XX
|
||||
static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP1610_MCBSP1_BASE,
|
||||
.virt_base = OMAP1610_MCBSP1_BASE,
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP1_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP1_TX,
|
||||
|
@ -228,6 +234,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
|||
.clk_name = "mcbsp_clk",
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP1610_MCBSP2_BASE,
|
||||
.virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP2_TX,
|
||||
|
@ -236,6 +243,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
|||
.ops = &omap1_mcbsp_ops,
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP1610_MCBSP3_BASE,
|
||||
.virt_base = OMAP1610_MCBSP3_BASE,
|
||||
.dma_rx_sync = OMAP_DMA_MCBSP3_RX,
|
||||
.dma_tx_sync = OMAP_DMA_MCBSP3_TX,
|
||||
|
|
|
@ -134,6 +134,7 @@ static struct omap_mcbsp_ops omap2_mcbsp_ops = {
|
|||
#ifdef CONFIG_ARCH_OMAP24XX
|
||||
static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP24XX_MCBSP1_BASE,
|
||||
.virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
|
||||
.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
|
||||
.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
|
||||
|
@ -143,6 +144,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
|
|||
.clk_name = "mcbsp_clk",
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP24XX_MCBSP2_BASE,
|
||||
.virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
|
||||
.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
|
||||
.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
|
||||
|
@ -161,6 +163,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
|
|||
#ifdef CONFIG_ARCH_OMAP34XX
|
||||
static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP34XX_MCBSP1_BASE,
|
||||
.virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
|
||||
.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
|
||||
.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
|
||||
|
@ -170,6 +173,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
|||
.clk_name = "mcbsp_clk",
|
||||
},
|
||||
{
|
||||
.phys_base = OMAP34XX_MCBSP2_BASE,
|
||||
.virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
|
||||
.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
|
||||
.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
|
||||
|
|
|
@ -211,6 +211,12 @@ static struct mem_type mem_types[] = {
|
|||
PMD_SECT_TEX(1),
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_DEVICE_WC] = { /* ioremap_wc */
|
||||
.prot_pte = PROT_PTE_DEVICE,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_CACHECLEAN] = {
|
||||
.prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
|
||||
.domain = DOMAIN_KERNEL,
|
||||
|
@ -272,6 +278,20 @@ static void __init build_mem_type_table(void)
|
|||
ecc_mask = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* On non-Xscale3 ARMv5-and-older systems, use CB=01
|
||||
* (Uncached/Buffered) for ioremap_wc() mappings. On XScale3
|
||||
* and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable
|
||||
* in xsc3 parlance, Uncached Normal in ARMv6 parlance).
|
||||
*/
|
||||
if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
|
||||
mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
} else {
|
||||
mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
|
||||
}
|
||||
|
||||
/*
|
||||
* ARMv5 and lower, bit 4 must be set for page tables.
|
||||
* (was: cache "update-able on write" bit on ARM610)
|
||||
|
|
|
@ -37,7 +37,6 @@
|
|||
#include <linux/proc_fs.h>
|
||||
#include <linux/semaphore.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/version.h>
|
||||
|
||||
#include <mach/clock.h>
|
||||
|
||||
|
|
|
@ -1488,7 +1488,7 @@ static int __init _omap_gpio_init(void)
|
|||
bank->chip.set = gpio_set;
|
||||
if (bank_is_mpuio(bank)) {
|
||||
bank->chip.label = "mpuio";
|
||||
#ifdef CONFIG_ARCH_OMAP1
|
||||
#ifdef CONFIG_ARCH_OMAP16XX
|
||||
bank->chip.dev = &omap_mpuio_device.dev;
|
||||
#endif
|
||||
bank->chip.base = OMAP_MPUIO(0);
|
||||
|
|
|
@ -315,6 +315,7 @@ struct omap_mcbsp_ops {
|
|||
};
|
||||
|
||||
struct omap_mcbsp_platform_data {
|
||||
unsigned long phys_base;
|
||||
u32 virt_base;
|
||||
u8 dma_rx_sync, dma_tx_sync;
|
||||
u16 rx_irq, tx_irq;
|
||||
|
@ -324,6 +325,7 @@ struct omap_mcbsp_platform_data {
|
|||
|
||||
struct omap_mcbsp {
|
||||
struct device *dev;
|
||||
unsigned long phys_base;
|
||||
u32 io_base;
|
||||
u8 id;
|
||||
u8 free;
|
||||
|
|
|
@ -651,7 +651,7 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
|
|||
omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
|
||||
src_port,
|
||||
OMAP_DMA_AMODE_CONSTANT,
|
||||
mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1,
|
||||
mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1,
|
||||
0, 0);
|
||||
|
||||
omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
|
||||
|
@ -712,7 +712,7 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
|
|||
omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
|
||||
src_port,
|
||||
OMAP_DMA_AMODE_CONSTANT,
|
||||
mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1,
|
||||
mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1,
|
||||
0, 0);
|
||||
|
||||
omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
|
||||
|
@ -830,6 +830,7 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev)
|
|||
mcbsp[id].dma_tx_lch = -1;
|
||||
mcbsp[id].dma_rx_lch = -1;
|
||||
|
||||
mcbsp[id].phys_base = pdata->phys_base;
|
||||
mcbsp[id].io_base = pdata->virt_base;
|
||||
/* Default I/O is IRQ based */
|
||||
mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO;
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* to extract and format the required data.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/thread_info.h>
|
||||
#include <linux/kbuild.h>
|
||||
|
||||
|
@ -17,4 +19,8 @@ void foo(void)
|
|||
OFFSET(TI_rar_saved, thread_info, rar_saved);
|
||||
OFFSET(TI_rsr_saved, thread_info, rsr_saved);
|
||||
OFFSET(TI_restart_block, thread_info, restart_block);
|
||||
BLANK();
|
||||
OFFSET(TSK_active_mm, task_struct, active_mm);
|
||||
BLANK();
|
||||
OFFSET(MM_pgd, mm_struct, pgd);
|
||||
}
|
||||
|
|
|
@ -334,9 +334,64 @@ save_full_context_ex:
|
|||
|
||||
/* Low-level exception handlers */
|
||||
handle_critical:
|
||||
/*
|
||||
* AT32AP700x errata:
|
||||
*
|
||||
* After a Java stack overflow or underflow trap, any CPU
|
||||
* memory access may cause erratic behavior. This will happen
|
||||
* when the four least significant bits of the JOSP system
|
||||
* register contains any value between 9 and 15 (inclusive).
|
||||
*
|
||||
* Possible workarounds:
|
||||
* - Don't use the Java Extension Module
|
||||
* - Ensure that the stack overflow and underflow trap
|
||||
* handlers do not do any memory access or trigger any
|
||||
* exceptions before the overflow/underflow condition is
|
||||
* cleared (by incrementing or decrementing the JOSP)
|
||||
* - Make sure that JOSP does not contain any problematic
|
||||
* value before doing any exception or interrupt
|
||||
* processing.
|
||||
* - Set up a critical exception handler which writes a
|
||||
* known-to-be-safe value, e.g. 4, to JOSP before doing
|
||||
* any further processing.
|
||||
*
|
||||
* We'll use the last workaround for now since we cannot
|
||||
* guarantee that user space processes don't use Java mode.
|
||||
* Non-well-behaving userland will be terminated with extreme
|
||||
* prejudice.
|
||||
*/
|
||||
#ifdef CONFIG_CPU_AT32AP700X
|
||||
/*
|
||||
* There's a chance we can't touch memory, so temporarily
|
||||
* borrow PTBR to save the stack pointer while we fix things
|
||||
* up...
|
||||
*/
|
||||
mtsr SYSREG_PTBR, sp
|
||||
mov sp, 4
|
||||
mtsr SYSREG_JOSP, sp
|
||||
mfsr sp, SYSREG_PTBR
|
||||
sub pc, -2
|
||||
|
||||
/* Push most of pt_regs on stack. We'll do the rest later */
|
||||
sub sp, 4
|
||||
stmts --sp, r0-lr
|
||||
rcall save_full_context_ex
|
||||
pushm r0-r12
|
||||
|
||||
/* PTBR mirrors current_thread_info()->task->active_mm->pgd */
|
||||
get_thread_info r0
|
||||
ld.w r1, r0[TI_task]
|
||||
ld.w r2, r1[TSK_active_mm]
|
||||
ld.w r3, r2[MM_pgd]
|
||||
mtsr SYSREG_PTBR, r3
|
||||
#else
|
||||
sub sp, 4
|
||||
pushm r0-r12
|
||||
#endif
|
||||
sub r0, sp, -(14 * 4)
|
||||
mov r1, lr
|
||||
mfsr r2, SYSREG_RAR_EX
|
||||
mfsr r3, SYSREG_RSR_EX
|
||||
pushm r0-r3
|
||||
|
||||
mfsr r12, SYSREG_ECR
|
||||
mov r11, sp
|
||||
rcall do_critical_exception
|
||||
|
|
|
@ -134,7 +134,7 @@ pm_standby:
|
|||
mov r11, SDRAMC_LPR_LPCB_SELF_RFR
|
||||
bfins r10, r11, 0, 2 /* LPCB <- self Refresh */
|
||||
sync 0 /* flush write buffer */
|
||||
st.w r12[SDRAMC_LPR], r11 /* put SDRAM in self-refresh mode */
|
||||
st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */
|
||||
ld.w r11, r12[SDRAMC_LPR]
|
||||
unmask_interrupts
|
||||
sleep CPU_SLEEP_FROZEN
|
||||
|
|
|
@ -21,5 +21,8 @@ extern char __start_gate_brl_fsys_bubble_down_patchlist[], __end_gate_brl_fsys_b
|
|||
extern char __start_unwind[], __end_unwind[];
|
||||
extern char __start_ivt_text[], __end_ivt_text[];
|
||||
|
||||
#undef dereference_function_descriptor
|
||||
void *dereference_function_descriptor(void *);
|
||||
|
||||
#endif /* _ASM_IA64_SECTIONS_H */
|
||||
|
||||
|
|
|
@ -31,9 +31,11 @@
|
|||
#include <linux/elf.h>
|
||||
#include <linux/moduleloader.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
#include <asm/patch.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#define ARCH_MODULE_DEBUG 0
|
||||
|
@ -941,3 +943,13 @@ module_arch_cleanup (struct module *mod)
|
|||
if (mod->arch.core_unw_table)
|
||||
unw_remove_unwind_table(mod->arch.core_unw_table);
|
||||
}
|
||||
|
||||
void *dereference_function_descriptor(void *ptr)
|
||||
{
|
||||
struct fdesc *desc = ptr;
|
||||
void *p;
|
||||
|
||||
if (!probe_kernel_address(&desc->ip, p))
|
||||
ptr = p;
|
||||
return ptr;
|
||||
}
|
||||
|
|
|
@ -1886,6 +1886,15 @@ config STACKTRACE_SUPPORT
|
|||
|
||||
source "init/Kconfig"
|
||||
|
||||
config PROBE_INITRD_HEADER
|
||||
bool "Probe initrd header created by addinitrd"
|
||||
depends on BLK_DEV_INITRD
|
||||
help
|
||||
Probe initrd header at the last page of kernel image.
|
||||
Say Y here if you are using arch/mips/boot/addinitrd.c to
|
||||
add initrd or initramfs image to the kernel image.
|
||||
Otherwise, say N.
|
||||
|
||||
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
|
||||
|
||||
config HW_HAS_EISA
|
||||
|
|
|
@ -160,30 +160,33 @@ early_param("rd_size", rd_size_early);
|
|||
static unsigned long __init init_initrd(void)
|
||||
{
|
||||
unsigned long end;
|
||||
u32 *initrd_header;
|
||||
|
||||
/*
|
||||
* Board specific code or command line parser should have
|
||||
* already set up initrd_start and initrd_end. In these cases
|
||||
* perfom sanity checks and use them if all looks good.
|
||||
*/
|
||||
if (initrd_start && initrd_end > initrd_start)
|
||||
goto sanitize;
|
||||
if (!initrd_start || initrd_end <= initrd_start) {
|
||||
#ifdef CONFIG_PROBE_INITRD_HEADER
|
||||
u32 *initrd_header;
|
||||
|
||||
/*
|
||||
* See if initrd has been added to the kernel image by
|
||||
* arch/mips/boot/addinitrd.c. In that case a header is
|
||||
* prepended to initrd and is made up by 8 bytes. The fisrt
|
||||
* word is a magic number and the second one is the size of
|
||||
* initrd. Initrd start must be page aligned in any cases.
|
||||
*/
|
||||
initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8;
|
||||
if (initrd_header[0] != 0x494E5244)
|
||||
/*
|
||||
* See if initrd has been added to the kernel image by
|
||||
* arch/mips/boot/addinitrd.c. In that case a header is
|
||||
* prepended to initrd and is made up by 8 bytes. The first
|
||||
* word is a magic number and the second one is the size of
|
||||
* initrd. Initrd start must be page aligned in any cases.
|
||||
*/
|
||||
initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8;
|
||||
if (initrd_header[0] != 0x494E5244)
|
||||
goto disable;
|
||||
initrd_start = (unsigned long)(initrd_header + 2);
|
||||
initrd_end = initrd_start + initrd_header[1];
|
||||
#else
|
||||
goto disable;
|
||||
initrd_start = (unsigned long)(initrd_header + 2);
|
||||
initrd_end = initrd_start + initrd_header[1];
|
||||
#endif
|
||||
}
|
||||
|
||||
sanitize:
|
||||
if (initrd_start & ~PAGE_MASK) {
|
||||
pr_err("initrd start must be page aligned\n");
|
||||
goto disable;
|
||||
|
|
|
@ -373,8 +373,8 @@ void __noreturn die(const char * str, const struct pt_regs * regs)
|
|||
do_exit(SIGSEGV);
|
||||
}
|
||||
|
||||
extern const struct exception_table_entry __start___dbe_table[];
|
||||
extern const struct exception_table_entry __stop___dbe_table[];
|
||||
extern struct exception_table_entry __start___dbe_table[];
|
||||
extern struct exception_table_entry __stop___dbe_table[];
|
||||
|
||||
__asm__(
|
||||
" .section __dbe_table, \"a\"\n"
|
||||
|
@ -1200,7 +1200,7 @@ void *set_except_vector(int n, void *addr)
|
|||
if (n == 0 && cpu_has_divec) {
|
||||
*(u32 *)(ebase + 0x200) = 0x08000000 |
|
||||
(0x03ffffff & (handler >> 2));
|
||||
flush_icache_range(ebase + 0x200, ebase + 0x204);
|
||||
local_flush_icache_range(ebase + 0x200, ebase + 0x204);
|
||||
}
|
||||
return (void *)old_handler;
|
||||
}
|
||||
|
@ -1283,7 +1283,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
|
|||
*w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff);
|
||||
w = (u32 *)(b + ori_offset);
|
||||
*w = (*w & 0xffff0000) | ((u32)handler & 0xffff);
|
||||
flush_icache_range((unsigned long)b, (unsigned long)(b+handler_len));
|
||||
local_flush_icache_range((unsigned long)b,
|
||||
(unsigned long)(b+handler_len));
|
||||
}
|
||||
else {
|
||||
/*
|
||||
|
@ -1295,7 +1296,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
|
|||
w = (u32 *)b;
|
||||
*w++ = 0x08000000 | (((u32)handler >> 2) & 0x03fffff); /* j handler */
|
||||
*w = 0;
|
||||
flush_icache_range((unsigned long)b, (unsigned long)(b+8));
|
||||
local_flush_icache_range((unsigned long)b,
|
||||
(unsigned long)(b+8));
|
||||
}
|
||||
|
||||
return (void *)old_handler;
|
||||
|
@ -1515,7 +1517,7 @@ void __cpuinit per_cpu_trap_init(void)
|
|||
void __init set_handler(unsigned long offset, void *addr, unsigned long size)
|
||||
{
|
||||
memcpy((void *)(ebase + offset), addr, size);
|
||||
flush_icache_range(ebase + offset, ebase + offset + size);
|
||||
local_flush_icache_range(ebase + offset, ebase + offset + size);
|
||||
}
|
||||
|
||||
static char panic_null_cerr[] __cpuinitdata =
|
||||
|
@ -1680,6 +1682,8 @@ void __init trap_init(void)
|
|||
signal32_init();
|
||||
#endif
|
||||
|
||||
flush_icache_range(ebase, ebase + 0x400);
|
||||
local_flush_icache_range(ebase, ebase + 0x400);
|
||||
flush_tlb_handlers();
|
||||
|
||||
sort_extable(__start___dbe_table, __stop___dbe_table);
|
||||
}
|
||||
|
|
|
@ -320,6 +320,7 @@ void __cpuinit r3k_cache_init(void)
|
|||
flush_cache_range = r3k_flush_cache_range;
|
||||
flush_cache_page = r3k_flush_cache_page;
|
||||
flush_icache_range = r3k_flush_icache_range;
|
||||
local_flush_icache_range = r3k_flush_icache_range;
|
||||
|
||||
flush_cache_sigtramp = r3k_flush_cache_sigtramp;
|
||||
local_flush_data_cache_page = local_r3k_flush_data_cache_page;
|
||||
|
|
|
@ -543,12 +543,8 @@ struct flush_icache_range_args {
|
|||
unsigned long end;
|
||||
};
|
||||
|
||||
static inline void local_r4k_flush_icache_range(void *args)
|
||||
static inline void local_r4k_flush_icache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
struct flush_icache_range_args *fir_args = args;
|
||||
unsigned long start = fir_args->start;
|
||||
unsigned long end = fir_args->end;
|
||||
|
||||
if (!cpu_has_ic_fills_f_dc) {
|
||||
if (end - start >= dcache_size) {
|
||||
r4k_blast_dcache();
|
||||
|
@ -564,6 +560,15 @@ static inline void local_r4k_flush_icache_range(void *args)
|
|||
protected_blast_icache_range(start, end);
|
||||
}
|
||||
|
||||
static inline void local_r4k_flush_icache_range_ipi(void *args)
|
||||
{
|
||||
struct flush_icache_range_args *fir_args = args;
|
||||
unsigned long start = fir_args->start;
|
||||
unsigned long end = fir_args->end;
|
||||
|
||||
local_r4k_flush_icache_range(start, end);
|
||||
}
|
||||
|
||||
static void r4k_flush_icache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
struct flush_icache_range_args args;
|
||||
|
@ -571,7 +576,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
|
|||
args.start = start;
|
||||
args.end = end;
|
||||
|
||||
r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_icache_range_ipi, &args, 1);
|
||||
instruction_hazard();
|
||||
}
|
||||
|
||||
|
@ -1375,6 +1380,7 @@ void __cpuinit r4k_cache_init(void)
|
|||
local_flush_data_cache_page = local_r4k_flush_data_cache_page;
|
||||
flush_data_cache_page = r4k_flush_data_cache_page;
|
||||
flush_icache_range = r4k_flush_icache_range;
|
||||
local_flush_icache_range = local_r4k_flush_icache_range;
|
||||
|
||||
#if defined(CONFIG_DMA_NONCOHERENT)
|
||||
if (coherentio) {
|
||||
|
|
|
@ -362,6 +362,7 @@ void __cpuinit tx39_cache_init(void)
|
|||
flush_cache_range = (void *) tx39h_flush_icache_all;
|
||||
flush_cache_page = (void *) tx39h_flush_icache_all;
|
||||
flush_icache_range = (void *) tx39h_flush_icache_all;
|
||||
local_flush_icache_range = (void *) tx39h_flush_icache_all;
|
||||
|
||||
flush_cache_sigtramp = (void *) tx39h_flush_icache_all;
|
||||
local_flush_data_cache_page = (void *) tx39h_flush_icache_all;
|
||||
|
@ -390,6 +391,7 @@ void __cpuinit tx39_cache_init(void)
|
|||
flush_cache_range = tx39_flush_cache_range;
|
||||
flush_cache_page = tx39_flush_cache_page;
|
||||
flush_icache_range = tx39_flush_icache_range;
|
||||
local_flush_icache_range = tx39_flush_icache_range;
|
||||
|
||||
flush_cache_sigtramp = tx39_flush_cache_sigtramp;
|
||||
local_flush_data_cache_page = local_tx39_flush_data_cache_page;
|
||||
|
|
|
@ -29,6 +29,7 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
|
|||
void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
|
||||
unsigned long pfn);
|
||||
void (*flush_icache_range)(unsigned long start, unsigned long end);
|
||||
void (*local_flush_icache_range)(unsigned long start, unsigned long end);
|
||||
|
||||
void (*__flush_cache_vmap)(void);
|
||||
void (*__flush_cache_vunmap)(void);
|
||||
|
|
|
@ -1273,10 +1273,10 @@ void __cpuinit build_tlb_refill_handler(void)
|
|||
|
||||
void __cpuinit flush_tlb_handlers(void)
|
||||
{
|
||||
flush_icache_range((unsigned long)handle_tlbl,
|
||||
local_flush_icache_range((unsigned long)handle_tlbl,
|
||||
(unsigned long)handle_tlbl + sizeof(handle_tlbl));
|
||||
flush_icache_range((unsigned long)handle_tlbs,
|
||||
local_flush_icache_range((unsigned long)handle_tlbs,
|
||||
(unsigned long)handle_tlbs + sizeof(handle_tlbs));
|
||||
flush_icache_range((unsigned long)handle_tlbm,
|
||||
local_flush_icache_range((unsigned long)handle_tlbm,
|
||||
(unsigned long)handle_tlbm + sizeof(handle_tlbm));
|
||||
}
|
||||
|
|
|
@ -150,7 +150,7 @@ static int __init sgiseeq_devinit(void)
|
|||
return res;
|
||||
|
||||
/* Second HPC is missing? */
|
||||
if (!ip22_is_fullhouse() ||
|
||||
if (ip22_is_fullhouse() ||
|
||||
get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]))
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -53,6 +53,7 @@ txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
|
|||
txx9_ce_res[i].name = txx9_ce_res_name[i];
|
||||
}
|
||||
|
||||
txx9_pcode = pcode;
|
||||
sprintf(txx9_pcode_str, "TX%x", pcode);
|
||||
if (base) {
|
||||
txx9_reg_res.start = base & 0xfffffffffULL;
|
||||
|
|
|
@ -47,7 +47,9 @@
|
|||
#include <linux/string.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/bug.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include <asm/sections.h>
|
||||
#include <asm/unwind.h>
|
||||
|
||||
#if 0
|
||||
|
@ -860,3 +862,15 @@ void module_arch_cleanup(struct module *mod)
|
|||
deregister_unwind_table(mod);
|
||||
module_bug_cleanup(mod);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
void *dereference_function_descriptor(void *ptr)
|
||||
{
|
||||
Elf64_Fdesc *desc = ptr;
|
||||
void *p;
|
||||
|
||||
if (!probe_kernel_address(&desc->addr, p))
|
||||
ptr = p;
|
||||
return ptr;
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -49,7 +49,7 @@ zlib := inffast.c inflate.c inftrees.c
|
|||
zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
|
||||
zliblinuxheader := zlib.h zconf.h zutil.h
|
||||
|
||||
$(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
|
||||
$(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \
|
||||
$(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
|
||||
|
||||
src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
|
||||
|
|
|
@ -16,6 +16,9 @@ static inline int in_kernel_text(unsigned long addr)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#undef dereference_function_descriptor
|
||||
void *dereference_function_descriptor(void *);
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
@ -21,8 +21,9 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/bug.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/module.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/firmware.h>
|
||||
#include <asm/code-patching.h>
|
||||
#include <linux/sort.h>
|
||||
|
@ -451,3 +452,13 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void *dereference_function_descriptor(void *ptr)
|
||||
{
|
||||
struct ppc64_opd_entry *desc = ptr;
|
||||
void *p;
|
||||
|
||||
if (!probe_kernel_address(&desc->funcaddr, p))
|
||||
ptr = p;
|
||||
return ptr;
|
||||
}
|
||||
|
|
|
@ -643,9 +643,10 @@ static struct spu *find_victim(struct spu_context *ctx)
|
|||
!(tmp->flags & SPU_CREATE_NOSCHED) &&
|
||||
(!victim || tmp->prio > victim->prio)) {
|
||||
victim = spu->ctx;
|
||||
get_spu_context(victim);
|
||||
}
|
||||
}
|
||||
if (victim)
|
||||
get_spu_context(victim);
|
||||
mutex_unlock(&cbe_spu_info[node].list_mutex);
|
||||
|
||||
if (victim) {
|
||||
|
@ -727,17 +728,33 @@ static void spu_schedule(struct spu *spu, struct spu_context *ctx)
|
|||
/* not a candidate for interruptible because it's called either
|
||||
from the scheduler thread or from spu_deactivate */
|
||||
mutex_lock(&ctx->state_mutex);
|
||||
__spu_schedule(spu, ctx);
|
||||
if (ctx->state == SPU_STATE_SAVED)
|
||||
__spu_schedule(spu, ctx);
|
||||
spu_release(ctx);
|
||||
}
|
||||
|
||||
static void spu_unschedule(struct spu *spu, struct spu_context *ctx)
|
||||
/**
|
||||
* spu_unschedule - remove a context from a spu, and possibly release it.
|
||||
* @spu: The SPU to unschedule from
|
||||
* @ctx: The context currently scheduled on the SPU
|
||||
* @free_spu Whether to free the SPU for other contexts
|
||||
*
|
||||
* Unbinds the context @ctx from the SPU @spu. If @free_spu is non-zero, the
|
||||
* SPU is made available for other contexts (ie, may be returned by
|
||||
* spu_get_idle). If this is zero, the caller is expected to schedule another
|
||||
* context to this spu.
|
||||
*
|
||||
* Should be called with ctx->state_mutex held.
|
||||
*/
|
||||
static void spu_unschedule(struct spu *spu, struct spu_context *ctx,
|
||||
int free_spu)
|
||||
{
|
||||
int node = spu->node;
|
||||
|
||||
mutex_lock(&cbe_spu_info[node].list_mutex);
|
||||
cbe_spu_info[node].nr_active--;
|
||||
spu->alloc_state = SPU_FREE;
|
||||
if (free_spu)
|
||||
spu->alloc_state = SPU_FREE;
|
||||
spu_unbind_context(spu, ctx);
|
||||
ctx->stats.invol_ctx_switch++;
|
||||
spu->stats.invol_ctx_switch++;
|
||||
|
@ -837,7 +854,7 @@ static int __spu_deactivate(struct spu_context *ctx, int force, int max_prio)
|
|||
if (spu) {
|
||||
new = grab_runnable_context(max_prio, spu->node);
|
||||
if (new || force) {
|
||||
spu_unschedule(spu, ctx);
|
||||
spu_unschedule(spu, ctx, new == NULL);
|
||||
if (new) {
|
||||
if (new->flags & SPU_CREATE_NOSCHED)
|
||||
wake_up(&new->stop_wq);
|
||||
|
@ -910,7 +927,7 @@ static noinline void spusched_tick(struct spu_context *ctx)
|
|||
|
||||
new = grab_runnable_context(ctx->prio + 1, spu->node);
|
||||
if (new) {
|
||||
spu_unschedule(spu, ctx);
|
||||
spu_unschedule(spu, ctx, 0);
|
||||
if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
|
||||
spu_add_to_rq(ctx);
|
||||
} else {
|
||||
|
|
|
@ -42,6 +42,7 @@ struct user_regs_struct32
|
|||
u32 gprs[NUM_GPRS];
|
||||
u32 acrs[NUM_ACRS];
|
||||
u32 orig_gpr2;
|
||||
/* nb: there's a 4-byte hole here */
|
||||
s390_fp_regs fp_regs;
|
||||
/*
|
||||
* These per registers are in here so that gdb can modify them
|
||||
|
|
|
@ -170,6 +170,13 @@ static unsigned long __peek_user(struct task_struct *child, addr_t addr)
|
|||
*/
|
||||
tmp = (addr_t) task_pt_regs(child)->orig_gpr2;
|
||||
|
||||
} else if (addr < (addr_t) &dummy->regs.fp_regs) {
|
||||
/*
|
||||
* prevent reads of padding hole between
|
||||
* orig_gpr2 and fp_regs on s390.
|
||||
*/
|
||||
tmp = 0;
|
||||
|
||||
} else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) {
|
||||
/*
|
||||
* floating point regs. are stored in the thread structure
|
||||
|
@ -270,6 +277,13 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
|
|||
*/
|
||||
task_pt_regs(child)->orig_gpr2 = data;
|
||||
|
||||
} else if (addr < (addr_t) &dummy->regs.fp_regs) {
|
||||
/*
|
||||
* prevent writes of padding hole between
|
||||
* orig_gpr2 and fp_regs on s390.
|
||||
*/
|
||||
return 0;
|
||||
|
||||
} else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) {
|
||||
/*
|
||||
* floating point regs. are stored in the thread structure
|
||||
|
@ -428,6 +442,13 @@ static u32 __peek_user_compat(struct task_struct *child, addr_t addr)
|
|||
*/
|
||||
tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4);
|
||||
|
||||
} else if (addr < (addr_t) &dummy32->regs.fp_regs) {
|
||||
/*
|
||||
* prevent reads of padding hole between
|
||||
* orig_gpr2 and fp_regs on s390.
|
||||
*/
|
||||
tmp = 0;
|
||||
|
||||
} else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) {
|
||||
/*
|
||||
* floating point regs. are stored in the thread structure
|
||||
|
@ -514,6 +535,13 @@ static int __poke_user_compat(struct task_struct *child,
|
|||
*/
|
||||
*(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp;
|
||||
|
||||
} else if (addr < (addr_t) &dummy32->regs.fp_regs) {
|
||||
/*
|
||||
* prevent writess of padding hole between
|
||||
* orig_gpr2 and fp_regs on s390.
|
||||
*/
|
||||
return 0;
|
||||
|
||||
} else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) {
|
||||
/*
|
||||
* floating point regs. are stored in the thread structure
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.26
|
||||
# Wed Jul 30 01:18:59 2008
|
||||
# Linux kernel version: 2.6.27-rc4
|
||||
# Tue Aug 26 14:21:17 2008
|
||||
#
|
||||
CONFIG_SUPERH=y
|
||||
CONFIG_SUPERH32=y
|
||||
|
@ -11,6 +11,7 @@ CONFIG_GENERIC_BUG=y
|
|||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
|
@ -20,7 +21,6 @@ CONFIG_LOCKDEP_SUPPORT=y
|
|||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_NO_VIRT_TO_BUS=y
|
||||
CONFIG_ARCH_SUPPORTS_AOUT=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
|
@ -58,7 +58,6 @@ CONFIG_SYSCTL=y
|
|||
CONFIG_EMBEDDED=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_KALLSYMS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
|
@ -89,6 +88,7 @@ CONFIG_HAVE_OPROFILE=y
|
|||
# CONFIG_USE_GENERIC_SMP_HELPERS is not set
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
|
@ -261,9 +261,10 @@ CONFIG_HZ_250=y
|
|||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
# CONFIG_SCHED_HRTICK is not set
|
||||
CONFIG_SCHED_HRTICK=y
|
||||
# CONFIG_KEXEC is not set
|
||||
# CONFIG_CRASH_DUMP is not set
|
||||
CONFIG_SECCOMP=y
|
||||
# CONFIG_PREEMPT_NONE is not set
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
CONFIG_PREEMPT=y
|
||||
|
@ -289,10 +290,6 @@ CONFIG_CMDLINE="console=tty1 console=ttySC5,38400 root=/dev/nfs ip=dhcp"
|
|||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
|
@ -647,6 +644,7 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
|
@ -690,7 +688,10 @@ CONFIG_DUMMY_CONSOLE=y
|
|||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_UIO is not set
|
||||
CONFIG_UIO=y
|
||||
# CONFIG_UIO_PDRV is not set
|
||||
CONFIG_UIO_PDRV_GENIRQ=y
|
||||
# CONFIG_UIO_SMX is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
|
@ -854,6 +855,7 @@ CONFIG_FRAME_WARN=1024
|
|||
# CONFIG_DEBUG_KERNEL is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_DEBUG_MEMORY_INIT is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_SAMPLES is not set
|
||||
# CONFIG_SH_STANDARD_BIOS is not set
|
||||
# CONFIG_EARLY_SCIF_CONSOLE is not set
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.26
|
||||
# Wed Jul 30 01:44:41 2008
|
||||
# Linux kernel version: 2.6.27-rc4
|
||||
# Tue Aug 26 14:18:17 2008
|
||||
#
|
||||
CONFIG_SUPERH=y
|
||||
CONFIG_SUPERH32=y
|
||||
|
@ -11,6 +11,7 @@ CONFIG_GENERIC_BUG=y
|
|||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
|
@ -21,7 +22,6 @@ CONFIG_LOCKDEP_SUPPORT=y
|
|||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_NO_VIRT_TO_BUS=y
|
||||
CONFIG_ARCH_SUPPORTS_AOUT=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
|
@ -87,6 +87,7 @@ CONFIG_HAVE_OPROFILE=y
|
|||
# CONFIG_USE_GENERIC_SMP_HELPERS is not set
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
|
@ -270,6 +271,7 @@ CONFIG_HZ=250
|
|||
# CONFIG_SCHED_HRTICK is not set
|
||||
# CONFIG_KEXEC is not set
|
||||
# CONFIG_CRASH_DUMP is not set
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
|
@ -294,10 +296,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on"
|
|||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
|
@ -649,6 +647,7 @@ CONFIG_HW_RANDOM=y
|
|||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
# CONFIG_I2C_CHARDEV is not set
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
|
@ -709,6 +708,7 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
|
@ -755,6 +755,8 @@ CONFIG_USB_ARCH_HAS_HCD=y
|
|||
# CONFIG_USB is not set
|
||||
# CONFIG_USB_OTG_WHITELIST is not set
|
||||
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
|
||||
# CONFIG_USB_MUSB_HDRC is not set
|
||||
# CONFIG_USB_GADGET_MUSB_HDRC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
|
@ -842,7 +844,10 @@ CONFIG_RTC_DRV_RS5C372=y
|
|||
#
|
||||
CONFIG_RTC_DRV_SH=y
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_UIO is not set
|
||||
CONFIG_UIO=y
|
||||
# CONFIG_UIO_PDRV is not set
|
||||
CONFIG_UIO_PDRV_GENIRQ=y
|
||||
# CONFIG_UIO_SMX is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
|
|
|
@ -76,4 +76,6 @@ extern long __put_user_asm_l(void *, long);
|
|||
extern long __put_user_asm_q(void *, long);
|
||||
extern void __put_user_unknown(void);
|
||||
|
||||
extern long __strnlen_user(const char *__s, long __n);
|
||||
|
||||
#endif /* __ASM_SH_UACCESS_64_H */
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* arch/sh/kernel/cpu/sh5/entry.S
|
||||
*
|
||||
* Copyright (C) 2000, 2001 Paolo Alberelli
|
||||
* Copyright (C) 2004 - 2007 Paul Mundt
|
||||
* Copyright (C) 2004 - 2008 Paul Mundt
|
||||
* Copyright (C) 2003, 2004 Richard Curnow
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
|
@ -923,6 +923,8 @@ ret_from_exception:
|
|||
blink tr0, ZERO
|
||||
|
||||
resume_kernel:
|
||||
CLI()
|
||||
|
||||
pta restore_all, tr0
|
||||
|
||||
getcon KCR0, r6
|
||||
|
@ -939,19 +941,11 @@ need_resched:
|
|||
andi r7, 0xf0, r7
|
||||
bne r7, ZERO, tr0
|
||||
|
||||
movi ((PREEMPT_ACTIVE >> 16) & 65535), r8
|
||||
shori (PREEMPT_ACTIVE & 65535), r8
|
||||
st.l r6, TI_PRE_COUNT, r8
|
||||
|
||||
STI()
|
||||
movi schedule, r7
|
||||
movi preempt_schedule_irq, r7
|
||||
ori r7, 1, r7
|
||||
ptabs r7, tr1
|
||||
blink tr1, LINK
|
||||
|
||||
st.l r6, TI_PRE_COUNT, ZERO
|
||||
CLI()
|
||||
|
||||
pta need_resched, tr1
|
||||
blink tr1, ZERO
|
||||
#endif
|
||||
|
|
|
@ -92,6 +92,7 @@ ENTRY(ret_from_irq)
|
|||
bra resume_userspace
|
||||
nop
|
||||
ENTRY(resume_kernel)
|
||||
cli
|
||||
mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count
|
||||
tst r0, r0
|
||||
bf noresched
|
||||
|
@ -105,28 +106,9 @@ need_resched:
|
|||
and #0xf0, r0 ! interrupts off (exception path)?
|
||||
cmp/eq #0xf0, r0
|
||||
bt noresched
|
||||
|
||||
mov.l 1f, r0
|
||||
mov.l r0, @(TI_PRE_COUNT,r8)
|
||||
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
mov.l 3f, r0
|
||||
jsr @r0
|
||||
jsr @r0 ! call preempt_schedule_irq
|
||||
nop
|
||||
#endif
|
||||
sti
|
||||
mov.l 2f, r0
|
||||
jsr @r0
|
||||
nop
|
||||
mov #0, r0
|
||||
mov.l r0, @(TI_PRE_COUNT,r8)
|
||||
cli
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
mov.l 4f, r0
|
||||
jsr @r0
|
||||
nop
|
||||
#endif
|
||||
|
||||
bra need_resched
|
||||
nop
|
||||
|
||||
|
@ -137,10 +119,7 @@ noresched:
|
|||
.align 2
|
||||
1: .long PREEMPT_ACTIVE
|
||||
2: .long schedule
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
3: .long trace_hardirqs_on
|
||||
4: .long trace_hardirqs_off
|
||||
#endif
|
||||
3: .long preempt_schedule_irq
|
||||
#endif
|
||||
|
||||
ENTRY(resume_userspace)
|
||||
|
|
|
@ -102,7 +102,7 @@ void machine_kexec(struct kimage *image)
|
|||
|
||||
/* now call it */
|
||||
rnk = (relocate_new_kernel_t) reboot_code_buffer;
|
||||
(*rnk)(page_list, reboot_code_buffer, image->start, vbr_reg);
|
||||
(*rnk)(page_list, reboot_code_buffer, P2SEGADDR(image->start), vbr_reg);
|
||||
}
|
||||
|
||||
void arch_crash_save_vmcoreinfo(void)
|
||||
|
|
|
@ -131,6 +131,8 @@ void user_enable_single_step(struct task_struct *child)
|
|||
|
||||
void user_disable_single_step(struct task_struct *child)
|
||||
{
|
||||
struct pt_regs *regs = child->thread.uregs;
|
||||
|
||||
regs->sr &= ~SR_SSTEP;
|
||||
}
|
||||
|
||||
|
|
|
@ -171,6 +171,7 @@ static void __init reserve_crashkernel(void)
|
|||
(unsigned long)(free_mem >> 20));
|
||||
crashk_res.start = crash_base;
|
||||
crashk_res.end = crash_base + crash_size - 1;
|
||||
insert_resource(&iomem_resource, &crashk_res);
|
||||
}
|
||||
}
|
||||
#else
|
||||
|
@ -204,11 +205,6 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
|
|||
request_resource(res, &data_resource);
|
||||
request_resource(res, &bss_resource);
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
if (crashk_res.start != crashk_res.end)
|
||||
request_resource(res, &crashk_res);
|
||||
#endif
|
||||
|
||||
add_active_range(nid, start_pfn, end_pfn);
|
||||
}
|
||||
|
||||
|
|
|
@ -170,7 +170,7 @@ asmlinkage int sys_ipc(uint call, int first, int second,
|
|||
version = call >> 16; /* hack for backward compatibility */
|
||||
call &= 0xffff;
|
||||
|
||||
if (call <= SEMCTL)
|
||||
if (call <= SEMTIMEDOP)
|
||||
switch (call) {
|
||||
case SEMOP:
|
||||
return sys_semtimedop(first,
|
||||
|
|
|
@ -101,7 +101,7 @@ static int __init memchunk_setup(char *str)
|
|||
}
|
||||
__setup("memchunk.", memchunk_setup);
|
||||
|
||||
static void memchunk_cmdline_override(char *name, unsigned long *sizep)
|
||||
static void __init memchunk_cmdline_override(char *name, unsigned long *sizep)
|
||||
{
|
||||
char *p = boot_command_line;
|
||||
int k = strlen(name);
|
||||
|
@ -118,8 +118,8 @@ static void memchunk_cmdline_override(char *name, unsigned long *sizep)
|
|||
}
|
||||
}
|
||||
|
||||
int platform_resource_setup_memory(struct platform_device *pdev,
|
||||
char *name, unsigned long memsize)
|
||||
int __init platform_resource_setup_memory(struct platform_device *pdev,
|
||||
char *name, unsigned long memsize)
|
||||
{
|
||||
struct resource *r;
|
||||
dma_addr_t dma_handle;
|
||||
|
|
|
@ -792,6 +792,8 @@ void fixup_irqs(void)
|
|||
}
|
||||
spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
|
||||
}
|
||||
|
||||
tick_ops->disable_irq();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -80,8 +80,6 @@ void smp_bogo(struct seq_file *m)
|
|||
i, cpu_data(i).clock_tick);
|
||||
}
|
||||
|
||||
static __cacheline_aligned_in_smp DEFINE_SPINLOCK(call_lock);
|
||||
|
||||
extern void setup_sparc64_timer(void);
|
||||
|
||||
static volatile unsigned long callin_flag = 0;
|
||||
|
@ -120,9 +118,9 @@ void __cpuinit smp_callin(void)
|
|||
while (!cpu_isset(cpuid, smp_commenced_mask))
|
||||
rmb();
|
||||
|
||||
spin_lock(&call_lock);
|
||||
ipi_call_lock();
|
||||
cpu_set(cpuid, cpu_online_map);
|
||||
spin_unlock(&call_lock);
|
||||
ipi_call_unlock();
|
||||
|
||||
/* idle thread is expected to have preempt disabled */
|
||||
preempt_disable();
|
||||
|
@ -1305,10 +1303,6 @@ int __cpu_disable(void)
|
|||
c->core_id = 0;
|
||||
c->proc_id = -1;
|
||||
|
||||
spin_lock(&call_lock);
|
||||
cpu_clear(cpu, cpu_online_map);
|
||||
spin_unlock(&call_lock);
|
||||
|
||||
smp_wmb();
|
||||
|
||||
/* Make sure no interrupts point to this cpu. */
|
||||
|
@ -1318,6 +1312,10 @@ int __cpu_disable(void)
|
|||
mdelay(1);
|
||||
local_irq_disable();
|
||||
|
||||
ipi_call_lock();
|
||||
cpu_clear(cpu, cpu_online_map);
|
||||
ipi_call_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -382,14 +382,17 @@ config X86_OOSTORE
|
|||
# P6_NOPs are a relatively minor optimization that require a family >=
|
||||
# 6 processor, except that it is broken on certain VIA chips.
|
||||
# Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
# (which work on all CPUs). As a result, disallow these if we're
|
||||
# compiling X86_GENERIC but not X86_64 (these NOPs do work on all
|
||||
# x86-64 capable chips); the list of processors in the right-hand clause
|
||||
# are the cores that benefit from this optimization.
|
||||
# (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
# does not understand them.
|
||||
#
|
||||
# As a result, disallow these if we're not compiling for X86_64 (these
|
||||
# NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
# the right-hand clause are the cores that benefit from this optimization.
|
||||
#
|
||||
config X86_P6_NOP
|
||||
def_bool y
|
||||
depends on (X86_64 || !X86_GENERIC) && (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || MPENTIUM4 || MPSC)
|
||||
depends on X86_64
|
||||
depends on (MCORE2 || MPENTIUM4 || MPSC)
|
||||
|
||||
config X86_TSC
|
||||
def_bool y
|
||||
|
|
|
@ -1206,7 +1206,7 @@ static int __init parse_memmap_opt(char *p)
|
|||
if (!p)
|
||||
return -EINVAL;
|
||||
|
||||
if (!strcmp(p, "exactmap")) {
|
||||
if (!strncmp(p, "exactmap", 8)) {
|
||||
#ifdef CONFIG_CRASH_DUMP
|
||||
/*
|
||||
* If we are doing a crash dump, we still need to know
|
||||
|
|
|
@ -210,8 +210,8 @@ static void hpet_legacy_clockevent_register(void)
|
|||
/* Calculate the min / max delta */
|
||||
hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
|
||||
&hpet_clockevent);
|
||||
hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
|
||||
&hpet_clockevent);
|
||||
/* 5 usec minimum reprogramming delta. */
|
||||
hpet_clockevent.min_delta_ns = 5000;
|
||||
|
||||
/*
|
||||
* Start hpet with the boot cpu mask and make it
|
||||
|
@ -270,15 +270,22 @@ static void hpet_legacy_set_mode(enum clock_event_mode mode,
|
|||
}
|
||||
|
||||
static int hpet_legacy_next_event(unsigned long delta,
|
||||
struct clock_event_device *evt)
|
||||
struct clock_event_device *evt)
|
||||
{
|
||||
unsigned long cnt;
|
||||
u32 cnt;
|
||||
|
||||
cnt = hpet_readl(HPET_COUNTER);
|
||||
cnt += delta;
|
||||
cnt += (u32) delta;
|
||||
hpet_writel(cnt, HPET_T0_CMP);
|
||||
|
||||
return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0;
|
||||
/*
|
||||
* We need to read back the CMP register to make sure that
|
||||
* what we wrote hit the chip before we compare it to the
|
||||
* counter.
|
||||
*/
|
||||
WARN_ON((u32)hpet_readl(HPET_T0_CMP) != cnt);
|
||||
|
||||
return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -92,6 +92,14 @@ static struct dmi_system_id __initdata io_delay_0xed_port_dmi_table[] = {
|
|||
DMI_MATCH(DMI_BOARD_NAME, "30BF")
|
||||
}
|
||||
},
|
||||
{
|
||||
.callback = dmi_io_delay_0xed_port,
|
||||
.ident = "Presario F700",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "30D3")
|
||||
}
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
@ -1354,7 +1354,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
|
|||
.ptep_modify_prot_commit = __ptep_modify_prot_commit,
|
||||
|
||||
.pte_val = xen_pte_val,
|
||||
.pte_flags = native_pte_val,
|
||||
.pte_flags = native_pte_flags,
|
||||
.pgd_val = xen_pgd_val,
|
||||
|
||||
.make_pte = xen_make_pte,
|
||||
|
|
|
@ -137,7 +137,8 @@ async_tx_run_dependencies(struct dma_async_tx_descriptor *tx)
|
|||
spin_lock_bh(&next->lock);
|
||||
next->parent = NULL;
|
||||
_next = next->next;
|
||||
next->next = NULL;
|
||||
if (_next && _next->chan == chan)
|
||||
next->next = NULL;
|
||||
spin_unlock_bh(&next->lock);
|
||||
|
||||
next->tx_submit(next);
|
||||
|
|
|
@ -35,8 +35,6 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
static const u32 camellia_sp1110[256] = {
|
||||
0x70707000,0x82828200,0x2c2c2c00,0xececec00,
|
||||
|
@ -337,6 +335,20 @@ static const u32 camellia_sp4404[256] = {
|
|||
/*
|
||||
* macros
|
||||
*/
|
||||
#define GETU32(v, pt) \
|
||||
do { \
|
||||
/* latest breed of gcc is clever enough to use move */ \
|
||||
memcpy(&(v), (pt), 4); \
|
||||
(v) = be32_to_cpu(v); \
|
||||
} while(0)
|
||||
|
||||
/* rotation right shift 1byte */
|
||||
#define ROR8(x) (((x) >> 8) + ((x) << 24))
|
||||
/* rotation left shift 1bit */
|
||||
#define ROL1(x) (((x) << 1) + ((x) >> 31))
|
||||
/* rotation left shift 1byte */
|
||||
#define ROL8(x) (((x) << 8) + ((x) >> 24))
|
||||
|
||||
#define ROLDQ(ll, lr, rl, rr, w0, w1, bits) \
|
||||
do { \
|
||||
w0 = ll; \
|
||||
|
@ -371,7 +383,7 @@ static const u32 camellia_sp4404[256] = {
|
|||
^ camellia_sp3033[(u8)(il >> 8)] \
|
||||
^ camellia_sp4404[(u8)(il )]; \
|
||||
yl ^= yr; \
|
||||
yr = ror32(yr, 8); \
|
||||
yr = ROR8(yr); \
|
||||
yr ^= yl; \
|
||||
} while(0)
|
||||
|
||||
|
@ -393,7 +405,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
subL[7] ^= subL[1]; subR[7] ^= subR[1];
|
||||
subL[1] ^= subR[1] & ~subR[9];
|
||||
dw = subL[1] & subL[9],
|
||||
subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl2) */
|
||||
subR[1] ^= ROL1(dw); /* modified for FLinv(kl2) */
|
||||
/* round 8 */
|
||||
subL[11] ^= subL[1]; subR[11] ^= subR[1];
|
||||
/* round 10 */
|
||||
|
@ -402,7 +414,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
subL[15] ^= subL[1]; subR[15] ^= subR[1];
|
||||
subL[1] ^= subR[1] & ~subR[17];
|
||||
dw = subL[1] & subL[17],
|
||||
subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl4) */
|
||||
subR[1] ^= ROL1(dw); /* modified for FLinv(kl4) */
|
||||
/* round 14 */
|
||||
subL[19] ^= subL[1]; subR[19] ^= subR[1];
|
||||
/* round 16 */
|
||||
|
@ -418,7 +430,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
} else {
|
||||
subL[1] ^= subR[1] & ~subR[25];
|
||||
dw = subL[1] & subL[25],
|
||||
subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl6) */
|
||||
subR[1] ^= ROL1(dw); /* modified for FLinv(kl6) */
|
||||
/* round 20 */
|
||||
subL[27] ^= subL[1]; subR[27] ^= subR[1];
|
||||
/* round 22 */
|
||||
|
@ -438,7 +450,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
subL[26] ^= kw4l; subR[26] ^= kw4r;
|
||||
kw4l ^= kw4r & ~subR[24];
|
||||
dw = kw4l & subL[24],
|
||||
kw4r ^= rol32(dw, 1); /* modified for FL(kl5) */
|
||||
kw4r ^= ROL1(dw); /* modified for FL(kl5) */
|
||||
}
|
||||
/* round 17 */
|
||||
subL[22] ^= kw4l; subR[22] ^= kw4r;
|
||||
|
@ -448,7 +460,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
subL[18] ^= kw4l; subR[18] ^= kw4r;
|
||||
kw4l ^= kw4r & ~subR[16];
|
||||
dw = kw4l & subL[16],
|
||||
kw4r ^= rol32(dw, 1); /* modified for FL(kl3) */
|
||||
kw4r ^= ROL1(dw); /* modified for FL(kl3) */
|
||||
/* round 11 */
|
||||
subL[14] ^= kw4l; subR[14] ^= kw4r;
|
||||
/* round 9 */
|
||||
|
@ -457,7 +469,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
subL[10] ^= kw4l; subR[10] ^= kw4r;
|
||||
kw4l ^= kw4r & ~subR[8];
|
||||
dw = kw4l & subL[8],
|
||||
kw4r ^= rol32(dw, 1); /* modified for FL(kl1) */
|
||||
kw4r ^= ROL1(dw); /* modified for FL(kl1) */
|
||||
/* round 5 */
|
||||
subL[6] ^= kw4l; subR[6] ^= kw4r;
|
||||
/* round 3 */
|
||||
|
@ -482,7 +494,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
SUBKEY_R(6) = subR[5] ^ subR[7];
|
||||
tl = subL[10] ^ (subR[10] & ~subR[8]);
|
||||
dw = tl & subL[8], /* FL(kl1) */
|
||||
tr = subR[10] ^ rol32(dw, 1);
|
||||
tr = subR[10] ^ ROL1(dw);
|
||||
SUBKEY_L(7) = subL[6] ^ tl; /* round 6 */
|
||||
SUBKEY_R(7) = subR[6] ^ tr;
|
||||
SUBKEY_L(8) = subL[8]; /* FL(kl1) */
|
||||
|
@ -491,7 +503,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
SUBKEY_R(9) = subR[9];
|
||||
tl = subL[7] ^ (subR[7] & ~subR[9]);
|
||||
dw = tl & subL[9], /* FLinv(kl2) */
|
||||
tr = subR[7] ^ rol32(dw, 1);
|
||||
tr = subR[7] ^ ROL1(dw);
|
||||
SUBKEY_L(10) = tl ^ subL[11]; /* round 7 */
|
||||
SUBKEY_R(10) = tr ^ subR[11];
|
||||
SUBKEY_L(11) = subL[10] ^ subL[12]; /* round 8 */
|
||||
|
@ -504,7 +516,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
SUBKEY_R(14) = subR[13] ^ subR[15];
|
||||
tl = subL[18] ^ (subR[18] & ~subR[16]);
|
||||
dw = tl & subL[16], /* FL(kl3) */
|
||||
tr = subR[18] ^ rol32(dw, 1);
|
||||
tr = subR[18] ^ ROL1(dw);
|
||||
SUBKEY_L(15) = subL[14] ^ tl; /* round 12 */
|
||||
SUBKEY_R(15) = subR[14] ^ tr;
|
||||
SUBKEY_L(16) = subL[16]; /* FL(kl3) */
|
||||
|
@ -513,7 +525,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
SUBKEY_R(17) = subR[17];
|
||||
tl = subL[15] ^ (subR[15] & ~subR[17]);
|
||||
dw = tl & subL[17], /* FLinv(kl4) */
|
||||
tr = subR[15] ^ rol32(dw, 1);
|
||||
tr = subR[15] ^ ROL1(dw);
|
||||
SUBKEY_L(18) = tl ^ subL[19]; /* round 13 */
|
||||
SUBKEY_R(18) = tr ^ subR[19];
|
||||
SUBKEY_L(19) = subL[18] ^ subL[20]; /* round 14 */
|
||||
|
@ -532,7 +544,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
} else {
|
||||
tl = subL[26] ^ (subR[26] & ~subR[24]);
|
||||
dw = tl & subL[24], /* FL(kl5) */
|
||||
tr = subR[26] ^ rol32(dw, 1);
|
||||
tr = subR[26] ^ ROL1(dw);
|
||||
SUBKEY_L(23) = subL[22] ^ tl; /* round 18 */
|
||||
SUBKEY_R(23) = subR[22] ^ tr;
|
||||
SUBKEY_L(24) = subL[24]; /* FL(kl5) */
|
||||
|
@ -541,7 +553,7 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
SUBKEY_R(25) = subR[25];
|
||||
tl = subL[23] ^ (subR[23] & ~subR[25]);
|
||||
dw = tl & subL[25], /* FLinv(kl6) */
|
||||
tr = subR[23] ^ rol32(dw, 1);
|
||||
tr = subR[23] ^ ROL1(dw);
|
||||
SUBKEY_L(26) = tl ^ subL[27]; /* round 19 */
|
||||
SUBKEY_R(26) = tr ^ subR[27];
|
||||
SUBKEY_L(27) = subL[26] ^ subL[28]; /* round 20 */
|
||||
|
@ -561,17 +573,17 @@ static void camellia_setup_tail(u32 *subkey, u32 *subL, u32 *subR, int max)
|
|||
/* apply the inverse of the last half of P-function */
|
||||
i = 2;
|
||||
do {
|
||||
dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = rol32(dw, 8);/* round 1 */
|
||||
dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = ROL8(dw);/* round 1 */
|
||||
SUBKEY_R(i + 0) = SUBKEY_L(i + 0) ^ dw; SUBKEY_L(i + 0) = dw;
|
||||
dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = rol32(dw, 8);/* round 2 */
|
||||
dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = ROL8(dw);/* round 2 */
|
||||
SUBKEY_R(i + 1) = SUBKEY_L(i + 1) ^ dw; SUBKEY_L(i + 1) = dw;
|
||||
dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = rol32(dw, 8);/* round 3 */
|
||||
dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = ROL8(dw);/* round 3 */
|
||||
SUBKEY_R(i + 2) = SUBKEY_L(i + 2) ^ dw; SUBKEY_L(i + 2) = dw;
|
||||
dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = rol32(dw, 8);/* round 4 */
|
||||
dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = ROL8(dw);/* round 4 */
|
||||
SUBKEY_R(i + 3) = SUBKEY_L(i + 3) ^ dw; SUBKEY_L(i + 3) = dw;
|
||||
dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = rol32(dw, 9);/* round 5 */
|
||||
dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = ROL8(dw);/* round 5 */
|
||||
SUBKEY_R(i + 4) = SUBKEY_L(i + 4) ^ dw; SUBKEY_L(i + 4) = dw;
|
||||
dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = rol32(dw, 8);/* round 6 */
|
||||
dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = ROL8(dw);/* round 6 */
|
||||
SUBKEY_R(i + 5) = SUBKEY_L(i + 5) ^ dw; SUBKEY_L(i + 5) = dw;
|
||||
i += 8;
|
||||
} while (i < max);
|
||||
|
@ -587,10 +599,10 @@ static void camellia_setup128(const unsigned char *key, u32 *subkey)
|
|||
/**
|
||||
* k == kll || klr || krl || krr (|| is concatenation)
|
||||
*/
|
||||
kll = get_unaligned_be32(key);
|
||||
klr = get_unaligned_be32(key + 4);
|
||||
krl = get_unaligned_be32(key + 8);
|
||||
krr = get_unaligned_be32(key + 12);
|
||||
GETU32(kll, key );
|
||||
GETU32(klr, key + 4);
|
||||
GETU32(krl, key + 8);
|
||||
GETU32(krr, key + 12);
|
||||
|
||||
/* generate KL dependent subkeys */
|
||||
/* kw1 */
|
||||
|
@ -695,14 +707,14 @@ static void camellia_setup256(const unsigned char *key, u32 *subkey)
|
|||
* key = (kll || klr || krl || krr || krll || krlr || krrl || krrr)
|
||||
* (|| is concatenation)
|
||||
*/
|
||||
kll = get_unaligned_be32(key);
|
||||
klr = get_unaligned_be32(key + 4);
|
||||
krl = get_unaligned_be32(key + 8);
|
||||
krr = get_unaligned_be32(key + 12);
|
||||
krll = get_unaligned_be32(key + 16);
|
||||
krlr = get_unaligned_be32(key + 20);
|
||||
krrl = get_unaligned_be32(key + 24);
|
||||
krrr = get_unaligned_be32(key + 28);
|
||||
GETU32(kll, key );
|
||||
GETU32(klr, key + 4);
|
||||
GETU32(krl, key + 8);
|
||||
GETU32(krr, key + 12);
|
||||
GETU32(krll, key + 16);
|
||||
GETU32(krlr, key + 20);
|
||||
GETU32(krrl, key + 24);
|
||||
GETU32(krrr, key + 28);
|
||||
|
||||
/* generate KL dependent subkeys */
|
||||
/* kw1 */
|
||||
|
@ -858,13 +870,13 @@ static void camellia_setup192(const unsigned char *key, u32 *subkey)
|
|||
t0 &= ll; \
|
||||
t2 |= rr; \
|
||||
rl ^= t2; \
|
||||
lr ^= rol32(t0, 1); \
|
||||
lr ^= ROL1(t0); \
|
||||
t3 = krl; \
|
||||
t1 = klr; \
|
||||
t3 &= rl; \
|
||||
t1 |= lr; \
|
||||
ll ^= t1; \
|
||||
rr ^= rol32(t3, 1); \
|
||||
rr ^= ROL1(t3); \
|
||||
} while(0)
|
||||
|
||||
#define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) \
|
||||
|
@ -880,7 +892,7 @@ static void camellia_setup192(const unsigned char *key, u32 *subkey)
|
|||
il ^= kl; \
|
||||
ir ^= il ^ kr; \
|
||||
yl ^= ir; \
|
||||
yr ^= ror32(il, 8) ^ ir; \
|
||||
yr ^= ROR8(il) ^ ir; \
|
||||
} while(0)
|
||||
|
||||
/* max = 24: 128bit encrypt, max = 32: 256bit encrypt */
|
||||
|
|
|
@ -496,7 +496,7 @@ acpi_ds_build_internal_package_obj(struct acpi_walk_state *walk_state,
|
|||
arg = arg->common.next;
|
||||
}
|
||||
|
||||
ACPI_ERROR((AE_INFO,
|
||||
ACPI_WARNING((AE_INFO,
|
||||
"Package List length (%X) larger than NumElements count (%X), truncated\n",
|
||||
i, element_count));
|
||||
} else if (i < element_count) {
|
||||
|
|
|
@ -71,7 +71,7 @@ static DEFINE_MUTEX(performance_mutex);
|
|||
* 1 -> ignore _PPC totally -> forced by user through boot param
|
||||
*/
|
||||
static int ignore_ppc = -1;
|
||||
module_param(ignore_ppc, uint, 0644);
|
||||
module_param(ignore_ppc, int, 0644);
|
||||
MODULE_PARM_DESC(ignore_ppc, "If the frequency of your machine gets wrongly" \
|
||||
"limited by BIOS, this should help");
|
||||
|
||||
|
|
|
@ -107,6 +107,13 @@ static int wait_transaction_complete(struct acpi_smb_hc *hc, int timeout)
|
|||
if (wait_event_timeout(hc->wait, smb_check_done(hc),
|
||||
msecs_to_jiffies(timeout)))
|
||||
return 0;
|
||||
/*
|
||||
* After the timeout happens, OS will try to check the status of SMbus.
|
||||
* If the status is what OS expected, it will be regarded as the bogus
|
||||
* timeout.
|
||||
*/
|
||||
if (smb_check_done(hc))
|
||||
return 0;
|
||||
else
|
||||
return -ETIME;
|
||||
}
|
||||
|
|
|
@ -300,6 +300,8 @@ int __init acpi_table_init(void)
|
|||
|
||||
static int __init acpi_parse_apic_instance(char *str)
|
||||
{
|
||||
if (!str)
|
||||
return -EINVAL;
|
||||
|
||||
acpi_apic_instance = simple_strtoul(str, NULL, 0);
|
||||
|
||||
|
|
|
@ -448,8 +448,10 @@ config PATA_MARVELL
|
|||
tristate "Marvell PATA support via legacy mode"
|
||||
depends on PCI
|
||||
help
|
||||
This option enables limited support for the Marvell 88SE6145 ATA
|
||||
controller.
|
||||
This option enables limited support for the Marvell 88SE61xx ATA
|
||||
controllers. If you wish to use only the SATA ports then select
|
||||
the AHCI driver alone. If you wish to the use the PATA port or
|
||||
both SATA and PATA include this driver.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
|
|
|
@ -420,7 +420,7 @@ static const struct ata_port_info ahci_port_info[] = {
|
|||
/* board_ahci_mv */
|
||||
{
|
||||
AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI |
|
||||
AHCI_HFLAG_MV_PATA),
|
||||
AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
|
||||
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
||||
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA,
|
||||
.pio_mask = 0x1f, /* pio0-4 */
|
||||
|
@ -487,7 +487,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
|
|||
{ PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
|
||||
{ PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */
|
||||
{ PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
|
||||
|
||||
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
|
||||
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
|
||||
|
@ -610,6 +612,15 @@ module_param(ahci_em_messages, int, 0444);
|
|||
MODULE_PARM_DESC(ahci_em_messages,
|
||||
"Set AHCI Enclosure Management Message type (0 = disabled, 1 = LED");
|
||||
|
||||
#if defined(CONFIG_PATA_MARVELL) || defined(CONFIG_PATA_MARVELL_MODULE)
|
||||
static int marvell_enable;
|
||||
#else
|
||||
static int marvell_enable = 1;
|
||||
#endif
|
||||
module_param(marvell_enable, int, 0644);
|
||||
MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
|
||||
|
||||
|
||||
static inline int ahci_nr_ports(u32 cap)
|
||||
{
|
||||
return (cap & 0x1f) + 1;
|
||||
|
@ -732,6 +743,8 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
|
|||
"MV_AHCI HACK: port_map %x -> %x\n",
|
||||
port_map,
|
||||
port_map & mv);
|
||||
dev_printk(KERN_ERR, &pdev->dev,
|
||||
"Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n");
|
||||
|
||||
port_map &= mv;
|
||||
}
|
||||
|
@ -2533,6 +2546,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
if (!printed_version++)
|
||||
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
|
||||
|
||||
/* The AHCI driver can only drive the SATA ports, the PATA driver
|
||||
can drive them all so if both drivers are selected make sure
|
||||
AHCI stays out of the way */
|
||||
if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
|
||||
return -ENODEV;
|
||||
|
||||
/* acquire resources */
|
||||
rc = pcim_enable_device(pdev);
|
||||
if (rc)
|
||||
|
|
|
@ -1315,11 +1315,6 @@ int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
|
|||
break;
|
||||
|
||||
case HSM_ST_ERR:
|
||||
/* make sure qc->err_mask is available to
|
||||
* know what's wrong and recover
|
||||
*/
|
||||
WARN_ON(!(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM)));
|
||||
|
||||
ap->hsm_task_state = HSM_ST_IDLE;
|
||||
|
||||
/* complete taskfile transaction */
|
||||
|
|
|
@ -20,7 +20,42 @@
|
|||
#include <linux/ata.h>
|
||||
|
||||
#define DRV_NAME "pata_marvell"
|
||||
#define DRV_VERSION "0.1.4"
|
||||
#define DRV_VERSION "0.1.6"
|
||||
|
||||
/**
|
||||
* marvell_pata_active - check if PATA is active
|
||||
* @pdev: PCI device
|
||||
*
|
||||
* Returns 1 if the PATA port may be active. We know how to check this
|
||||
* for the 6145 but not the other devices
|
||||
*/
|
||||
|
||||
static int marvell_pata_active(struct pci_dev *pdev)
|
||||
{
|
||||
int i;
|
||||
u32 devices;
|
||||
void __iomem *barp;
|
||||
|
||||
/* We don't yet know how to do this for other devices */
|
||||
if (pdev->device != 0x6145)
|
||||
return 1;
|
||||
|
||||
barp = pci_iomap(pdev, 5, 0x10);
|
||||
if (barp == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
printk("BAR5:");
|
||||
for(i = 0; i <= 0x0F; i++)
|
||||
printk("%02X:%02X ", i, ioread8(barp + i));
|
||||
printk("\n");
|
||||
|
||||
devices = ioread32(barp + 0x0C);
|
||||
pci_iounmap(pdev, barp);
|
||||
|
||||
if (devices & 0x10)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* marvell_pre_reset - check for 40/80 pin
|
||||
|
@ -34,26 +69,10 @@ static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
|
|||
{
|
||||
struct ata_port *ap = link->ap;
|
||||
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
||||
u32 devices;
|
||||
void __iomem *barp;
|
||||
int i;
|
||||
|
||||
/* Check if our port is enabled */
|
||||
|
||||
barp = pci_iomap(pdev, 5, 0x10);
|
||||
if (barp == NULL)
|
||||
return -ENOMEM;
|
||||
printk("BAR5:");
|
||||
for(i = 0; i <= 0x0F; i++)
|
||||
printk("%02X:%02X ", i, ioread8(barp + i));
|
||||
printk("\n");
|
||||
|
||||
devices = ioread32(barp + 0x0C);
|
||||
pci_iounmap(pdev, barp);
|
||||
|
||||
if ((pdev->device == 0x6145) && (ap->port_no == 0) &&
|
||||
(!(devices & 0x10))) /* PATA enable ? */
|
||||
return -ENOENT;
|
||||
if (pdev->device == 0x6145 && ap->port_no == 0 &&
|
||||
!marvell_pata_active(pdev)) /* PATA enable ? */
|
||||
return -ENOENT;
|
||||
|
||||
return ata_sff_prereset(link, deadline);
|
||||
}
|
||||
|
@ -128,6 +147,12 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
|
|||
if (pdev->device == 0x6101)
|
||||
ppi[1] = &ata_dummy_port_info;
|
||||
|
||||
#if defined(CONFIG_AHCI) || defined(CONFIG_AHCI_MODULE)
|
||||
if (!marvell_pata_active(pdev)) {
|
||||
printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL);
|
||||
}
|
||||
|
||||
|
|
|
@ -322,9 +322,6 @@ static int __devinit sil680_init_one(struct pci_dev *pdev,
|
|||
/* Try to acquire MMIO resources and fallback to PIO if
|
||||
* that fails
|
||||
*/
|
||||
rc = pcim_enable_device(pdev);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = pcim_iomap_regions(pdev, 1 << SIL680_MMIO_BAR, DRV_NAME);
|
||||
if (rc)
|
||||
goto use_ioports;
|
||||
|
|
|
@ -667,7 +667,8 @@ static const struct pci_device_id mv_pci_tbl[] = {
|
|||
{ PCI_VDEVICE(MARVELL, 0x5041), chip_504x },
|
||||
{ PCI_VDEVICE(MARVELL, 0x5080), chip_5080 },
|
||||
{ PCI_VDEVICE(MARVELL, 0x5081), chip_508x },
|
||||
/* RocketRAID 1740/174x have different identifiers */
|
||||
/* RocketRAID 1720/174x have different identifiers */
|
||||
{ PCI_VDEVICE(TTI, 0x1720), chip_6042 },
|
||||
{ PCI_VDEVICE(TTI, 0x1740), chip_508x },
|
||||
{ PCI_VDEVICE(TTI, 0x1742), chip_508x },
|
||||
|
||||
|
|
|
@ -309,8 +309,6 @@ static void nv_nf2_freeze(struct ata_port *ap);
|
|||
static void nv_nf2_thaw(struct ata_port *ap);
|
||||
static void nv_ck804_freeze(struct ata_port *ap);
|
||||
static void nv_ck804_thaw(struct ata_port *ap);
|
||||
static int nv_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
||||
static int nv_adma_slave_config(struct scsi_device *sdev);
|
||||
static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc);
|
||||
static void nv_adma_qc_prep(struct ata_queued_cmd *qc);
|
||||
|
@ -407,7 +405,7 @@ static struct scsi_host_template nv_swncq_sht = {
|
|||
|
||||
static struct ata_port_operations nv_generic_ops = {
|
||||
.inherits = &ata_bmdma_port_ops,
|
||||
.hardreset = nv_hardreset,
|
||||
.hardreset = ATA_OP_NULL,
|
||||
.scr_read = nv_scr_read,
|
||||
.scr_write = nv_scr_write,
|
||||
};
|
||||
|
@ -1588,21 +1586,6 @@ static void nv_mcp55_thaw(struct ata_port *ap)
|
|||
ata_sff_thaw(ap);
|
||||
}
|
||||
|
||||
static int nv_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
int rc;
|
||||
|
||||
/* SATA hardreset fails to retrieve proper device signature on
|
||||
* some controllers. Request follow up SRST. For more info,
|
||||
* see http://bugzilla.kernel.org/show_bug.cgi?id=3352
|
||||
*/
|
||||
rc = sata_sff_hardreset(link, class, deadline);
|
||||
if (rc)
|
||||
return rc;
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
static void nv_adma_error_handler(struct ata_port *ap)
|
||||
{
|
||||
struct nv_adma_port_priv *pp = ap->private_data;
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/errno.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
/*
|
||||
|
@ -151,13 +152,13 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,
|
|||
*/
|
||||
static int verify_pmtmr_rate(void)
|
||||
{
|
||||
u32 value1, value2;
|
||||
cycle_t value1, value2;
|
||||
unsigned long count, delta;
|
||||
|
||||
mach_prepare_counter();
|
||||
value1 = read_pmtmr();
|
||||
value1 = clocksource_acpi_pm.read();
|
||||
mach_countup(&count);
|
||||
value2 = read_pmtmr();
|
||||
value2 = clocksource_acpi_pm.read();
|
||||
delta = (value2 - value1) & ACPI_PM_MASK;
|
||||
|
||||
/* Check that the PMTMR delta is within 5% of what we expect */
|
||||
|
@ -175,10 +176,13 @@ static int verify_pmtmr_rate(void)
|
|||
#define verify_pmtmr_rate() (0)
|
||||
#endif
|
||||
|
||||
/* Number of monotonicity checks to perform during initialization */
|
||||
#define ACPI_PM_MONOTONICITY_CHECKS 10
|
||||
|
||||
static int __init init_acpi_pm_clocksource(void)
|
||||
{
|
||||
u32 value1, value2;
|
||||
unsigned int i;
|
||||
cycle_t value1, value2;
|
||||
unsigned int i, j, good = 0;
|
||||
|
||||
if (!pmtmr_ioport)
|
||||
return -ENODEV;
|
||||
|
@ -187,24 +191,32 @@ static int __init init_acpi_pm_clocksource(void)
|
|||
clocksource_acpi_pm.shift);
|
||||
|
||||
/* "verify" this timing source: */
|
||||
value1 = read_pmtmr();
|
||||
for (i = 0; i < 10000; i++) {
|
||||
value2 = read_pmtmr();
|
||||
if (value2 == value1)
|
||||
continue;
|
||||
if (value2 > value1)
|
||||
goto pm_good;
|
||||
if ((value2 < value1) && ((value2) < 0xFFF))
|
||||
goto pm_good;
|
||||
printk(KERN_INFO "PM-Timer had inconsistent results:"
|
||||
" 0x%#x, 0x%#x - aborting.\n", value1, value2);
|
||||
return -EINVAL;
|
||||
for (j = 0; j < ACPI_PM_MONOTONICITY_CHECKS; j++) {
|
||||
value1 = clocksource_acpi_pm.read();
|
||||
for (i = 0; i < 10000; i++) {
|
||||
value2 = clocksource_acpi_pm.read();
|
||||
if (value2 == value1)
|
||||
continue;
|
||||
if (value2 > value1)
|
||||
good++;
|
||||
break;
|
||||
if ((value2 < value1) && ((value2) < 0xFFF))
|
||||
good++;
|
||||
break;
|
||||
printk(KERN_INFO "PM-Timer had inconsistent results:"
|
||||
" 0x%#llx, 0x%#llx - aborting.\n",
|
||||
value1, value2);
|
||||
return -EINVAL;
|
||||
}
|
||||
udelay(300 * i);
|
||||
}
|
||||
|
||||
if (good != ACPI_PM_MONOTONICITY_CHECKS) {
|
||||
printk(KERN_INFO "PM-Timer failed consistency check "
|
||||
" (0x%#llx) - aborting.\n", value1);
|
||||
return -ENODEV;
|
||||
}
|
||||
printk(KERN_INFO "PM-Timer had no reasonable result:"
|
||||
" 0x%#x - aborting.\n", value1);
|
||||
return -ENODEV;
|
||||
|
||||
pm_good:
|
||||
if (verify_pmtmr_rate() != 0)
|
||||
return -ENODEV;
|
||||
|
||||
|
|
|
@ -31,13 +31,84 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
/* Transmit operation: */
|
||||
/* */
|
||||
/* 0 byte transmit */
|
||||
/* BUS: S A8 ACK P */
|
||||
/* IRQ: DTE WAIT */
|
||||
/* ICIC: */
|
||||
/* ICCR: 0x94 0x90 */
|
||||
/* ICDR: A8 */
|
||||
/* */
|
||||
/* 1 byte transmit */
|
||||
/* BUS: S A8 ACK D8(1) ACK P */
|
||||
/* IRQ: DTE WAIT WAIT */
|
||||
/* ICIC: -DTE */
|
||||
/* ICCR: 0x94 0x90 */
|
||||
/* ICDR: A8 D8(1) */
|
||||
/* */
|
||||
/* 2 byte transmit */
|
||||
/* BUS: S A8 ACK D8(1) ACK D8(2) ACK P */
|
||||
/* IRQ: DTE WAIT WAIT WAIT */
|
||||
/* ICIC: -DTE */
|
||||
/* ICCR: 0x94 0x90 */
|
||||
/* ICDR: A8 D8(1) D8(2) */
|
||||
/* */
|
||||
/* 3 bytes or more, +---------+ gets repeated */
|
||||
/* */
|
||||
/* */
|
||||
/* Receive operation: */
|
||||
/* */
|
||||
/* 0 byte receive - not supported since slave may hold SDA low */
|
||||
/* */
|
||||
/* 1 byte receive [TX] | [RX] */
|
||||
/* BUS: S A8 ACK | D8(1) ACK P */
|
||||
/* IRQ: DTE WAIT | WAIT DTE */
|
||||
/* ICIC: -DTE | +DTE */
|
||||
/* ICCR: 0x94 0x81 | 0xc0 */
|
||||
/* ICDR: A8 | D8(1) */
|
||||
/* */
|
||||
/* 2 byte receive [TX]| [RX] */
|
||||
/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK P */
|
||||
/* IRQ: DTE WAIT | WAIT WAIT DTE */
|
||||
/* ICIC: -DTE | +DTE */
|
||||
/* ICCR: 0x94 0x81 | 0xc0 */
|
||||
/* ICDR: A8 | D8(1) D8(2) */
|
||||
/* */
|
||||
/* 3 byte receive [TX] | [RX] */
|
||||
/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK D8(3) ACK P */
|
||||
/* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */
|
||||
/* ICIC: -DTE | +DTE */
|
||||
/* ICCR: 0x94 0x81 | 0xc0 */
|
||||
/* ICDR: A8 | D8(1) D8(2) D8(3) */
|
||||
/* */
|
||||
/* 4 bytes or more, this part is repeated +---------+ */
|
||||
/* */
|
||||
/* */
|
||||
/* Interrupt order and BUSY flag */
|
||||
/* ___ _ */
|
||||
/* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/ */
|
||||
/* SCL \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/ */
|
||||
/* */
|
||||
/* S D7 D6 D5 D4 D3 D2 D1 D0 P */
|
||||
/* ___ */
|
||||
/* WAIT IRQ ________________________________/ \___________ */
|
||||
/* TACK IRQ ____________________________________/ \_______ */
|
||||
/* DTE IRQ __________________________________________/ \_ */
|
||||
/* AL IRQ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
|
||||
/* _______________________________________________ */
|
||||
/* BUSY __/ \_ */
|
||||
/* */
|
||||
|
||||
enum sh_mobile_i2c_op {
|
||||
OP_START = 0,
|
||||
OP_TX_ONLY,
|
||||
OP_TX_FIRST,
|
||||
OP_TX,
|
||||
OP_TX_STOP,
|
||||
OP_TX_TO_RX,
|
||||
OP_RX_ONLY,
|
||||
OP_RX,
|
||||
OP_RX_STOP,
|
||||
OP_RX_STOP_DATA,
|
||||
};
|
||||
|
||||
struct sh_mobile_i2c_data {
|
||||
|
@ -127,25 +198,34 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
|
|||
spin_lock_irqsave(&pd->lock, flags);
|
||||
|
||||
switch (op) {
|
||||
case OP_START:
|
||||
case OP_START: /* issue start and trigger DTE interrupt */
|
||||
iowrite8(0x94, ICCR(pd));
|
||||
break;
|
||||
case OP_TX_ONLY:
|
||||
case OP_TX_FIRST: /* disable DTE interrupt and write data */
|
||||
iowrite8(ICIC_WAITE | ICIC_ALE | ICIC_TACKE, ICIC(pd));
|
||||
iowrite8(data, ICDR(pd));
|
||||
break;
|
||||
case OP_TX_STOP:
|
||||
case OP_TX: /* write data */
|
||||
iowrite8(data, ICDR(pd));
|
||||
break;
|
||||
case OP_TX_STOP: /* write data and issue a stop afterwards */
|
||||
iowrite8(data, ICDR(pd));
|
||||
iowrite8(0x90, ICCR(pd));
|
||||
iowrite8(ICIC_ALE | ICIC_TACKE, ICIC(pd));
|
||||
break;
|
||||
case OP_TX_TO_RX:
|
||||
iowrite8(data, ICDR(pd));
|
||||
case OP_TX_TO_RX: /* select read mode */
|
||||
iowrite8(0x81, ICCR(pd));
|
||||
break;
|
||||
case OP_RX_ONLY:
|
||||
case OP_RX: /* just read data */
|
||||
ret = ioread8(ICDR(pd));
|
||||
break;
|
||||
case OP_RX_STOP:
|
||||
case OP_RX_STOP: /* enable DTE interrupt, issue stop */
|
||||
iowrite8(ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE,
|
||||
ICIC(pd));
|
||||
iowrite8(0xc0, ICCR(pd));
|
||||
break;
|
||||
case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
|
||||
iowrite8(ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE,
|
||||
ICIC(pd));
|
||||
ret = ioread8(ICDR(pd));
|
||||
iowrite8(0xc0, ICCR(pd));
|
||||
break;
|
||||
|
@ -157,58 +237,120 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
|
||||
{
|
||||
if (pd->pos == -1)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
|
||||
{
|
||||
if (pd->pos == (pd->msg->len - 1))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
|
||||
unsigned char *buf)
|
||||
{
|
||||
switch (pd->pos) {
|
||||
case -1:
|
||||
*buf = (pd->msg->addr & 0x7f) << 1;
|
||||
*buf |= (pd->msg->flags & I2C_M_RD) ? 1 : 0;
|
||||
break;
|
||||
default:
|
||||
*buf = pd->msg->buf[pd->pos];
|
||||
}
|
||||
}
|
||||
|
||||
static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd)
|
||||
{
|
||||
unsigned char data;
|
||||
|
||||
if (pd->pos == pd->msg->len)
|
||||
return 1;
|
||||
|
||||
sh_mobile_i2c_get_data(pd, &data);
|
||||
|
||||
if (sh_mobile_i2c_is_last_byte(pd))
|
||||
i2c_op(pd, OP_TX_STOP, data);
|
||||
else if (sh_mobile_i2c_is_first_byte(pd))
|
||||
i2c_op(pd, OP_TX_FIRST, data);
|
||||
else
|
||||
i2c_op(pd, OP_TX, data);
|
||||
|
||||
pd->pos++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd)
|
||||
{
|
||||
unsigned char data;
|
||||
int real_pos;
|
||||
|
||||
do {
|
||||
if (pd->pos <= -1) {
|
||||
sh_mobile_i2c_get_data(pd, &data);
|
||||
|
||||
if (sh_mobile_i2c_is_first_byte(pd))
|
||||
i2c_op(pd, OP_TX_FIRST, data);
|
||||
else
|
||||
i2c_op(pd, OP_TX, data);
|
||||
break;
|
||||
}
|
||||
|
||||
if (pd->pos == 0) {
|
||||
i2c_op(pd, OP_TX_TO_RX, 0);
|
||||
break;
|
||||
}
|
||||
|
||||
real_pos = pd->pos - 2;
|
||||
|
||||
if (pd->pos == pd->msg->len) {
|
||||
if (real_pos < 0) {
|
||||
i2c_op(pd, OP_RX_STOP, 0);
|
||||
break;
|
||||
}
|
||||
data = i2c_op(pd, OP_RX_STOP_DATA, 0);
|
||||
} else
|
||||
data = i2c_op(pd, OP_RX, 0);
|
||||
|
||||
pd->msg->buf[real_pos] = data;
|
||||
} while (0);
|
||||
|
||||
pd->pos++;
|
||||
return pd->pos == (pd->msg->len + 2);
|
||||
}
|
||||
|
||||
static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
|
||||
{
|
||||
struct platform_device *dev = dev_id;
|
||||
struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
|
||||
struct i2c_msg *msg = pd->msg;
|
||||
unsigned char data, sr;
|
||||
int wakeup = 0;
|
||||
unsigned char sr;
|
||||
int wakeup;
|
||||
|
||||
sr = ioread8(ICSR(pd));
|
||||
pd->sr |= sr;
|
||||
pd->sr |= sr; /* remember state */
|
||||
|
||||
dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
|
||||
(msg->flags & I2C_M_RD) ? "read" : "write",
|
||||
pd->pos, msg->len);
|
||||
(pd->msg->flags & I2C_M_RD) ? "read" : "write",
|
||||
pd->pos, pd->msg->len);
|
||||
|
||||
if (sr & (ICSR_AL | ICSR_TACK)) {
|
||||
iowrite8(0, ICIC(pd)); /* disable interrupts */
|
||||
wakeup = 1;
|
||||
goto do_wakeup;
|
||||
}
|
||||
/* don't interrupt transaction - continue to issue stop */
|
||||
iowrite8(sr & ~(ICSR_AL | ICSR_TACK), ICSR(pd));
|
||||
wakeup = 0;
|
||||
} else if (pd->msg->flags & I2C_M_RD)
|
||||
wakeup = sh_mobile_i2c_isr_rx(pd);
|
||||
else
|
||||
wakeup = sh_mobile_i2c_isr_tx(pd);
|
||||
|
||||
if (pd->pos == msg->len) {
|
||||
i2c_op(pd, OP_RX_ONLY, 0);
|
||||
wakeup = 1;
|
||||
goto do_wakeup;
|
||||
}
|
||||
if (sr & ICSR_WAIT) /* TODO: add delay here to support slow acks */
|
||||
iowrite8(sr & ~ICSR_WAIT, ICSR(pd));
|
||||
|
||||
if (pd->pos == -1) {
|
||||
data = (msg->addr & 0x7f) << 1;
|
||||
data |= (msg->flags & I2C_M_RD) ? 1 : 0;
|
||||
} else
|
||||
data = msg->buf[pd->pos];
|
||||
|
||||
if ((pd->pos == -1) || !(msg->flags & I2C_M_RD)) {
|
||||
if (msg->flags & I2C_M_RD)
|
||||
i2c_op(pd, OP_TX_TO_RX, data);
|
||||
else if (pd->pos == (msg->len - 1)) {
|
||||
i2c_op(pd, OP_TX_STOP, data);
|
||||
wakeup = 1;
|
||||
} else
|
||||
i2c_op(pd, OP_TX_ONLY, data);
|
||||
} else {
|
||||
if (pd->pos == (msg->len - 1))
|
||||
data = i2c_op(pd, OP_RX_STOP, 0);
|
||||
else
|
||||
data = i2c_op(pd, OP_RX_ONLY, 0);
|
||||
|
||||
msg->buf[pd->pos] = data;
|
||||
}
|
||||
pd->pos++;
|
||||
|
||||
do_wakeup:
|
||||
if (wakeup) {
|
||||
pd->sr |= SW_DONE;
|
||||
wake_up(&pd->wait);
|
||||
|
@ -219,6 +361,11 @@ static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
|
|||
|
||||
static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
|
||||
{
|
||||
if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
|
||||
dev_err(pd->dev, "Unsupported zero length i2c read\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* Initialize channel registers */
|
||||
iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
|
||||
|
||||
|
@ -233,9 +380,8 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
|
|||
pd->pos = -1;
|
||||
pd->sr = 0;
|
||||
|
||||
/* Enable all interrupts except wait */
|
||||
iowrite8(ioread8(ICIC(pd)) | ICIC_ALE | ICIC_TACKE | ICIC_DTEE,
|
||||
ICIC(pd));
|
||||
/* Enable all interrupts to begin with */
|
||||
iowrite8(ICIC_WAITE | ICIC_ALE | ICIC_TACKE | ICIC_DTEE, ICIC(pd));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -268,25 +414,18 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
|
|||
if (!k)
|
||||
dev_err(pd->dev, "Transfer request timed out\n");
|
||||
|
||||
retry_count = 10;
|
||||
retry_count = 1000;
|
||||
again:
|
||||
val = ioread8(ICSR(pd));
|
||||
|
||||
dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
|
||||
|
||||
if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
|
||||
err = -EIO;
|
||||
break;
|
||||
}
|
||||
|
||||
/* the interrupt handler may wake us up before the
|
||||
* transfer is finished, so poll the hardware
|
||||
* until we're done.
|
||||
*/
|
||||
|
||||
if (!(!(val & ICSR_BUSY) && (val & ICSR_SCLM) &&
|
||||
(val & ICSR_SDAM))) {
|
||||
msleep(1);
|
||||
if (val & ICSR_BUSY) {
|
||||
udelay(10);
|
||||
if (retry_count--)
|
||||
goto again;
|
||||
|
||||
|
@ -294,6 +433,12 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
|
|||
dev_err(pd->dev, "Polling timed out\n");
|
||||
break;
|
||||
}
|
||||
|
||||
/* handle missing acknowledge and arbitration lost */
|
||||
if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
|
||||
err = -EIO;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
deactivate_ch(pd);
|
||||
|
|
|
@ -63,7 +63,7 @@
|
|||
}
|
||||
|
||||
/* table of devices that work with this driver */
|
||||
static const struct usb_device_id bcm5974_table [] = {
|
||||
static const struct usb_device_id bcm5974_table[] = {
|
||||
/* MacbookAir1.1 */
|
||||
BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING_ANSI),
|
||||
BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING_ISO),
|
||||
|
@ -105,7 +105,7 @@ struct tp_header {
|
|||
|
||||
/* trackpad finger structure */
|
||||
struct tp_finger {
|
||||
__le16 origin; /* left/right origin? */
|
||||
__le16 origin; /* zero when switching track finger */
|
||||
__le16 abs_x; /* absolute x coodinate */
|
||||
__le16 abs_y; /* absolute y coodinate */
|
||||
__le16 rel_x; /* relative x coodinate */
|
||||
|
@ -159,6 +159,7 @@ struct bcm5974 {
|
|||
struct bt_data *bt_data; /* button transferred data */
|
||||
struct urb *tp_urb; /* trackpad usb request block */
|
||||
struct tp_data *tp_data; /* trackpad transferred data */
|
||||
int fingers; /* number of fingers on trackpad */
|
||||
};
|
||||
|
||||
/* logical dimensions */
|
||||
|
@ -172,6 +173,10 @@ struct bcm5974 {
|
|||
#define SN_WIDTH 100 /* width signal-to-noise ratio */
|
||||
#define SN_COORD 250 /* coordinate signal-to-noise ratio */
|
||||
|
||||
/* pressure thresholds */
|
||||
#define PRESSURE_LOW (2 * DIM_PRESSURE / SN_PRESSURE)
|
||||
#define PRESSURE_HIGH (3 * PRESSURE_LOW)
|
||||
|
||||
/* device constants */
|
||||
static const struct bcm5974_config bcm5974_config_table[] = {
|
||||
{
|
||||
|
@ -248,6 +253,7 @@ static void setup_events_to_report(struct input_dev *input_dev,
|
|||
0, cfg->y.dim, cfg->y.fuzz, 0);
|
||||
|
||||
__set_bit(EV_KEY, input_dev->evbit);
|
||||
__set_bit(BTN_TOUCH, input_dev->keybit);
|
||||
__set_bit(BTN_TOOL_FINGER, input_dev->keybit);
|
||||
__set_bit(BTN_TOOL_DOUBLETAP, input_dev->keybit);
|
||||
__set_bit(BTN_TOOL_TRIPLETAP, input_dev->keybit);
|
||||
|
@ -273,32 +279,66 @@ static int report_tp_state(struct bcm5974 *dev, int size)
|
|||
const struct tp_finger *f = dev->tp_data->finger;
|
||||
struct input_dev *input = dev->input;
|
||||
const int fingers = (size - 26) / 28;
|
||||
int p = 0, w, x, y, n = 0;
|
||||
int raw_p, raw_w, raw_x, raw_y;
|
||||
int ptest = 0, origin = 0, nmin = 0, nmax = 0;
|
||||
int abs_p = 0, abs_w = 0, abs_x = 0, abs_y = 0;
|
||||
|
||||
if (size < 26 || (size - 26) % 28 != 0)
|
||||
return -EIO;
|
||||
|
||||
/* always track the first finger; when detached, start over */
|
||||
if (fingers) {
|
||||
p = raw2int(f->force_major);
|
||||
w = raw2int(f->size_major);
|
||||
x = raw2int(f->abs_x);
|
||||
y = raw2int(f->abs_y);
|
||||
n = p > 0 ? fingers : 0;
|
||||
raw_p = raw2int(f->force_major);
|
||||
raw_w = raw2int(f->size_major);
|
||||
raw_x = raw2int(f->abs_x);
|
||||
raw_y = raw2int(f->abs_y);
|
||||
|
||||
dprintk(9,
|
||||
"bcm5974: p: %+05d w: %+05d x: %+05d y: %+05d n: %d\n",
|
||||
p, w, x, y, n);
|
||||
"bcm5974: raw: p: %+05d w: %+05d x: %+05d y: %+05d\n",
|
||||
raw_p, raw_w, raw_x, raw_y);
|
||||
|
||||
input_report_abs(input, ABS_TOOL_WIDTH, int2bound(&c->w, w));
|
||||
input_report_abs(input, ABS_X, int2bound(&c->x, x - c->x.devmin));
|
||||
input_report_abs(input, ABS_Y, int2bound(&c->y, c->y.devmax - y));
|
||||
ptest = int2bound(&c->p, raw_p);
|
||||
origin = raw2int(f->origin);
|
||||
}
|
||||
|
||||
input_report_abs(input, ABS_PRESSURE, int2bound(&c->p, p));
|
||||
/* while tracking finger still valid, count all fingers */
|
||||
if (ptest > PRESSURE_LOW && origin) {
|
||||
abs_p = ptest;
|
||||
abs_w = int2bound(&c->w, raw_w);
|
||||
abs_x = int2bound(&c->x, raw_x - c->x.devmin);
|
||||
abs_y = int2bound(&c->y, c->y.devmax - raw_y);
|
||||
for (; f != dev->tp_data->finger + fingers; f++) {
|
||||
ptest = int2bound(&c->p, raw2int(f->force_major));
|
||||
if (ptest > PRESSURE_LOW)
|
||||
nmax++;
|
||||
if (ptest > PRESSURE_HIGH)
|
||||
nmin++;
|
||||
}
|
||||
}
|
||||
|
||||
input_report_key(input, BTN_TOOL_FINGER, n == 1);
|
||||
input_report_key(input, BTN_TOOL_DOUBLETAP, n == 2);
|
||||
input_report_key(input, BTN_TOOL_TRIPLETAP, n > 2);
|
||||
if (dev->fingers < nmin)
|
||||
dev->fingers = nmin;
|
||||
if (dev->fingers > nmax)
|
||||
dev->fingers = nmax;
|
||||
|
||||
input_report_key(input, BTN_TOUCH, dev->fingers > 0);
|
||||
input_report_key(input, BTN_TOOL_FINGER, dev->fingers == 1);
|
||||
input_report_key(input, BTN_TOOL_DOUBLETAP, dev->fingers == 2);
|
||||
input_report_key(input, BTN_TOOL_TRIPLETAP, dev->fingers > 2);
|
||||
|
||||
input_report_abs(input, ABS_PRESSURE, abs_p);
|
||||
input_report_abs(input, ABS_TOOL_WIDTH, abs_w);
|
||||
|
||||
if (abs_p) {
|
||||
input_report_abs(input, ABS_X, abs_x);
|
||||
input_report_abs(input, ABS_Y, abs_y);
|
||||
|
||||
dprintk(8,
|
||||
"bcm5974: abs: p: %+05d w: %+05d x: %+05d y: %+05d "
|
||||
"nmin: %d nmax: %d n: %d\n",
|
||||
abs_p, abs_w, abs_x, abs_y, nmin, nmax, dev->fingers);
|
||||
|
||||
}
|
||||
|
||||
input_sync(input);
|
||||
|
||||
|
|
|
@ -305,7 +305,7 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
|
|||
.ident = "Lenovo 3000 n100",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
|
||||
DMI_MATCH(DMI_PRODUCT_VERSION, "3000 N100"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "076804U"),
|
||||
},
|
||||
},
|
||||
{
|
||||
|
|
|
@ -1068,7 +1068,7 @@ int saa7146_video_do_ioctl(struct inode *inode, struct file *file, unsigned int
|
|||
{
|
||||
v4l2_std_id *id = arg;
|
||||
int found = 0;
|
||||
int i, err;
|
||||
int i;
|
||||
|
||||
DEB_EE(("VIDIOC_S_STD\n"));
|
||||
|
||||
|
@ -1116,7 +1116,6 @@ int saa7146_video_do_ioctl(struct inode *inode, struct file *file, unsigned int
|
|||
case VIDIOC_OVERLAY:
|
||||
{
|
||||
int on = *(int *)arg;
|
||||
int err = 0;
|
||||
|
||||
DEB_D(("VIDIOC_OVERLAY on:%d\n",on));
|
||||
if (on != 0) {
|
||||
|
@ -1192,7 +1191,6 @@ int saa7146_video_do_ioctl(struct inode *inode, struct file *file, unsigned int
|
|||
case VIDIOCGMBUF:
|
||||
{
|
||||
struct video_mbuf *mbuf = arg;
|
||||
struct videobuf_queue *q;
|
||||
int i;
|
||||
|
||||
/* fixme: number of capture buffers and sizes for v4l apps */
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
|
||||
*
|
||||
* Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
|
||||
*
|
||||
* Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
|
||||
*
|
||||
* Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
MaxLinear MXL5005S VSB/QAM/DVBT tuner driver
|
||||
|
||||
Copyright (C) 2008 MaxLinear
|
||||
Copyright (C) 2006 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2006 Steven Toth <stoth@linuxtv.org>
|
||||
Functions:
|
||||
mxl5005s_reset()
|
||||
mxl5005s_writereg()
|
||||
|
@ -3837,7 +3837,7 @@ static u16 MXL_Hystersis_Test(struct dvb_frontend *fe, int Hystersis)
|
|||
/* ----------------------------------------------------------------
|
||||
* Begin: Everything after here is new code to adapt the
|
||||
* proprietary Realtek driver into a Linux API tuner.
|
||||
* Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
|
||||
*/
|
||||
static int mxl5005s_reset(struct dvb_frontend *fe)
|
||||
{
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
MaxLinear MXL5005S VSB/QAM/DVBT tuner driver
|
||||
|
||||
Copyright (C) 2008 MaxLinear
|
||||
Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -253,7 +253,7 @@ static struct tuner_params *simple_tuner_params(struct dvb_frontend *fe,
|
|||
|
||||
static int simple_config_lookup(struct dvb_frontend *fe,
|
||||
struct tuner_params *t_params,
|
||||
int *frequency, u8 *config, u8 *cb)
|
||||
unsigned *frequency, u8 *config, u8 *cb)
|
||||
{
|
||||
struct tuner_simple_priv *priv = fe->tuner_priv;
|
||||
int i;
|
||||
|
@ -587,45 +587,45 @@ static int simple_set_tv_freq(struct dvb_frontend *fe,
|
|||
priv->last_div = div;
|
||||
if (t_params->has_tda9887) {
|
||||
struct v4l2_priv_tun_config tda9887_cfg;
|
||||
int config = 0;
|
||||
int tda_config = 0;
|
||||
int is_secam_l = (params->std & (V4L2_STD_SECAM_L |
|
||||
V4L2_STD_SECAM_LC)) &&
|
||||
!(params->std & ~(V4L2_STD_SECAM_L |
|
||||
V4L2_STD_SECAM_LC));
|
||||
|
||||
tda9887_cfg.tuner = TUNER_TDA9887;
|
||||
tda9887_cfg.priv = &config;
|
||||
tda9887_cfg.priv = &tda_config;
|
||||
|
||||
if (params->std == V4L2_STD_SECAM_LC) {
|
||||
if (t_params->port1_active ^ t_params->port1_invert_for_secam_lc)
|
||||
config |= TDA9887_PORT1_ACTIVE;
|
||||
tda_config |= TDA9887_PORT1_ACTIVE;
|
||||
if (t_params->port2_active ^ t_params->port2_invert_for_secam_lc)
|
||||
config |= TDA9887_PORT2_ACTIVE;
|
||||
tda_config |= TDA9887_PORT2_ACTIVE;
|
||||
} else {
|
||||
if (t_params->port1_active)
|
||||
config |= TDA9887_PORT1_ACTIVE;
|
||||
tda_config |= TDA9887_PORT1_ACTIVE;
|
||||
if (t_params->port2_active)
|
||||
config |= TDA9887_PORT2_ACTIVE;
|
||||
tda_config |= TDA9887_PORT2_ACTIVE;
|
||||
}
|
||||
if (t_params->intercarrier_mode)
|
||||
config |= TDA9887_INTERCARRIER;
|
||||
tda_config |= TDA9887_INTERCARRIER;
|
||||
if (is_secam_l) {
|
||||
if (i == 0 && t_params->default_top_secam_low)
|
||||
config |= TDA9887_TOP(t_params->default_top_secam_low);
|
||||
tda_config |= TDA9887_TOP(t_params->default_top_secam_low);
|
||||
else if (i == 1 && t_params->default_top_secam_mid)
|
||||
config |= TDA9887_TOP(t_params->default_top_secam_mid);
|
||||
tda_config |= TDA9887_TOP(t_params->default_top_secam_mid);
|
||||
else if (t_params->default_top_secam_high)
|
||||
config |= TDA9887_TOP(t_params->default_top_secam_high);
|
||||
tda_config |= TDA9887_TOP(t_params->default_top_secam_high);
|
||||
} else {
|
||||
if (i == 0 && t_params->default_top_low)
|
||||
config |= TDA9887_TOP(t_params->default_top_low);
|
||||
tda_config |= TDA9887_TOP(t_params->default_top_low);
|
||||
else if (i == 1 && t_params->default_top_mid)
|
||||
config |= TDA9887_TOP(t_params->default_top_mid);
|
||||
tda_config |= TDA9887_TOP(t_params->default_top_mid);
|
||||
else if (t_params->default_top_high)
|
||||
config |= TDA9887_TOP(t_params->default_top_high);
|
||||
tda_config |= TDA9887_TOP(t_params->default_top_high);
|
||||
}
|
||||
if (t_params->default_pll_gating_18)
|
||||
config |= TDA9887_GATING_18;
|
||||
tda_config |= TDA9887_GATING_18;
|
||||
i2c_clients_command(priv->i2c_props.adap, TUNER_SET_CONFIG,
|
||||
&tda9887_cfg);
|
||||
}
|
||||
|
@ -813,7 +813,8 @@ static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
|
|||
static struct tuner_params *t_params;
|
||||
u8 config, cb;
|
||||
u32 div;
|
||||
int ret, frequency = params->frequency / 62500;
|
||||
int ret;
|
||||
unsigned frequency = params->frequency / 62500;
|
||||
|
||||
t_params = simple_tuner_params(fe, TUNER_PARAM_TYPE_DIGITAL);
|
||||
ret = simple_config_lookup(fe, t_params, &frequency, &config, &cb);
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
|
||||
*
|
||||
* Copyright (c) 2007 Xceive Corporation
|
||||
* Copyright (c) 2007 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
|
||||
*
|
||||
* Copyright (c) 2007 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
|
||||
*
|
||||
* Copyright (c) 2007 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -137,7 +137,8 @@ static int flexcop_send_diseqc_msg(struct dvb_frontend* fe, int len, u8 *msg, un
|
|||
flexcop_diseqc_send_byte(fe, 0xff);
|
||||
else {
|
||||
flexcop_set_tone(fe, SEC_TONE_ON);
|
||||
udelay(12500);
|
||||
mdelay(12);
|
||||
udelay(500);
|
||||
flexcop_set_tone(fe, SEC_TONE_OFF);
|
||||
}
|
||||
msleep(20);
|
||||
|
|
|
@ -221,12 +221,12 @@ int flexcop_i2c_init(struct flexcop_device *fc)
|
|||
fc->fc_i2c_adap[1].port = FC_I2C_PORT_EEPROM;
|
||||
fc->fc_i2c_adap[2].port = FC_I2C_PORT_TUNER;
|
||||
|
||||
strncpy(fc->fc_i2c_adap[0].i2c_adap.name,
|
||||
"B2C2 FlexCop I2C to demod", I2C_NAME_SIZE);
|
||||
strncpy(fc->fc_i2c_adap[1].i2c_adap.name,
|
||||
"B2C2 FlexCop I2C to eeprom", I2C_NAME_SIZE);
|
||||
strncpy(fc->fc_i2c_adap[2].i2c_adap.name,
|
||||
"B2C2 FlexCop I2C to tuner", I2C_NAME_SIZE);
|
||||
strlcpy(fc->fc_i2c_adap[0].i2c_adap.name, "B2C2 FlexCop I2C to demod",
|
||||
sizeof(fc->fc_i2c_adap[0].i2c_adap.name));
|
||||
strlcpy(fc->fc_i2c_adap[1].i2c_adap.name, "B2C2 FlexCop I2C to eeprom",
|
||||
sizeof(fc->fc_i2c_adap[1].i2c_adap.name));
|
||||
strlcpy(fc->fc_i2c_adap[2].i2c_adap.name, "B2C2 FlexCop I2C to tuner",
|
||||
sizeof(fc->fc_i2c_adap[2].i2c_adap.name));
|
||||
|
||||
i2c_set_adapdata(&fc->fc_i2c_adap[0].i2c_adap, &fc->fc_i2c_adap[0]);
|
||||
i2c_set_adapdata(&fc->fc_i2c_adap[1].i2c_adap, &fc->fc_i2c_adap[1]);
|
||||
|
|
|
@ -1244,7 +1244,7 @@ static int dst_command(struct dst_state *state, u8 *data, u8 len)
|
|||
goto error;
|
||||
}
|
||||
if (state->type_flags & DST_TYPE_HAS_FW_1)
|
||||
udelay(3000);
|
||||
mdelay(3);
|
||||
if (read_dst(state, &reply, GET_ACK)) {
|
||||
dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
|
||||
if ((dst_error_recovery(state)) < 0) {
|
||||
|
@ -1260,7 +1260,7 @@ static int dst_command(struct dst_state *state, u8 *data, u8 len)
|
|||
if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
|
||||
goto error;
|
||||
if (state->type_flags & DST_TYPE_HAS_FW_1)
|
||||
udelay(3000);
|
||||
mdelay(3);
|
||||
else
|
||||
udelay(2000);
|
||||
if (!dst_wait_dst_ready(state, NO_DELAY))
|
||||
|
|
|
@ -641,7 +641,6 @@ static int dvb_dmxdev_filter_start(struct dmxdev_filter *filter)
|
|||
struct timespec timeout = { 0 };
|
||||
struct dmx_pes_filter_params *para = &filter->params.pes;
|
||||
dmx_output_t otype;
|
||||
int ret;
|
||||
int ts_type;
|
||||
enum dmx_ts_pes ts_pes;
|
||||
struct dmx_ts_feed **tsfeed = &filter->feed.ts;
|
||||
|
|
|
@ -1032,7 +1032,7 @@ static int dvb_ca_en50221_thread(void *data)
|
|||
/* we need this extra check for annoying interfaces like the budget-av */
|
||||
if ((!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE)) &&
|
||||
(ca->pub->poll_slot_status)) {
|
||||
int status = ca->pub->poll_slot_status(ca->pub, slot, 0);
|
||||
status = ca->pub->poll_slot_status(ca->pub, slot, 0);
|
||||
if (!(status & DVB_CA_EN50221_POLL_CAM_PRESENT)) {
|
||||
ca->slot_info[slot].slot_state = DVB_CA_SLOTSTATE_NONE;
|
||||
dvb_ca_en50221_thread_update_delay(ca);
|
||||
|
@ -1089,7 +1089,7 @@ static int dvb_ca_en50221_thread(void *data)
|
|||
/* we need this extra check for annoying interfaces like the budget-av */
|
||||
if ((!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE)) &&
|
||||
(ca->pub->poll_slot_status)) {
|
||||
int status = ca->pub->poll_slot_status(ca->pub, slot, 0);
|
||||
status = ca->pub->poll_slot_status(ca->pub, slot, 0);
|
||||
if (!(status & DVB_CA_EN50221_POLL_CAM_PRESENT)) {
|
||||
ca->slot_info[slot].slot_state = DVB_CA_SLOTSTATE_NONE;
|
||||
dvb_ca_en50221_thread_update_delay(ca);
|
||||
|
|
|
@ -889,13 +889,13 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
|
|||
* initialization, so parg is 8 bits and does not
|
||||
* include the initialization or start bit
|
||||
*/
|
||||
unsigned long cmd = ((unsigned long) parg) << 1;
|
||||
unsigned long swcmd = ((unsigned long) parg) << 1;
|
||||
struct timeval nexttime;
|
||||
struct timeval tv[10];
|
||||
int i;
|
||||
u8 last = 1;
|
||||
if (dvb_frontend_debug)
|
||||
printk("%s switch command: 0x%04lx\n", __func__, cmd);
|
||||
printk("%s switch command: 0x%04lx\n", __func__, swcmd);
|
||||
do_gettimeofday(&nexttime);
|
||||
if (dvb_frontend_debug)
|
||||
memcpy(&tv[0], &nexttime, sizeof(struct timeval));
|
||||
|
@ -908,12 +908,12 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
|
|||
for (i = 0; i < 9; i++) {
|
||||
if (dvb_frontend_debug)
|
||||
do_gettimeofday(&tv[i + 1]);
|
||||
if ((cmd & 0x01) != last) {
|
||||
if ((swcmd & 0x01) != last) {
|
||||
/* set voltage to (last ? 13V : 18V) */
|
||||
fe->ops.set_voltage(fe, (last) ? SEC_VOLTAGE_13 : SEC_VOLTAGE_18);
|
||||
last = (last) ? 0 : 1;
|
||||
}
|
||||
cmd = cmd >> 1;
|
||||
swcmd = swcmd >> 1;
|
||||
if (i != 8)
|
||||
dvb_frontend_sleep_until(&nexttime, 8000);
|
||||
}
|
||||
|
|
|
@ -210,7 +210,7 @@ static int cxusb_aver_power_ctrl(struct dvb_usb_device *d, int onoff)
|
|||
if (d->state == DVB_USB_STATE_INIT &&
|
||||
usb_set_interface(d->udev, 0, 0) < 0)
|
||||
err("set interface failed");
|
||||
do; while (!(ret = cxusb_ctrl_msg(d, CMD_POWER_ON, NULL, 0, NULL, 0)) &&
|
||||
do {} while (!(ret = cxusb_ctrl_msg(d, CMD_POWER_ON, NULL, 0, NULL, 0)) &&
|
||||
!(ret = cxusb_ctrl_msg(d, 0x15, NULL, 0, NULL, 0)) &&
|
||||
!(ret = cxusb_ctrl_msg(d, 0x17, NULL, 0, NULL, 0)) && 0);
|
||||
if (!ret) {
|
||||
|
|
|
@ -1117,7 +1117,8 @@ struct usb_device_id dib0700_usb_id_table[] = {
|
|||
{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
|
||||
{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
|
||||
{ USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
|
||||
{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
|
||||
/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
|
||||
{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
|
||||
{ 0 } /* Terminating entry */
|
||||
};
|
||||
MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
|
||||
|
@ -1373,7 +1374,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
|
|||
}
|
||||
},
|
||||
|
||||
.num_device_descs = 3,
|
||||
.num_device_descs = 4,
|
||||
.devices = {
|
||||
{ "DiBcom STK7070PD reference design",
|
||||
{ &dib0700_usb_id_table[17], NULL },
|
||||
|
@ -1386,6 +1387,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
|
|||
{ "Hauppauge Nova-TD Stick (52009)",
|
||||
{ &dib0700_usb_id_table[35], NULL },
|
||||
{ NULL },
|
||||
},
|
||||
{ "Hauppauge Nova-TD-500 (84xxx)",
|
||||
{ &dib0700_usb_id_table[36], NULL },
|
||||
{ NULL },
|
||||
}
|
||||
}
|
||||
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
|
||||
|
|
|
@ -129,6 +129,7 @@
|
|||
#define USB_PID_WINTV_NOVA_T_USB2_WARM 0x9301
|
||||
#define USB_PID_HAUPPAUGE_NOVA_T_500 0x9941
|
||||
#define USB_PID_HAUPPAUGE_NOVA_T_500_2 0x9950
|
||||
#define USB_PID_HAUPPAUGE_NOVA_T_500_3 0x8400
|
||||
#define USB_PID_HAUPPAUGE_NOVA_T_STICK 0x7050
|
||||
#define USB_PID_HAUPPAUGE_NOVA_T_STICK_2 0x7060
|
||||
#define USB_PID_HAUPPAUGE_NOVA_T_STICK_3 0x7070
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
Auvitek AU8522 QAM/8VSB demodulator driver
|
||||
|
||||
Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
@ -304,6 +304,43 @@ static int au8522_mse2snr_lookup(struct mse2snr_tab *tab, int sz, int mse,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int au8522_set_if(struct dvb_frontend *fe, enum au8522_if_freq if_freq)
|
||||
{
|
||||
struct au8522_state *state = fe->demodulator_priv;
|
||||
u8 r0b5, r0b6, r0b7;
|
||||
char *ifmhz;
|
||||
|
||||
switch (if_freq) {
|
||||
case AU8522_IF_3_25MHZ:
|
||||
ifmhz = "3.25";
|
||||
r0b5 = 0x00;
|
||||
r0b6 = 0x3d;
|
||||
r0b7 = 0xa0;
|
||||
break;
|
||||
case AU8522_IF_4MHZ:
|
||||
ifmhz = "4.00";
|
||||
r0b5 = 0x00;
|
||||
r0b6 = 0x4b;
|
||||
r0b7 = 0xd9;
|
||||
break;
|
||||
case AU8522_IF_6MHZ:
|
||||
ifmhz = "6.00";
|
||||
r0b5 = 0xfb;
|
||||
r0b6 = 0x8e;
|
||||
r0b7 = 0x39;
|
||||
break;
|
||||
default:
|
||||
dprintk("%s() IF Frequency not supported\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
dprintk("%s() %s MHz\n", __func__, ifmhz);
|
||||
au8522_writereg(state, 0x80b5, r0b5);
|
||||
au8522_writereg(state, 0x80b6, r0b6);
|
||||
au8522_writereg(state, 0x80b7, r0b7);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* VSB Modulation table */
|
||||
static struct {
|
||||
u16 reg;
|
||||
|
@ -334,9 +371,6 @@ static struct {
|
|||
{ 0x80af, 0x66 },
|
||||
{ 0x821b, 0xcc },
|
||||
{ 0x821d, 0x80 },
|
||||
{ 0x80b5, 0xfb },
|
||||
{ 0x80b6, 0x8e },
|
||||
{ 0x80b7, 0x39 },
|
||||
{ 0x80a4, 0xe8 },
|
||||
{ 0x8231, 0x13 },
|
||||
};
|
||||
|
@ -350,9 +384,6 @@ static struct {
|
|||
{ 0x80a4, 0x00 },
|
||||
{ 0x8081, 0xc4 },
|
||||
{ 0x80a5, 0x40 },
|
||||
{ 0x80b5, 0xfb },
|
||||
{ 0x80b6, 0x8e },
|
||||
{ 0x80b7, 0x39 },
|
||||
{ 0x80aa, 0x77 },
|
||||
{ 0x80ad, 0x77 },
|
||||
{ 0x80a6, 0x67 },
|
||||
|
@ -438,6 +469,7 @@ static int au8522_enable_modulation(struct dvb_frontend *fe,
|
|||
au8522_writereg(state,
|
||||
VSB_mod_tab[i].reg,
|
||||
VSB_mod_tab[i].data);
|
||||
au8522_set_if(fe, state->config->vsb_if);
|
||||
break;
|
||||
case QAM_64:
|
||||
case QAM_256:
|
||||
|
@ -446,6 +478,7 @@ static int au8522_enable_modulation(struct dvb_frontend *fe,
|
|||
au8522_writereg(state,
|
||||
QAM_mod_tab[i].reg,
|
||||
QAM_mod_tab[i].data);
|
||||
au8522_set_if(fe, state->config->qam_if);
|
||||
break;
|
||||
default:
|
||||
dprintk("%s() Invalid modulation\n", __func__);
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
Auvitek AU8522 QAM/8VSB demodulator driver
|
||||
|
||||
Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
@ -24,6 +24,12 @@
|
|||
|
||||
#include <linux/dvb/frontend.h>
|
||||
|
||||
enum au8522_if_freq {
|
||||
AU8522_IF_6MHZ = 0,
|
||||
AU8522_IF_4MHZ,
|
||||
AU8522_IF_3_25MHZ,
|
||||
};
|
||||
|
||||
struct au8522_config {
|
||||
/* the demodulator's i2c address */
|
||||
u8 demod_address;
|
||||
|
@ -32,6 +38,9 @@ struct au8522_config {
|
|||
#define AU8522_TUNERLOCKING 0
|
||||
#define AU8522_DEMODLOCKING 1
|
||||
u8 status_mode;
|
||||
|
||||
enum au8522_if_freq vsb_if;
|
||||
enum au8522_if_freq qam_if;
|
||||
};
|
||||
|
||||
#if defined(CONFIG_DVB_AU8522) || \
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
Copyright (C) 2001-2002 Convergence Integrated Media GmbH
|
||||
Holger Waechtler <holger@convergence.de>
|
||||
|
||||
Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
Copyright (C) 2001-2002 Convergence Integrated Media GmbH
|
||||
Holger Waechtler <holger@convergence.de>
|
||||
|
||||
Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
|
||||
*
|
||||
* Copyright (C) 2005 Steven Toth <stoth@hauppauge.com>
|
||||
* Copyright (C) 2005 Steven Toth <stoth@linuxtv.org>
|
||||
*
|
||||
* Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc>
|
||||
*
|
||||
|
@ -1072,8 +1072,8 @@ struct dvb_frontend* cx24123_attach(const struct cx24123_config* config,
|
|||
if (config->dont_use_pll)
|
||||
cx24123_repeater_mode(state, 1, 0);
|
||||
|
||||
strncpy(state->tuner_i2c_adapter.name,
|
||||
"CX24123 tuner I2C bus", I2C_NAME_SIZE);
|
||||
strlcpy(state->tuner_i2c_adapter.name, "CX24123 tuner I2C bus",
|
||||
sizeof(state->tuner_i2c_adapter.name));
|
||||
state->tuner_i2c_adapter.class = I2C_CLASS_TV_DIGITAL,
|
||||
state->tuner_i2c_adapter.algo = &cx24123_tuner_i2c_algo;
|
||||
state->tuner_i2c_adapter.algo_data = NULL;
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
|
||||
|
||||
Copyright (C) 2005 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2005 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
Samsung S5H1409 VSB/QAM demodulator driver
|
||||
|
||||
Copyright (C) 2006 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2006 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
@ -404,6 +404,7 @@ static int s5h1409_enable_modulation(struct dvb_frontend* fe,
|
|||
break;
|
||||
case QAM_64:
|
||||
case QAM_256:
|
||||
case QAM_AUTO:
|
||||
dprintk("%s() QAM_AUTO (64/256)\n", __func__);
|
||||
if (state->if_freq != S5H1409_QAM_IF_FREQ)
|
||||
s5h1409_set_if_freq(fe, S5H1409_QAM_IF_FREQ);
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
Samsung S5H1409 VSB/QAM demodulator driver
|
||||
|
||||
Copyright (C) 2006 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2006 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
Samsung S5H1411 VSB/QAM demodulator driver
|
||||
|
||||
Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
|
||||
Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
|
@ -488,6 +488,7 @@ static int s5h1411_enable_modulation(struct dvb_frontend *fe,
|
|||
break;
|
||||
case QAM_64:
|
||||
case QAM_256:
|
||||
case QAM_AUTO:
|
||||
dprintk("%s() QAM_AUTO (64/256)\n", __func__);
|
||||
s5h1411_set_if_freq(fe, state->config->qam_if);
|
||||
s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x0171);
|
||||
|
|
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Reference in New Issue