mirror of https://gitee.com/openkylin/linux.git
spi/pl022: get rid of chipinfo dev pointer
What is the dev pointer doing inside the platform data anyway. We have another pointer to the actual device at hand, use that. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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@ -1597,58 +1597,58 @@ static int verify_controller_parameters(struct pl022 *pl022,
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{
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{
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if ((chip_info->iface < SSP_INTERFACE_MOTOROLA_SPI)
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if ((chip_info->iface < SSP_INTERFACE_MOTOROLA_SPI)
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|| (chip_info->iface > SSP_INTERFACE_UNIDIRECTIONAL)) {
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|| (chip_info->iface > SSP_INTERFACE_UNIDIRECTIONAL)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"interface is configured incorrectly\n");
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"interface is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((chip_info->iface == SSP_INTERFACE_UNIDIRECTIONAL) &&
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if ((chip_info->iface == SSP_INTERFACE_UNIDIRECTIONAL) &&
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(!pl022->vendor->unidir)) {
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(!pl022->vendor->unidir)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"unidirectional mode not supported in this "
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"unidirectional mode not supported in this "
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"hardware version\n");
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"hardware version\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((chip_info->hierarchy != SSP_MASTER)
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if ((chip_info->hierarchy != SSP_MASTER)
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&& (chip_info->hierarchy != SSP_SLAVE)) {
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&& (chip_info->hierarchy != SSP_SLAVE)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"hierarchy is configured incorrectly\n");
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"hierarchy is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (((chip_info->clk_freq).cpsdvsr < CPSDVR_MIN)
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if (((chip_info->clk_freq).cpsdvsr < CPSDVR_MIN)
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|| ((chip_info->clk_freq).cpsdvsr > CPSDVR_MAX)) {
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|| ((chip_info->clk_freq).cpsdvsr > CPSDVR_MAX)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"cpsdvsr is configured incorrectly\n");
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"cpsdvsr is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((chip_info->com_mode != INTERRUPT_TRANSFER)
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if ((chip_info->com_mode != INTERRUPT_TRANSFER)
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&& (chip_info->com_mode != DMA_TRANSFER)
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&& (chip_info->com_mode != DMA_TRANSFER)
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&& (chip_info->com_mode != POLLING_TRANSFER)) {
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&& (chip_info->com_mode != POLLING_TRANSFER)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"Communication mode is configured incorrectly\n");
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"Communication mode is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((chip_info->rx_lev_trig < SSP_RX_1_OR_MORE_ELEM)
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if ((chip_info->rx_lev_trig < SSP_RX_1_OR_MORE_ELEM)
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|| (chip_info->rx_lev_trig > SSP_RX_32_OR_MORE_ELEM)) {
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|| (chip_info->rx_lev_trig > SSP_RX_32_OR_MORE_ELEM)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"RX FIFO Trigger Level is configured incorrectly\n");
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"RX FIFO Trigger Level is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((chip_info->tx_lev_trig < SSP_TX_1_OR_MORE_EMPTY_LOC)
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if ((chip_info->tx_lev_trig < SSP_TX_1_OR_MORE_EMPTY_LOC)
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|| (chip_info->tx_lev_trig > SSP_TX_32_OR_MORE_EMPTY_LOC)) {
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|| (chip_info->tx_lev_trig > SSP_TX_32_OR_MORE_EMPTY_LOC)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"TX FIFO Trigger Level is configured incorrectly\n");
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"TX FIFO Trigger Level is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (chip_info->iface == SSP_INTERFACE_NATIONAL_MICROWIRE) {
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if (chip_info->iface == SSP_INTERFACE_NATIONAL_MICROWIRE) {
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if ((chip_info->ctrl_len < SSP_BITS_4)
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if ((chip_info->ctrl_len < SSP_BITS_4)
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|| (chip_info->ctrl_len > SSP_BITS_32)) {
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|| (chip_info->ctrl_len > SSP_BITS_32)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"CTRL LEN is configured incorrectly\n");
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"CTRL LEN is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((chip_info->wait_state != SSP_MWIRE_WAIT_ZERO)
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if ((chip_info->wait_state != SSP_MWIRE_WAIT_ZERO)
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&& (chip_info->wait_state != SSP_MWIRE_WAIT_ONE)) {
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&& (chip_info->wait_state != SSP_MWIRE_WAIT_ONE)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"Wait State is configured incorrectly\n");
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"Wait State is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -1658,13 +1658,13 @@ static int verify_controller_parameters(struct pl022 *pl022,
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SSP_MICROWIRE_CHANNEL_FULL_DUPLEX)
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SSP_MICROWIRE_CHANNEL_FULL_DUPLEX)
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&& (chip_info->duplex !=
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&& (chip_info->duplex !=
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SSP_MICROWIRE_CHANNEL_HALF_DUPLEX)) {
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SSP_MICROWIRE_CHANNEL_HALF_DUPLEX)) {
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"Microwire duplex mode is configured incorrectly\n");
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"Microwire duplex mode is configured incorrectly\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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} else {
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} else {
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if (chip_info->duplex != SSP_MICROWIRE_CHANNEL_FULL_DUPLEX)
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if (chip_info->duplex != SSP_MICROWIRE_CHANNEL_FULL_DUPLEX)
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dev_err(chip_info->dev,
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dev_err(&pl022->adev->dev,
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"Microwire half duplex mode requested,"
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"Microwire half duplex mode requested,"
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" but this is only available in the"
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" but this is only available in the"
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" ST version of PL022\n");
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" ST version of PL022\n");
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@ -1672,7 +1672,7 @@ static int verify_controller_parameters(struct pl022 *pl022,
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}
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}
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}
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}
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if (chip_info->cs_control == NULL) {
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if (chip_info->cs_control == NULL) {
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dev_warn(chip_info->dev,
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dev_warn(&pl022->adev->dev,
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"Chip Select Function is NULL for this chip\n");
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"Chip Select Function is NULL for this chip\n");
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chip_info->cs_control = null_cs_control;
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chip_info->cs_control = null_cs_control;
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}
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}
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@ -1852,9 +1852,6 @@ static int pl022_setup(struct spi_device *spi)
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"using user supplied controller_data settings\n");
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"using user supplied controller_data settings\n");
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}
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}
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/* Pointer back to the SPI device */
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chip_info->dev = &spi->dev;
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/*
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/*
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* We can override with custom divisors, else we use the board
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* We can override with custom divisors, else we use the board
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* frequency setting
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* frequency setting
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@ -276,7 +276,6 @@ struct pl022_ssp_controller {
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* @dma_config: DMA configuration for SSP controller and peripheral
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* @dma_config: DMA configuration for SSP controller and peripheral
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*/
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*/
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struct pl022_config_chip {
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struct pl022_config_chip {
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struct device *dev;
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enum ssp_interface iface;
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enum ssp_interface iface;
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enum ssp_hierarchy hierarchy;
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enum ssp_hierarchy hierarchy;
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bool slave_tx_disable;
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bool slave_tx_disable;
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