mirror of https://gitee.com/openkylin/linux.git
serial: 8250_dw: Do not use readl/writel before checking port iotype
Direct call to readl()/writel() is checked against iotype and in case of UPIO_MEM32BE we use ioread32be()/iowrite32be() instead of them. Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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4625090187
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@ -114,6 +114,8 @@ static void dw8250_check_lcr(struct uart_port *p, int value)
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#else
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#else
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if (p->iotype == UPIO_MEM32)
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if (p->iotype == UPIO_MEM32)
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writel(value, offset);
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writel(value, offset);
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else if (p->iotype == UPIO_MEM32BE)
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iowrite32be(value, offset);
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else
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else
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writeb(value, offset);
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writeb(value, offset);
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#endif
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#endif
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@ -327,14 +329,20 @@ static void dw8250_setup_port(struct uart_port *p)
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* If the Component Version Register returns zero, we know that
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* If the Component Version Register returns zero, we know that
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* ADDITIONAL_FEATURES are not enabled. No need to go any further.
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* ADDITIONAL_FEATURES are not enabled. No need to go any further.
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*/
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*/
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reg = readl(p->membase + DW_UART_UCV);
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if (p->iotype == UPIO_MEM32BE)
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reg = ioread32be(p->membase + DW_UART_UCV);
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else
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reg = readl(p->membase + DW_UART_UCV);
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if (!reg)
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if (!reg)
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return;
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return;
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dev_dbg(p->dev, "Designware UART version %c.%c%c\n",
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dev_dbg(p->dev, "Designware UART version %c.%c%c\n",
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(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
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(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
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reg = readl(p->membase + DW_UART_CPR);
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if (p->iotype == UPIO_MEM32BE)
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reg = ioread32be(p->membase + DW_UART_CPR);
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else
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reg = readl(p->membase + DW_UART_CPR);
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if (!reg)
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if (!reg)
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return;
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return;
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