mirror of https://gitee.com/openkylin/linux.git
drm/i915/chv: Set min freq to efficient frequency on chv
After feedback from the hardware team, now we set the GPU min/idel freq to RPe. Punit is expecting us to operate GPU between Rpe & Rp0. If we drop the frequency to RPn, punit is failing to change the vgg input voltage to minimum :( Since Punit validates the rps range [RPe, RP0]. This patch removes unused cherryview_rps_min_freq function. v2: Change commit message v3: set min_freq before idle_freq (chris) v4: Squash 'Remove unused rps min function' patch Signed-off-by: Deepak S <deepak.s@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4743,24 +4743,6 @@ static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv)
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return rp1;
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}
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static int cherryview_rps_min_freq(struct drm_i915_private *dev_priv)
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{
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struct drm_device *dev = dev_priv->dev;
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u32 val, rpn;
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if (dev->pdev->revision >= 0x20) {
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val = vlv_punit_read(dev_priv, FB_GFX_FMIN_AT_VMIN_FUSE);
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rpn = ((val >> FB_GFX_FMIN_AT_VMIN_FUSE_SHIFT) &
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FB_GFX_FREQ_FUSE_MASK);
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} else { /* For pre-production hardware */
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val = vlv_punit_read(dev_priv, PUNIT_GPU_STATUS_REG);
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rpn = ((val >> PUNIT_GPU_STATIS_GFX_MIN_FREQ_SHIFT) &
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PUNIT_GPU_STATUS_GFX_MIN_FREQ_MASK);
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}
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return rpn;
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}
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static int valleyview_rps_guar_freq(struct drm_i915_private *dev_priv)
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{
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u32 val, rp1;
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@ -5012,7 +4994,8 @@ static void cherryview_init_gt_powersave(struct drm_device *dev)
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intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq),
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dev_priv->rps.rp1_freq);
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dev_priv->rps.min_freq = cherryview_rps_min_freq(dev_priv);
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/* PUnit validated range is only [RPe, RP0] */
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dev_priv->rps.min_freq = dev_priv->rps.efficient_freq;
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DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",
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intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),
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dev_priv->rps.min_freq);
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