mirror of https://gitee.com/openkylin/linux.git
ARM: dts: omap4-panda: Add USB Host support
Provide the RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. Also provide pin multiplexer information for the USB host pins. HACK: The reset control need to be replaced with the proper gpio-controlled reset driver as soon it will be merged [1]. [1] http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 Signed-off-by: Roger Quadros <rogerq@ti.com> [benoit.cousson@linaro.org: Add disclaimer about the reset control inside changelog and code] Cc: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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4730bcfb06
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5bd2100ed2
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@ -59,6 +59,47 @@ sound: sound {
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"AFML", "Line In",
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"AFMR", "Line In";
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};
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/*
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* Temp hack: Need to be replaced with the proper gpio-controlled
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* reset driver as soon it will be merged.
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* http://thread.gmane.org/gmane.linux.drivers.devicetree/36830
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*/
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/* HS USB Port 1 RESET */
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hsusb1_reset: hsusb1_reset_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb1_reset";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 30 0>; /* gpio_62 */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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/* HS USB Port 1 Power */
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hsusb1_power: hsusb1_power_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb1_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 1 0>; /* gpio_1 */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb1_phy: hsusb1_phy {
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compatible = "usb-nop-xceiv";
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reset-supply = <&hsusb1_reset>;
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vcc-supply = <&hsusb1_power>;
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/**
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* FIXME:
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* put the right clock phandle here when available
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* clocks = <&auxclk3>;
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* clock-names = "main_clk";
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*/
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clock-frequency = <19200000>;
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};
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};
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&omap4_pmx_wkup {
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@ -83,6 +124,7 @@ &mcpdm_pins
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&mcbsp1_pins
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&dss_hdmi_pins
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&tpd12s015_pins
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&hsusbb1_pins
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>;
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twl6030_pins: pinmux_twl6030_pins {
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@ -133,6 +175,23 @@ tpd12s015_pins: pinmux_tpd12s015_pins {
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>;
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};
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hsusbb1_pins: pinmux_hsusbb1_pins {
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pinctrl-single,pins = <
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0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
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0x84 (PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
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0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
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0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
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0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
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0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
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0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
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0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
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0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
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0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
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0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
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0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
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@ -283,3 +342,11 @@ &usb_otg_hs {
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mode = <3>;
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power = <50>;
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};
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&usbhshost {
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port1-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <&hsusb1_phy>;
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};
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