mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu: update vcn1.0 Non-DPG suspend sequence
update suspend register settings in Non-DPG mode. Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1119,10 +1119,10 @@ static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev)
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UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK;
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UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK;
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SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp);
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SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp);
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/* put VCPU into reset */
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/* stall UMC channel */
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WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
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WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_CTRL2),
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UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
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UVD_LMI_CTRL2__STALL_ARB_UMC_MASK,
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~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
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~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
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tmp = UVD_LMI_STATUS__UMC_READ_CLEAN_RAW_MASK |
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tmp = UVD_LMI_STATUS__UMC_READ_CLEAN_RAW_MASK |
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UVD_LMI_STATUS__UMC_WRITE_CLEAN_RAW_MASK;
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UVD_LMI_STATUS__UMC_WRITE_CLEAN_RAW_MASK;
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@ -1141,6 +1141,11 @@ static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev)
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UVD_SOFT_RESET__LMI_SOFT_RESET_MASK,
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UVD_SOFT_RESET__LMI_SOFT_RESET_MASK,
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~UVD_SOFT_RESET__LMI_SOFT_RESET_MASK);
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~UVD_SOFT_RESET__LMI_SOFT_RESET_MASK);
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/* put VCPU into reset */
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WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
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UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
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~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
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WREG32_SOC15(UVD, 0, mmUVD_STATUS, 0);
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WREG32_SOC15(UVD, 0, mmUVD_STATUS, 0);
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vcn_v1_0_enable_clock_gating(adev);
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vcn_v1_0_enable_clock_gating(adev);
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