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spi: orion: Prepare space for per-child options 

Aggregating all options for a particular child underneath a common
struct looks cleaner compared to having a separate array for each
per-child option.

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jan Kundrát 2018-02-10 12:20:23 +01:00 committed by Mark Brown
parent 64aa3bd32c
commit 5c22af7eeb
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 11 additions and 7 deletions
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18
drivers/spi/spi-orion.c
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@ -90,6 +90,10 @@ struct orion_direct_acc {
u32 size; u32 size;
}; };
struct orion_child_options {
struct orion_direct_acc direct_access;
};
struct orion_spi { struct orion_spi {
struct spi_master *master; struct spi_master *master;
void __iomem *base; void __iomem *base;
@ -98,7 +102,7 @@ struct orion_spi {
const struct orion_spi_dev *devdata; const struct orion_spi_dev *devdata;
int unused_hw_gpio; int unused_hw_gpio;
struct orion_direct_acc direct_access[ORION_NUM_CHIPSELECTS]; struct orion_child_options child[ORION_NUM_CHIPSELECTS];
}; };
static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg) static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
@ -436,7 +440,7 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
* Use SPI direct write mode if base address is available. Otherwise * Use SPI direct write mode if base address is available. Otherwise
* fall back to PIO mode for this transfer. * fall back to PIO mode for this transfer.
*/ */
if ((orion_spi->direct_access[cs].vaddr) && (xfer->tx_buf) && if ((orion_spi->child[cs].direct_access.vaddr) && (xfer->tx_buf) &&
(word_len == 8)) { (word_len == 8)) {
unsigned int cnt = count / 4; unsigned int cnt = count / 4;
unsigned int rem = count % 4; unsigned int rem = count % 4;
@ -445,12 +449,12 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
* Send the TX-data to the SPI device via the direct * Send the TX-data to the SPI device via the direct
* mapped address window * mapped address window
*/ */
iowrite32_rep(orion_spi->direct_access[cs].vaddr, iowrite32_rep(orion_spi->child[cs].direct_access.vaddr,
xfer->tx_buf, cnt); xfer->tx_buf, cnt);
if (rem) { if (rem) {
u32 *buf = (u32 *)xfer->tx_buf; u32 *buf = (u32 *)xfer->tx_buf;
iowrite8_rep(orion_spi->direct_access[cs].vaddr, iowrite8_rep(orion_spi->child[cs].direct_access.vaddr,
&buf[cnt], rem); &buf[cnt], rem);
} }
@ -707,14 +711,14 @@ static int orion_spi_probe(struct platform_device *pdev)
* This needs to get extended for the direct SPI-NOR / SPI-NAND * This needs to get extended for the direct SPI-NOR / SPI-NAND
* support, once this gets implemented. * support, once this gets implemented.
*/ */
spi->direct_access[cs].vaddr = devm_ioremap(&pdev->dev, spi->child[cs].direct_access.vaddr = devm_ioremap(&pdev->dev,
r->start, r->start,
PAGE_SIZE); PAGE_SIZE);
if (!spi->direct_access[cs].vaddr) { if (!spi->child[cs].direct_access.vaddr) {
status = -ENOMEM; status = -ENOMEM;
goto out_rel_axi_clk; goto out_rel_axi_clk;
} }
spi->direct_access[cs].size = PAGE_SIZE; spi->child[cs].direct_access.size = PAGE_SIZE;
dev_info(&pdev->dev, "CS%d configured for direct access\n", cs); dev_info(&pdev->dev, "CS%d configured for direct access\n", cs);
} }