mirror of https://gitee.com/openkylin/linux.git
dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
This reverts commit 7144afd025
("dmaengine: fsl-edma: add i.mx7ulp
edma2 version support") as this fails to build with module option due to
usage of of_irq_count() which is not an exported symbol as kernel
drivers are *not* expected to use it (rightly so).
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
b7f5b656ff
commit
5c274ca4cf
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@ -90,19 +90,6 @@ static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr,
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iowrite8(val8, addr + off);
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}
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void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr,
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u32 off, u32 slot, bool enable)
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{
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u32 val;
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if (enable)
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val = EDMAMUX_CHCFG_ENBL << 24 | slot;
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else
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val = EDMAMUX_CHCFG_DIS;
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iowrite32(val, addr + off * 4);
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}
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void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
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unsigned int slot, bool enable)
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{
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@ -116,10 +103,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
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muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
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slot = EDMAMUX_CHCFG_SOURCE(slot);
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if (fsl_chan->edma->drvdata->version == v3)
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mux_configure32(fsl_chan, muxaddr, ch_off, slot, enable);
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else
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mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable);
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mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable);
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}
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EXPORT_SYMBOL_GPL(fsl_edma_chan_mux);
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@ -125,7 +125,6 @@ struct fsl_edma_chan {
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dma_addr_t dma_dev_addr;
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u32 dma_dev_size;
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enum dma_data_direction dma_dir;
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char chan_name[16];
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};
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struct fsl_edma_desc {
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@ -140,13 +139,11 @@ struct fsl_edma_desc {
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enum edma_version {
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v1, /* 32ch, Vybrid, mpc57x, etc */
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v2, /* 64ch Coldfire */
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v3, /* 32ch, i.mx7ulp */
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};
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struct fsl_edma_drvdata {
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enum edma_version version;
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u32 dmamuxs;
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bool has_dmaclk;
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int (*setup_irq)(struct platform_device *pdev,
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struct fsl_edma_engine *fsl_edma);
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};
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@ -156,7 +153,6 @@ struct fsl_edma_engine {
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void __iomem *membase;
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void __iomem *muxbase[DMAMUX_NR];
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struct clk *muxclk[DMAMUX_NR];
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struct clk *dmaclk;
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struct mutex fsl_edma_mutex;
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const struct fsl_edma_drvdata *drvdata;
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u32 n_chans;
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@ -166,50 +166,6 @@ fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma
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return 0;
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}
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static int
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fsl_edma2_irq_init(struct platform_device *pdev,
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struct fsl_edma_engine *fsl_edma)
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{
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struct device_node *np = pdev->dev.of_node;
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int i, ret, irq;
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int count;
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count = of_irq_count(np);
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dev_dbg(&pdev->dev, "%s Found %d interrupts\r\n", __func__, count);
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if (count <= 2) {
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dev_err(&pdev->dev, "Interrupts in DTS not correct.\n");
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return -EINVAL;
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}
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/*
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* 16 channel independent interrupts + 1 error interrupt on i.mx7ulp.
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* 2 channel share one interrupt, for example, ch0/ch16, ch1/ch17...
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* For now, just simply request irq without IRQF_SHARED flag, since 16
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* channels are enough on i.mx7ulp whose M4 domain own some peripherals.
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*/
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for (i = 0; i < count; i++) {
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irq = platform_get_irq(pdev, i);
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if (irq < 0)
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return -ENXIO;
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sprintf(fsl_edma->chans[i].chan_name, "eDMA2-CH%02d", i);
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/* The last IRQ is for eDMA err */
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if (i == count - 1)
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ret = devm_request_irq(&pdev->dev, irq,
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fsl_edma_err_handler,
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0, "eDMA2-ERR", fsl_edma);
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else
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ret = devm_request_irq(&pdev->dev, irq,
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fsl_edma_tx_handler, 0,
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fsl_edma->chans[i].chan_name,
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fsl_edma);
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if (ret)
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return ret;
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}
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return 0;
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}
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static void fsl_edma_irq_exit(
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struct platform_device *pdev, struct fsl_edma_engine *fsl_edma)
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{
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@ -235,16 +191,8 @@ static struct fsl_edma_drvdata vf610_data = {
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.setup_irq = fsl_edma_irq_init,
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};
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static struct fsl_edma_drvdata imx7ulp_data = {
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.version = v3,
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.dmamuxs = 1,
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.has_dmaclk = true,
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.setup_irq = fsl_edma2_irq_init,
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};
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static const struct of_device_id fsl_edma_dt_ids[] = {
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{ .compatible = "fsl,vf610-edma", .data = &vf610_data},
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{ .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, fsl_edma_dt_ids);
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@ -292,20 +240,6 @@ static int fsl_edma_probe(struct platform_device *pdev)
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fsl_edma_setup_regs(fsl_edma);
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regs = &fsl_edma->regs;
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if (drvdata->has_dmaclk) {
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fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma");
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if (IS_ERR(fsl_edma->dmaclk)) {
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dev_err(&pdev->dev, "Missing DMA block clock.\n");
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return PTR_ERR(fsl_edma->dmaclk);
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}
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ret = clk_prepare_enable(fsl_edma->dmaclk);
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if (ret) {
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dev_err(&pdev->dev, "DMA clk block failed.\n");
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return ret;
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}
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}
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for (i = 0; i < fsl_edma->drvdata->dmamuxs; i++) {
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char clkname[32];
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