mirror of https://gitee.com/openkylin/linux.git
Revert "drm/i915/gvt: Refine broken PPGTT scratch"
This reverts commit b20d09886fd1b74cd2255d846029a049e524db14. This caused windows driver boot errors for invalid page address. Revert for now. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Zhenyu Wang
parent
c4270d122c
commit
5c35258de6
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@ -841,51 +841,20 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_find_shadow_page(
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return NULL;
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}
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static bool ppgtt_is_scratch_entry(struct intel_vgpu *vgpu,
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struct intel_gvt_gtt_entry *e)
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{
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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int pt_type = get_pt_type(e->type);
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if (pt_type == GTT_TYPE_INVALID)
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return false;
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if (ops->get_pfn(e) == vgpu->gtt.ppgtt_scratch_page[pt_type].mfn)
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return true;
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return false;
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}
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static void ppgtt_get_scratch_entry(struct intel_vgpu *vgpu, int type,
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struct intel_gvt_gtt_entry *e)
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{
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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struct intel_vgpu_shadow_page *scratch_page;
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int pt_type = get_pt_type(type);
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if (WARN_ON(pt_type == GTT_TYPE_INVALID))
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return;
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scratch_page = &vgpu->gtt.ppgtt_scratch_page[pt_type];
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e->type = get_entry_type(type);
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ops->get_entry(scratch_page->vaddr, e, 0, false, 0, vgpu);
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}
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#define pt_entry_size_shift(spt) \
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((spt)->vgpu->gvt->device_info.gtt_entry_size_shift)
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#define pt_entries(spt) \
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(I915_GTT_PAGE_SIZE >> pt_entry_size_shift(spt))
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#define for_each_guest_entry(spt, e, i) \
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#define for_each_present_guest_entry(spt, e, i) \
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for (i = 0; i < pt_entries(spt); i++) \
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if (!ppgtt_get_guest_entry(spt, e, i))
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if (!ppgtt_get_guest_entry(spt, e, i) && \
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spt->vgpu->gvt->gtt.pte_ops->test_present(e))
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#define for_each_present_shadow_entry(spt, e, i) \
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for (i = 0; i < pt_entries(spt); i++) \
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if (!ppgtt_get_shadow_entry(spt, e, i) && \
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!ppgtt_is_scratch_entry(spt->vgpu, e) && \
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spt->vgpu->gvt->gtt.pte_ops->test_present(e))
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static void ppgtt_get_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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@ -904,13 +873,18 @@ static int ppgtt_invalidate_shadow_page_by_shadow_entry(struct intel_vgpu *vgpu,
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{
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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struct intel_vgpu_ppgtt_spt *s;
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intel_gvt_gtt_type_t cur_pt_type;
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if (WARN_ON(!gtt_type_is_pt(get_next_pt_type(e->type))))
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return -EINVAL;
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if (WARN_ON(ppgtt_is_scratch_entry(vgpu, e)))
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return -EINVAL;
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if (e->type != GTT_TYPE_PPGTT_ROOT_L3_ENTRY
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&& e->type != GTT_TYPE_PPGTT_ROOT_L4_ENTRY) {
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cur_pt_type = get_next_pt_type(e->type) + 1;
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if (ops->get_pfn(e) ==
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vgpu->gtt.scratch_pt[cur_pt_type].page_mfn)
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return 0;
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}
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s = ppgtt_find_shadow_page(vgpu, ops->get_pfn(e));
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if (!s) {
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gvt_vgpu_err("fail to find shadow page: mfn: 0x%lx\n",
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@ -1023,7 +997,6 @@ static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se,
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static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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{
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struct intel_vgpu *vgpu = spt->vgpu;
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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struct intel_vgpu_ppgtt_spt *s;
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struct intel_gvt_gtt_entry se, ge;
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unsigned long i;
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@ -1033,34 +1006,22 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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spt->guest_page.track.gfn, spt->shadow_page.type);
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if (gtt_type_is_pte_pt(spt->shadow_page.type)) {
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for_each_guest_entry(spt, &ge, i) {
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if (ops->test_present(&ge)) {
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ret = gtt_entry_p2m(vgpu, &ge, &se);
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if (ret)
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goto fail;
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} else {
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ppgtt_get_scratch_entry(vgpu,
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spt->shadow_page.type, &se);
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}
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for_each_present_guest_entry(spt, &ge, i) {
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ret = gtt_entry_p2m(vgpu, &ge, &se);
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if (ret)
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goto fail;
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ppgtt_set_shadow_entry(spt, &se, i);
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}
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return 0;
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}
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for_each_guest_entry(spt, &ge, i) {
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for_each_present_guest_entry(spt, &ge, i) {
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if (!gtt_type_is_pt(get_next_pt_type(ge.type))) {
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gvt_vgpu_err("GVT doesn't support pse bit now\n");
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ret = -EINVAL;
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goto fail;
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}
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if (!ops->test_present(&ge)) {
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ppgtt_get_scratch_entry(vgpu, spt->shadow_page.type,
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&se);
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ppgtt_set_shadow_entry(spt, &se, i);
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continue;
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}
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s = ppgtt_populate_shadow_page_by_guest_entry(vgpu, &ge);
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if (IS_ERR(s)) {
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ret = PTR_ERR(s);
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@ -1092,7 +1053,7 @@ static int ppgtt_handle_guest_entry_removal(struct intel_vgpu_guest_page *gpt,
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if (!ops->test_present(se))
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return 0;
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if (ppgtt_is_scratch_entry(vgpu, se))
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if (ops->get_pfn(se) == vgpu->gtt.scratch_pt[sp->type].page_mfn)
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return 0;
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if (gtt_type_is_pt(get_next_pt_type(se->type))) {
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@ -1331,6 +1292,7 @@ static int ppgtt_handle_guest_write_page_table(
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{
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struct intel_vgpu_ppgtt_spt *spt = guest_page_to_ppgtt_spt(gpt);
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struct intel_vgpu *vgpu = spt->vgpu;
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int type = spt->shadow_page.type;
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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struct intel_gvt_gtt_entry se;
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@ -1357,7 +1319,7 @@ static int ppgtt_handle_guest_write_page_table(
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goto fail;
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if (!new_present) {
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ppgtt_get_scratch_entry(vgpu, spt->shadow_page.type, &se);
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ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);
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ppgtt_set_shadow_entry(spt, &se, index);
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}
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@ -2006,85 +1968,106 @@ int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
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return ret;
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}
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static void ppgtt_destroy_scratch(struct intel_vgpu *vgpu)
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{
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struct intel_vgpu_shadow_page *scratch_page;
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int i;
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for (i = GTT_TYPE_PPGTT_PTE_PT; i < GTT_TYPE_MAX; i++) {
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scratch_page = &vgpu->gtt.ppgtt_scratch_page[i];
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if (scratch_page->page != NULL) {
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clean_shadow_page(vgpu, scratch_page);
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__free_page(scratch_page->page);
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}
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}
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}
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static int setup_ppgtt_scratch_page(struct intel_vgpu *vgpu,
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static int alloc_scratch_pages(struct intel_vgpu *vgpu,
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intel_gvt_gtt_type_t type)
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{
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struct intel_gvt *gvt = vgpu->gvt;
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struct intel_gvt_device_info *info = &gvt->device_info;
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int num_entries = I915_GTT_PAGE_SIZE >> info->gtt_entry_size_shift;
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struct intel_vgpu_gtt *gtt = &vgpu->gtt;
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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struct intel_vgpu_shadow_page *scratch_page;
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struct intel_gvt_gtt_entry e;
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intel_gvt_gtt_type_t next_pt_type;
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int ret, i;
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int page_entry_num = I915_GTT_PAGE_SIZE >>
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vgpu->gvt->device_info.gtt_entry_size_shift;
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void *scratch_pt;
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int i;
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struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
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dma_addr_t daddr;
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if (WARN_ON(type < GTT_TYPE_PPGTT_PTE_PT || type >= GTT_TYPE_MAX))
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return -EINVAL;
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scratch_page = >t->ppgtt_scratch_page[type];
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scratch_page->page = alloc_page(GFP_KERNEL);
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if (!scratch_page) {
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scratch_pt = (void *)get_zeroed_page(GFP_KERNEL);
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if (!scratch_pt) {
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gvt_vgpu_err("fail to allocate scratch page\n");
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return -ENOMEM;
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}
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ret = init_shadow_page(vgpu, scratch_page, type, false);
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if (ret) {
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gvt_vgpu_err("fail to allocate scratch page\n");
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__free_page(scratch_page->page);
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daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0,
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4096, PCI_DMA_BIDIRECTIONAL);
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if (dma_mapping_error(dev, daddr)) {
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gvt_vgpu_err("fail to dmamap scratch_pt\n");
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__free_page(virt_to_page(scratch_pt));
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return -ENOMEM;
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}
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gtt->scratch_pt[type].page_mfn =
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(unsigned long)(daddr >> I915_GTT_PAGE_SHIFT);
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gtt->scratch_pt[type].page = virt_to_page(scratch_pt);
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gvt_dbg_mm("vgpu%d create scratch_pt: type %d mfn=0x%lx\n",
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vgpu->id, type, gtt->scratch_pt[type].page_mfn);
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memset(&e, 0, sizeof(e));
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/* Build the tree by full filled the scratch pt with the entries which
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* point to the next level scratch pt or scratch page. The
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* scratch_pt[type] indicate the scratch pt/scratch page used by the
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* 'type' pt.
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* e.g. scratch_pt[GTT_TYPE_PPGTT_PDE_PT] is used by
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* GTT_TYPE_PPGTT_PDE_PT level pt, that means this scratch_pt it self
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* is GTT_TYPE_PPGTT_PTE_PT, and full filled by scratch page mfn.
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*/
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if (type > GTT_TYPE_PPGTT_PTE_PT && type < GTT_TYPE_MAX) {
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struct intel_gvt_gtt_entry se;
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if (type == GTT_TYPE_PPGTT_PTE_PT) {
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e.type = GTT_TYPE_PPGTT_PTE_4K_ENTRY;
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ops->set_pfn(&e, gvt->gtt.scratch_mfn);
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} else {
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next_pt_type = get_next_pt_type(type);
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e.type = get_entry_type(type);
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ops->set_pfn(&e, gtt->ppgtt_scratch_page[next_pt_type].mfn);
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memset(&se, 0, sizeof(struct intel_gvt_gtt_entry));
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se.type = get_entry_type(type - 1);
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ops->set_pfn(&se, gtt->scratch_pt[type - 1].page_mfn);
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/* The entry parameters like present/writeable/cache type
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* set to the same as i915's scratch page tree.
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*/
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se.val64 |= _PAGE_PRESENT | _PAGE_RW;
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if (type == GTT_TYPE_PPGTT_PDE_PT)
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se.val64 |= PPAT_CACHED;
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for (i = 0; i < page_entry_num; i++)
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ops->set_entry(scratch_pt, &se, i, false, 0, vgpu);
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}
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ops->set_present(&e);
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for (i = 0; i < num_entries; i++)
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ops->set_entry(scratch_page->vaddr, &e, i, false, 0, vgpu);
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return 0;
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}
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static int ppgtt_create_scratch(struct intel_vgpu *vgpu)
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static int release_scratch_page_tree(struct intel_vgpu *vgpu)
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{
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int i;
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struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
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dma_addr_t daddr;
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for (i = GTT_TYPE_PPGTT_PTE_PT; i < GTT_TYPE_MAX; i++) {
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if (vgpu->gtt.scratch_pt[i].page != NULL) {
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daddr = (dma_addr_t)(vgpu->gtt.scratch_pt[i].page_mfn <<
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I915_GTT_PAGE_SHIFT);
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dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL);
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__free_page(vgpu->gtt.scratch_pt[i].page);
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vgpu->gtt.scratch_pt[i].page = NULL;
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vgpu->gtt.scratch_pt[i].page_mfn = 0;
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}
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}
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return 0;
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}
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static int create_scratch_page_tree(struct intel_vgpu *vgpu)
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{
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int i, ret;
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for (i = GTT_TYPE_PPGTT_PTE_PT; i < GTT_TYPE_MAX; i++) {
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ret = setup_ppgtt_scratch_page(vgpu, i);
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ret = alloc_scratch_pages(vgpu, i);
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if (ret)
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goto err;
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}
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return 0;
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err:
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ppgtt_destroy_scratch(vgpu);
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release_scratch_page_tree(vgpu);
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return ret;
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}
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/**
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* intel_vgpu_init_gtt - initialize per-vGPU graphics memory virulization
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* @vgpu: a vGPU
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@ -2117,7 +2100,8 @@ int intel_vgpu_init_gtt(struct intel_vgpu *vgpu)
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}
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gtt->ggtt_mm = ggtt_mm;
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return ppgtt_create_scratch(vgpu);
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return create_scratch_page_tree(vgpu);
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}
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static void intel_vgpu_free_mm(struct intel_vgpu *vgpu, int type)
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@ -2149,7 +2133,7 @@ static void intel_vgpu_free_mm(struct intel_vgpu *vgpu, int type)
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void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu)
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{
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ppgtt_free_all_shadow_page(vgpu);
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ppgtt_destroy_scratch(vgpu);
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release_scratch_page_tree(vgpu);
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intel_vgpu_free_mm(vgpu, INTEL_GVT_MM_PPGTT);
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intel_vgpu_free_mm(vgpu, INTEL_GVT_MM_GGTT);
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@ -188,12 +188,9 @@ extern void intel_vgpu_destroy_mm(struct kref *mm_ref);
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struct intel_vgpu_guest_page;
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struct intel_vgpu_shadow_page {
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void *vaddr;
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struct intel_vgpu_scratch_pt {
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struct page *page;
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int type;
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struct hlist_node node;
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unsigned long mfn;
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unsigned long page_mfn;
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};
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struct intel_vgpu_gtt {
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@ -205,7 +202,7 @@ struct intel_vgpu_gtt {
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atomic_t n_tracked_guest_page;
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struct list_head oos_page_list_head;
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struct list_head post_shadow_list_head;
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struct intel_vgpu_shadow_page ppgtt_scratch_page[GTT_TYPE_MAX];
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struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX];
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};
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extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
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@ -221,6 +218,14 @@ extern struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
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struct intel_vgpu_oos_page;
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struct intel_vgpu_shadow_page {
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void *vaddr;
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struct page *page;
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int type;
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struct hlist_node node;
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unsigned long mfn;
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};
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struct intel_vgpu_page_track {
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struct hlist_node node;
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bool tracked;
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