mirror of https://gitee.com/openkylin/linux.git
MIPS: smp-cps: prevent multi-core SMP with unsuitable CCA
If the user or bootloader sets the CCA to a value which is not suited for multi-core SMP (ie. anything non-coherent) then limit the system to using only a single core and warn the user. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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@ -88,11 +88,38 @@ static void __init cps_smp_setup(void)
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static void __init cps_prepare_cpus(unsigned int max_cpus)
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static void __init cps_prepare_cpus(unsigned int max_cpus)
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{
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{
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unsigned ncores, core_vpes, c;
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unsigned ncores, core_vpes, c, cca;
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bool cca_unsuitable;
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u32 *entry_code;
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u32 *entry_code;
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mips_mt_set_cpuoptions();
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mips_mt_set_cpuoptions();
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/* Detect whether the CCA is unsuited to multi-core SMP */
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cca = read_c0_config() & CONF_CM_CMASK;
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switch (cca) {
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case 0x4: /* CWBE */
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case 0x5: /* CWB */
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/* The CCA is coherent, multi-core is fine */
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cca_unsuitable = false;
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break;
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default:
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/* CCA is not coherent, multi-core is not usable */
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cca_unsuitable = true;
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}
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/* Warn the user if the CCA prevents multi-core */
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ncores = mips_cm_numcores();
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if (cca_unsuitable && ncores > 1) {
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pr_warn("Using only one core due to unsuitable CCA 0x%x\n",
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cca);
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for_each_present_cpu(c) {
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if (cpu_data[c].core)
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set_cpu_present(c, false);
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}
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}
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/* Patch the start of mips_cps_core_entry to provide the CM base */
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/* Patch the start of mips_cps_core_entry to provide the CM base */
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entry_code = (u32 *)&mips_cps_core_entry;
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entry_code = (u32 *)&mips_cps_core_entry;
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UASM_i_LA(&entry_code, 3, (long)mips_cm_base);
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UASM_i_LA(&entry_code, 3, (long)mips_cm_base);
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@ -100,7 +127,6 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)
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(void *)entry_code - (void *)&mips_cps_core_entry);
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(void *)entry_code - (void *)&mips_cps_core_entry);
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/* Allocate core boot configuration structs */
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/* Allocate core boot configuration structs */
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ncores = mips_cm_numcores();
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mips_cps_core_bootcfg = kcalloc(ncores, sizeof(*mips_cps_core_bootcfg),
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mips_cps_core_bootcfg = kcalloc(ncores, sizeof(*mips_cps_core_bootcfg),
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GFP_KERNEL);
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GFP_KERNEL);
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if (!mips_cps_core_bootcfg) {
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if (!mips_cps_core_bootcfg) {
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