mirror of https://gitee.com/openkylin/linux.git
MIPS: BMIPS: Add support UART, I2C, SATA device
Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based platforms. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Dragan Stancevic <dragan.stancevic@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/13016/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
23021b2bb9
commit
5c40d493e2
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@ -85,14 +85,15 @@ upg_irq0_intc: upg_irq0_intc@406780 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x406780 0x8>;
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brcm,int-map-mask = <0x44>;
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brcm,int-map-mask = <0x44>, <0xf000000>;
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brcm,int-fwd-mask = <0x70000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <18>;
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interrupts = <18>, <19>;
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interrupt-names = "upg_main", "upg_bsc";
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};
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sun_top_ctrl: syscon@404000 {
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@ -118,6 +119,70 @@ uart0: serial@406b00 {
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status = "disabled";
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};
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uart1: serial@406b40 {
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compatible = "ns16550a";
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reg = <0x406b40 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <64>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@406b80 {
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compatible = "ns16550a";
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reg = <0x406b80 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <65>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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bsca: i2c@406200 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406200 0x58>;
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interrupts = <24>;
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interrupt-names = "upg_bsca";
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status = "disabled";
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};
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bscb: i2c@406280 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406280 0x58>;
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interrupts = <25>;
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interrupt-names = "upg_bscb";
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status = "disabled";
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};
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bscc: i2c@406300 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406300 0x58>;
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interrupts = <26>;
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interrupt-names = "upg_bscc";
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status = "disabled";
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};
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bscd: i2c@406380 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406380 0x58>;
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interrupts = <27>;
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interrupt-names = "upg_bscd";
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status = "disabled";
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};
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ehci0: usb@488300 {
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compatible = "brcm,bcm7125-ehci", "generic-ehci";
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reg = <0x488300 0x100>;
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@ -24,8 +24,6 @@ cpu@1 {
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aliases {
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uart0 = &uart0;
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uart1 = &uart1;
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uart2 = &uart2;
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};
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cpu_intc: cpu_intc {
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@ -18,8 +18,6 @@ cpu@0 {
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aliases {
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uart0 = &uart0;
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uart1 = &uart1;
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uart2 = &uart2;
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};
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cpu_intc: cpu_intc {
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@ -18,8 +18,6 @@ cpu@0 {
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aliases {
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uart0 = &uart0;
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uart1 = &uart1;
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uart2 = &uart2;
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};
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cpu_intc: cpu_intc {
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@ -241,5 +239,45 @@ ohci0: usb@480400 {
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interrupts = <66>;
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status = "disabled";
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};
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sata: sata@181000 {
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compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
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reg-names = "ahci", "top-ctrl";
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reg = <0x181000 0xa9c>, <0x180020 0x1c>;
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interrupt-parent = <&periph_intc>;
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interrupts = <86>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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sata0: sata-port@0 {
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reg = <0>;
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phys = <&sata_phy0>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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phys = <&sata_phy1>;
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};
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};
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sata_phy: sata-phy@180100 {
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compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
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reg = <0x180100 0x0eff>;
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reg-names = "phy";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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sata_phy0: sata-phy@0 {
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reg = <0>;
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#phy-cells = <0>;
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};
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sata_phy1: sata-phy@1 {
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reg = <1>;
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#phy-cells = <0>;
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};
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};
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};
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};
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@ -24,8 +24,6 @@ cpu@1 {
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aliases {
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uart0 = &uart0;
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uart1 = &uart1;
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uart2 = &uart2;
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};
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cpu_intc: cpu_intc {
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@ -86,14 +86,15 @@ upg_irq0_intc: upg_irq0_intc@406780 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x406780 0x8>;
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brcm,int-map-mask = <0x44>;
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brcm,int-map-mask = <0x44>, <0x1f000000>;
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brcm,int-fwd-mask = <0x70000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <18>;
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interrupts = <18>, <19>;
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interrupt-names = "upg_main", "upg_bsc";
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};
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sun_top_ctrl: syscon@404000 {
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@ -118,6 +119,78 @@ uart0: serial@406b00 {
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status = "disabled";
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};
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uart1: serial@406b40 {
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compatible = "ns16550a";
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reg = <0x406b40 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <64>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@406b80 {
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compatible = "ns16550a";
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reg = <0x406b80 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <65>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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bsca: i2c@406200 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406200 0x58>;
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interrupts = <24>;
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interrupt-names = "upg_bsca";
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status = "disabled";
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};
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bscb: i2c@406280 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406280 0x58>;
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interrupts = <25>;
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interrupt-names = "upg_bscb";
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status = "disabled";
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};
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bscc: i2c@406300 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406300 0x58>;
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interrupts = <26>;
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interrupt-names = "upg_bscc";
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status = "disabled";
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};
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bscd: i2c@406380 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406380 0x58>;
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interrupts = <27>;
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interrupt-names = "upg_bscd";
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status = "disabled";
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};
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bsce: i2c@406800 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406800 0x58>;
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interrupts = <28>;
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interrupt-names = "upg_bsce";
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status = "disabled";
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};
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enet0: ethernet@468000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -87,14 +87,32 @@ upg_irq0_intc: upg_irq0_intc@406780 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x406780 0x8>;
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brcm,int-map-mask = <0x44>;
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brcm,int-map-mask = <0x44>, <0x7000000>;
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brcm,int-fwd-mask = <0x70000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <55>;
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interrupts = <55>, <53>;
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interrupt-names = "upg_main", "upg_bsc";
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};
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upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x409480 0x8>;
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brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
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brcm,int-fwd-mask = <0>;
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brcm,irq-can-wake;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <56>, <54>, <59>;
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interrupt-names = "upg_main_aon", "upg_bsc_aon",
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"upg_spi";
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};
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sun_top_ctrl: syscon@404000 {
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@ -119,6 +137,78 @@ uart0: serial@406b00 {
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status = "disabled";
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};
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uart1: serial@406b40 {
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compatible = "ns16550a";
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reg = <0x406b40 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <62>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@406b80 {
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compatible = "ns16550a";
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reg = <0x406b80 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <63>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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bsca: i2c@409180 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_aon_irq0_intc>;
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reg = <0x409180 0x58>;
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interrupts = <27>;
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interrupt-names = "upg_bsca";
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status = "disabled";
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};
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bscb: i2c@409400 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_aon_irq0_intc>;
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reg = <0x409400 0x58>;
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interrupts = <28>;
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interrupt-names = "upg_bscb";
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status = "disabled";
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};
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bscc: i2c@406200 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406200 0x58>;
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interrupts = <24>;
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interrupt-names = "upg_bscc";
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status = "disabled";
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};
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bscd: i2c@406280 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406280 0x58>;
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interrupts = <25>;
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interrupt-names = "upg_bscd";
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status = "disabled";
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};
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bsce: i2c@406300 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406300 0x58>;
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interrupts = <26>;
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interrupt-names = "upg_bsce";
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status = "disabled";
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};
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enet0: ethernet@b80000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -102,14 +102,32 @@ upg_irq0_intc: upg_irq0_intc@406780 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x406780 0x8>;
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brcm,int-map-mask = <0x44>;
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brcm,int-map-mask = <0x44>, <0x7000000>;
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brcm,int-fwd-mask = <0x70000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <60>;
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interrupts = <60>, <58>;
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interrupt-names = "upg_main", "upg_bsc";
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};
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upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x409480 0x8>;
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brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
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brcm,int-fwd-mask = <0>;
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brcm,irq-can-wake;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <61>, <59>, <64>;
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interrupt-names = "upg_main_aon", "upg_bsc_aon",
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"upg_spi";
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};
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sun_top_ctrl: syscon@404000 {
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@ -134,6 +152,78 @@ uart0: serial@406b00 {
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status = "disabled";
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};
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uart1: serial@406b40 {
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compatible = "ns16550a";
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reg = <0x406b40 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <67>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@406b80 {
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compatible = "ns16550a";
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reg = <0x406b80 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <68>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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bsca: i2c@406300 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406300 0x58>;
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interrupts = <26>;
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interrupt-names = "upg_bsca";
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status = "disabled";
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};
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bscb: i2c@409400 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_aon_irq0_intc>;
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reg = <0x409400 0x58>;
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interrupts = <28>;
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interrupt-names = "upg_bscb";
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status = "disabled";
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};
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||||
bscc: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsce: i2c@409180 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x409180 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bsce";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@b80000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
@ -236,5 +326,45 @@ ohci3: usb@490600 {
|
|||
interrupts = <78>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <45>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@180100 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -21,6 +21,30 @@ &uart0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* FIXME: USB is wonky; disable it for now */
|
||||
&ehci0 {
|
||||
status = "disabled";
|
||||
|
|
|
@ -56,3 +56,11 @@ &ehci0 {
|
|||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -23,6 +23,34 @@ &uart0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsce {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* FIXME: MAC driver comes up but cannot attach to PHY */
|
||||
&enet0 {
|
||||
status = "disabled";
|
||||
|
|
|
@ -23,6 +23,34 @@ &uart0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsce {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -23,6 +23,34 @@ &uart0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsce {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -58,3 +86,11 @@ &ehci3 {
|
|||
&ohci3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue