mirror of https://gitee.com/openkylin/linux.git
ARM: dts: dm81x: fix clock node definitions to avoid build warnings
Upcoming change to DT compiler is going to complain about nodes which have a reg property, but have not defined the address in their name. This patch fixes following type of warnings for DM81x clock nodes: Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck has a reg or ranges property, but no unit name Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tero Kristo
Tony Lindgren
parent
c567048194
commit
5c440a775e
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@ -5,7 +5,7 @@
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*/
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&pllss_clocks {
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timer1_fck: timer1_fck {
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timer1_fck: timer1_fck@2e0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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@ -14,7 +14,7 @@ timer1_fck: timer1_fck {
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reg = <0x2e0>;
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};
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timer2_fck: timer2_fck {
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timer2_fck: timer2_fck@2e0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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@ -23,7 +23,7 @@ timer2_fck: timer2_fck {
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reg = <0x2e0>;
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};
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sysclk18_ck: sysclk18_ck {
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sysclk18_ck: sysclk18_ck@2f0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&rtcosc_ck>, <&rtcdivider_ck>;
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@ -33,7 +33,7 @@ sysclk18_ck: sysclk18_ck {
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};
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&scm_clocks {
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devosc_ck: devosc_ck {
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devosc_ck: devosc_ck@40 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&virt_20000000_ck>, <&virt_19200000_ck>;
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@ -121,7 +121,7 @@ osc_src_ck: osc_src_ck {
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clock-div = <1>;
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};
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mpu_clksrc_ck: mpu_clksrc_ck {
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mpu_clksrc_ck: mpu_clksrc_ck@40 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&devosc_ck>, <&rtcdivider_ck>;
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@ -86,7 +86,7 @@ sys_clkin_ck: sys_clkin_ck {
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/* 0x48180000 */
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&prcm_clocks {
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clkout_pre_ck: clkout_pre_ck {
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clkout_pre_ck: clkout_pre_ck@100 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&main_fapll 5 &ddr_fapll 1 &video_fapll 1
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@ -94,7 +94,7 @@ clkout_pre_ck: clkout_pre_ck {
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reg = <0x100>;
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};
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clkout_div_ck: clkout_div_ck {
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clkout_div_ck: clkout_div_ck@100 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&clkout_pre_ck>;
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@ -103,7 +103,7 @@ clkout_div_ck: clkout_div_ck {
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reg = <0x100>;
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};
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clkout_ck: clkout_ck {
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clkout_ck: clkout_ck@100 {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&clkout_div_ck>;
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@ -112,7 +112,7 @@ clkout_ck: clkout_ck {
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};
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/* CM_DPLL clocks p1795 */
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sysclk1_ck: sysclk1_ck {
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sysclk1_ck: sysclk1_ck@300 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&main_fapll 1>;
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@ -120,7 +120,7 @@ sysclk1_ck: sysclk1_ck {
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reg = <0x0300>;
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};
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sysclk2_ck: sysclk2_ck {
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sysclk2_ck: sysclk2_ck@304 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&main_fapll 2>;
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@ -128,7 +128,7 @@ sysclk2_ck: sysclk2_ck {
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reg = <0x0304>;
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};
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sysclk3_ck: sysclk3_ck {
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sysclk3_ck: sysclk3_ck@308 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&main_fapll 3>;
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@ -136,7 +136,7 @@ sysclk3_ck: sysclk3_ck {
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reg = <0x0308>;
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};
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sysclk4_ck: sysclk4_ck {
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sysclk4_ck: sysclk4_ck@30c {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&main_fapll 4>;
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@ -144,7 +144,7 @@ sysclk4_ck: sysclk4_ck {
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reg = <0x030c>;
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};
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sysclk5_ck: sysclk5_ck {
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sysclk5_ck: sysclk5_ck@310 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&sysclk4_ck>;
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@ -152,7 +152,7 @@ sysclk5_ck: sysclk5_ck {
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reg = <0x0310>;
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};
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sysclk6_ck: sysclk6_ck {
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sysclk6_ck: sysclk6_ck@314 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&main_fapll 4>;
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@ -160,7 +160,7 @@ sysclk6_ck: sysclk6_ck {
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reg = <0x0314>;
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};
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sysclk10_ck: sysclk10_ck {
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sysclk10_ck: sysclk10_ck@324 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&ddr_fapll 2>;
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@ -168,7 +168,7 @@ sysclk10_ck: sysclk10_ck {
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reg = <0x0324>;
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};
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sysclk24_ck: sysclk24_ck {
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sysclk24_ck: sysclk24_ck@3b4 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&main_fapll 5>;
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@ -176,7 +176,7 @@ sysclk24_ck: sysclk24_ck {
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reg = <0x03b4>;
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};
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mpu_ck: mpu_ck {
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mpu_ck: mpu_ck@15dc {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&sysclk2_ck>;
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@ -184,7 +184,7 @@ mpu_ck: mpu_ck {
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reg = <0x15dc>;
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};
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audio_pll_a_ck: audio_pll_a_ck {
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audio_pll_a_ck: audio_pll_a_ck@35c {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&audio_fapll 1>;
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@ -192,56 +192,56 @@ audio_pll_a_ck: audio_pll_a_ck {
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reg = <0x035c>;
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};
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sysclk18_ck: sysclk18_ck {
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sysclk18_ck: sysclk18_ck@378 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sys_32k_ck>, <&audio_pll_a_ck>;
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reg = <0x0378>;
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};
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timer1_fck: timer1_fck {
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timer1_fck: timer1_fck@390 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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reg = <0x0390>;
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};
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timer2_fck: timer2_fck {
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timer2_fck: timer2_fck@394 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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reg = <0x0394>;
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};
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timer3_fck: timer3_fck {
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timer3_fck: timer3_fck@398 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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reg = <0x0398>;
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};
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timer4_fck: timer4_fck {
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timer4_fck: timer4_fck@39c {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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reg = <0x039c>;
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};
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timer5_fck: timer5_fck {
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timer5_fck: timer5_fck@3a0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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reg = <0x03a0>;
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};
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timer6_fck: timer6_fck {
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timer6_fck: timer6_fck@3a4 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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reg = <0x03a4>;
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};
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timer7_fck: timer7_fck {
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timer7_fck: timer7_fck@3a8 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>;
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