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ARM: dts: socfpga: Add QSPI node for the Arria10 

Add the QSPI device node for Arria10 SOC.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This commit is contained in:
Dinh Nguyen 2016-10-19 10:56:33 -05:00 committed by Dinh Nguyen
parent e8f0ff5833
commit 5d662bf15d
1 changed files with 14 additions and 0 deletions
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14
arch/arm/boot/dts/socfpga_arria10.dtsi
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@ -675,6 +675,20 @@ usb0-ecc@ff8c8800 {
};
};
qspi: spi@ff809000 {
compatible = "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff809000 0x100>,
<0xffa00000 0x100000>;
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
cdns,fifo-depth = <128>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x00000000>;
clocks = <&qspi_clk>;
status = "disabled";
};
rst: rstmgr@ffd05000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";