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ARM: dts: r8a7791: Remove unit-address and reg from integrated cache 

The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 6f9314ce25 ("ARM: dts: r8a7791: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2017-03-06 17:40:40 +01:00 committed by Simon Horman
parent d492909c84
commit 5d6a2165ab
1 changed files with 1 additions and 2 deletions
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arch/arm/boot/dts/r8a7791.dtsi
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@ -74,9 +74,8 @@ cpu1: cpu@1 {
next-level-cache = <&L2_CA15>;
};
L2_CA15: cache-controller@0 {
L2_CA15: cache-controller-0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7791_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;