openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

ARM: dts: r7s72100: sort subnodes of root node 

Sort the subnodes of the soc node to improve maintainability.
The sort has been done alphabetically with the node name as the key.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Simon Horman 2018-02-12 15:39:30 +01:00
parent 6f9fe6a652
commit 5db40d7b26
1 changed files with 45 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

88
arch/arm/boot/dts/r7s72100.dtsi
View File

@ -30,35 +30,6 @@ aliases {
spi4 = &spi4; spi4 = &spi4;
}; };
/* External clocks */
extal_clk: extal {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
usb_x1_clk: usb_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
rtc_x1_clk: rtc_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 32678 */
clock-frequency = <0>;
};
rtc_x3_clk: rtc_x3 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 4000000 */
clock-frequency = <0>;
};
/* Fixed factor clocks */ /* Fixed factor clocks */
b_clk: b { b_clk: b {
#clock-cells = <0>; #clock-cells = <0>;
@ -67,20 +38,6 @@ b_clk: b {
clock-mult = <1>; clock-mult = <1>;
clock-div = <3>; clock-div = <3>;
}; };
p1_clk: p1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <6>;
};
p0_clk: p0 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <12>;
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
@ -96,6 +53,44 @@ cpu@0 {
}; };
}; };
/* External clocks */
extal_clk: extal {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
p0_clk: p0 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <12>;
};
p1_clk: p1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <6>;
};
rtc_x1_clk: rtc_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 32678 */
clock-frequency = <0>;
};
rtc_x3_clk: rtc_x3 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 4000000 */
clock-frequency = <0>;
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
@ -689,4 +684,11 @@ GIC_SPI 277 IRQ_TYPE_EDGE_RISING
status = "disabled"; status = "disabled";
}; };
}; };
usb_x1_clk: usb_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
}; };