mirror of https://gitee.com/openkylin/linux.git
iwlwifi: distinguish different RF modules in A000 devices
Newer versions of A000 devices come with two diffenent RF modules. The PCI_ID, the subsystem ID and the RF ID are identical in these two cases, so we need to differentiate them by using the CSR_HW_RF_ID register- in order to load the appropriate firmware. Signed-off-by: Tzipi Peres <tzipi.peres@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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@ -76,13 +76,19 @@
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#define IWL_A000_HR_FW_PRE "iwlwifi-Qu-a0-hr-a0-"
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#define IWL_A000_HR_CDB_FW_PRE "iwlwifi-QuIcp-z0-hrcdb-a0-"
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#define IWL_A000_HR_F0_FW_PRE "iwlwifi-QuQnj-f0-hr-a0-"
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#define IWL_A000_JF_B0_FW_PRE "iwlwifi-QuQnj-a0-jf-b0-"
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#define IWL_A000_HR_A0_FW_PRE "iwlwifi-QuQnj-a0-hr-a0-"
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#define IWL_A000_HR_MODULE_FIRMWARE(api) \
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IWL_A000_HR_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_A000_JF_MODULE_FIRMWARE(api) \
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IWL_A000_JF_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_A000_HR_QNJ_MODULE_FIRMWARE(api) \
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#define IWL_A000_HR_F0_QNJ_MODULE_FIRMWARE(api) \
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IWL_A000_HR_F0_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_A000_JF_B0_QNJ_MODULE_FIRMWARE(api) \
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IWL_A000_JF_B0_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_A000_HR_A0_QNJ_MODULE_FIRMWARE(api) \
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IWL_A000_HR_A0_FW_PRE "-" __stringify(api) ".ucode"
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#define NVM_HW_SECTION_NUM_FAMILY_A000 10
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@ -171,7 +177,7 @@ const struct iwl_cfg iwla000_2ax_cfg_hr = {
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.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
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};
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const struct iwl_cfg iwla000_2ax_cfg_qnj_hr = {
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const struct iwl_cfg iwla000_2ax_cfg_qnj_hr_f0 = {
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.name = "Intel(R) Dual Band Wireless AX a000",
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.fw_name_pre = IWL_A000_HR_F0_FW_PRE,
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IWL_DEVICE_A000,
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@ -181,6 +187,28 @@ const struct iwl_cfg iwla000_2ax_cfg_qnj_hr = {
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.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
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};
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const struct iwl_cfg iwla000_2ax_cfg_qnj_jf_b0 = {
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.name = "Intel(R) Dual Band Wireless AX a000",
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.fw_name_pre = IWL_A000_JF_B0_FW_PRE,
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IWL_DEVICE_A000,
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.ht_params = &iwl_a000_ht_params,
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.nvm_ver = IWL_A000_NVM_VERSION,
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.nvm_calib_ver = IWL_A000_TX_POWER_VERSION,
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.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
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};
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const struct iwl_cfg iwla000_2ax_cfg_qnj_hr_a0 = {
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.name = "Intel(R) Dual Band Wireless AX a000",
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.fw_name_pre = IWL_A000_HR_A0_FW_PRE,
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IWL_DEVICE_A000,
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.ht_params = &iwl_a000_ht_params,
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.nvm_ver = IWL_A000_NVM_VERSION,
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.nvm_calib_ver = IWL_A000_TX_POWER_VERSION,
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.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,
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};
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MODULE_FIRMWARE(IWL_A000_HR_MODULE_FIRMWARE(IWL_A000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_A000_JF_MODULE_FIRMWARE(IWL_A000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_A000_HR_QNJ_MODULE_FIRMWARE(IWL_A000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_A000_HR_F0_QNJ_MODULE_FIRMWARE(IWL_A000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_A000_JF_B0_QNJ_MODULE_FIRMWARE(IWL_A000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_A000_HR_A0_QNJ_MODULE_FIRMWARE(IWL_A000_UCODE_API_MAX));
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@ -463,7 +463,9 @@ extern const struct iwl_cfg iwla000_2ac_cfg_hr;
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extern const struct iwl_cfg iwla000_2ac_cfg_hr_cdb;
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extern const struct iwl_cfg iwla000_2ac_cfg_jf;
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extern const struct iwl_cfg iwla000_2ax_cfg_hr;
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extern const struct iwl_cfg iwla000_2ax_cfg_qnj_hr;
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extern const struct iwl_cfg iwla000_2ax_cfg_qnj_hr_f0;
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extern const struct iwl_cfg iwla000_2ax_cfg_qnj_jf_b0;
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extern const struct iwl_cfg iwla000_2ax_cfg_qnj_hr_a0;
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#endif /* CONFIG_IWLMVM */
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#endif /* __IWL_CONFIG_H__ */
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@ -354,11 +354,16 @@ enum {
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#define CSR_HW_REV_TYPE_135 (0x0000120)
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#define CSR_HW_REV_TYPE_7265D (0x0000210)
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#define CSR_HW_REV_TYPE_NONE (0x00001F0)
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#define CSR_HW_REV_TYPE_QNJ (0x0000360)
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#define CSR_HW_REV_TYPE_HR_CDB (0x0000340)
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/* RF_ID value */
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#define CSR_HW_RF_ID_TYPE_JF (0x00105100)
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#define CSR_HW_RF_ID_TYPE_HR (0x0010A000)
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#define CSR_HW_RF_ID_TYPE_HRCDB (0x00109000)
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#define CSR_HW_RF_ID_TYPE_HRCDB (0x00109F00)
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/* HW_RF CHIP ID */
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#define CSR_HW_RF_ID_TYPE_CHIP_ID(_val) (((_val) >> 12) & 0xFFF)
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/* EEPROM REG */
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#define CSR_EEPROM_REG_READ_VALID_MSK (0x00000001)
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@ -690,12 +690,23 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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iwl_trans->cfg = cfg_7265d;
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}
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if (iwl_trans->cfg->rf_id && cfg == &iwla000_2ac_cfg_hr_cdb) {
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if (iwl_trans->hw_rf_id == CSR_HW_RF_ID_TYPE_JF)
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cfg = &iwla000_2ac_cfg_jf;
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else if (iwl_trans->hw_rf_id == CSR_HW_RF_ID_TYPE_HR)
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cfg = &iwla000_2ac_cfg_hr;
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if (iwl_trans->cfg->rf_id && cfg == &iwla000_2ac_cfg_hr_cdb &&
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iwl_trans->hw_rev != CSR_HW_REV_TYPE_HR_CDB) {
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u32 rf_id_chp = CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id);
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u32 jf_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF);
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u32 hr_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR);
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if (rf_id_chp == jf_chp_id) {
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
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cfg = &iwla000_2ax_cfg_qnj_jf_b0;
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else
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cfg = &iwla000_2ac_cfg_jf;
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} else if (rf_id_chp == hr_chp_id) {
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
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cfg = &iwla000_2ax_cfg_qnj_hr_a0;
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else
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cfg = &iwla000_2ac_cfg_hr;
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}
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iwl_trans->cfg = cfg;
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}
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#endif
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@ -3145,7 +3145,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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hw_status = iwl_read_prph(trans, UMAG_GEN_HW_STATUS);
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if (hw_status & UMAG_GEN_HW_IS_FPGA)
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trans->cfg = &iwla000_2ax_cfg_qnj_hr;
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trans->cfg = &iwla000_2ax_cfg_qnj_hr_f0;
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else
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trans->cfg = &iwla000_2ac_cfg_hr;
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}
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