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staging: comedi: ni_stc.h: cleanup ni_e_series_enable_second_irq() 

This function is used to enable/disable the second irq on NI e-series
boards. This irq used used to generate dma requests for the counters.

There are only 2 counters (NUM_GPCT) so the default case of the switch
can never occur.

Tidy up this function and remove the unreachable BUG().

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2014-06-19 10:20:33 -07:00 committed by Greg Kroah-Hartman
parent 17733219fb
commit 5f31552031
1 changed files with 17 additions and 24 deletions
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41
drivers/staging/comedi/drivers/ni_mio_common.c
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@ -527,38 +527,31 @@ static void ni_release_cdo_mite_channel(struct comedi_device *dev)
#endif /* PCIDMA */ #endif /* PCIDMA */
} }
/* e-series boards use the second irq signals to generate dma requests for their counters */
#ifdef PCIDMA #ifdef PCIDMA
static void ni_e_series_enable_second_irq(struct comedi_device *dev, static void ni_e_series_enable_second_irq(struct comedi_device *dev,
unsigned gpct_index, short enable) unsigned gpct_index, short enable)
{ {
struct ni_private *devpriv = dev->private; struct ni_private *devpriv = dev->private;
uint16_t val = 0;
int reg;
if (devpriv->is_m_series) if (devpriv->is_m_series || gpct_index > 1)
return; return;
switch (gpct_index) {
case 0: /*
if (enable) { * e-series boards use the second irq signals to generate
devpriv->stc_writew(dev, G0_Gate_Second_Irq_Enable, * dma requests for their counters
Second_IRQ_A_Enable_Register); */
} else { if (gpct_index == 0) {
devpriv->stc_writew(dev, 0, reg = Second_IRQ_A_Enable_Register;
Second_IRQ_A_Enable_Register); if (enable)
} val = G0_Gate_Second_Irq_Enable;
break; } else {
case 1: reg = Second_IRQ_B_Enable_Register;
if (enable) { if (enable)
devpriv->stc_writew(dev, G1_Gate_Second_Irq_Enable, val = G1_Gate_Second_Irq_Enable;
Second_IRQ_B_Enable_Register);
} else {
devpriv->stc_writew(dev, 0,
Second_IRQ_B_Enable_Register);
}
break;
default:
BUG();
break;
} }
devpriv->stc_writew(dev, val, reg);
} }
#endif /* PCIDMA */ #endif /* PCIDMA */