mirror of https://gitee.com/openkylin/linux.git
arm64: dts: meson-g12a-sei510: Enable Wifi SDIO module
The SEI510 embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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@ -128,6 +128,20 @@ bl32_reserved: bl32@5000000 {
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no-map;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
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clocks = <&wifi32k>;
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clock-names = "ext_clock";
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};
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wifi32k: wifi32k {
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compatible = "pwm-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
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};
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};
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&cec_AO {
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@ -174,11 +188,47 @@ &i2c3 {
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pinctrl-names = "default";
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};
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&pwm_ef {
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin0";
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};
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&saradc {
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status = "okay";
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vref-supply = <&vddio_ao1v8>;
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};
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/* SDIO */
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&sd_emmc_a {
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status = "okay";
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pinctrl-0 = <&sdio_pins>;
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pinctrl-1 = <&sdio_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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#address-cells = <1>;
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#size-cells = <0>;
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bus-width = <4>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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max-frequency = <100000000>;
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non-removable;
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disable-wp;
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mmc-pwrseq = <&sdio_pwrseq>;
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vmmc-supply = <&vddao_3v3>;
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vqmmc-supply = <&vddio_ao1v8>;
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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};
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};
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/* SD card */
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&sd_emmc_b {
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status = "okay";
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