mirror of https://gitee.com/openkylin/linux.git
Second batch of patches intended for v5.2
* Work on the new debugging infra continues; * Fixes for the 22000 series; * Support for some new FW API changes; * Work on new hardware continues; * Some debugfs cleanups by Greg-KH; * General bugfixes; * Other cleanups; -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEF3LNfgb2BPWm68smoUecoho8xfoFAlykbPEACgkQoUecoho8 xfocxA//XQGIwKM/kNj9idxhZ9ATbTqMx32h6IU5dZvI/8uNOdAT3e+irdqLnpJP aaQfqK/jfmIvQwZ6WUuCTGCQvoC64saJUEB7hxxHDSujYCMeHTdSHPxxmYwUb/4L glTJai9vAl+bAaaVLZukfE4/sTNVbTXDjFD2k7A6Nkb0FeHRLN0yz6Qzkn6wnpIs jlxNLk+w0xnPnEFXqJhp+LX2oyYbhd6iV08rWKs7HnZhyM+hVx9GL+5UwIjqLsdC 6Ps0USMcx2zLgaijihGKRW7P2VT1iMM8vQxf4e87ovOHCFjA3xbWqlw2tWlD70kD +VMYLJYCSo2bZdX1wn8GV7Asfy3gE1Ut8ufQU5v1dOplDmMWvyg1j0+Pat/u/gs0 VGjoqPFgPR5bPNB3yWHNdvXpR6+C4PF5udeBqPOxbM6spa7SnSqxIxPKiUYf4HAu 6BBg+DRvHD9YNYOTRh9w+vblsOQ5EEOZxhP/m+vDmSFoUwaeS/yw/K0iFaJyu5re JOkrCYtB87gtq25gZIJWkhiO/H3x6fY0r0xmiBjdzNbC6z/3ogfNaHlRgzLNu6Mf UjGK7aEeqXG0iP6PA8xfKlD4OJ41hyIpLFBM80+lX010S1PNwMWWO64yu2Vsorpo qmb4unTdYkpRn6Ii3q1XkVhKs3AgIN/hS8MJ25AldDMXEDbfpwY= =qVj2 -----END PGP SIGNATURE----- Merge tag 'iwlwifi-next-for-kalle-2019-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next Second batch of patches intended for v5.2 * Work on the new debugging infra continues; * Fixes for the 22000 series; * Support for some new FW API changes; * Work on new hardware continues; * Some debugfs cleanups by Greg-KH; * General bugfixes; * Other cleanups;
This commit is contained in:
commit
5f659c792a
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@ -180,7 +180,11 @@ static const struct iwl_ht_params iwl_22000_ht_params = {
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.dbgc_supported = true, \
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.min_umac_error_event_table = 0x400000, \
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.d3_debug_data_base_addr = 0x401000, \
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.d3_debug_data_length = 60 * 1024
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.d3_debug_data_length = 60 * 1024, \
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.fw_mon_smem_write_ptr_addr = 0xa0c16c, \
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.fw_mon_smem_write_ptr_msk = 0xfffff, \
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.fw_mon_smem_cycle_cnt_ptr_addr = 0xa0c174, \
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.fw_mon_smem_cycle_cnt_ptr_msk = 0xfffff
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#define IWL_DEVICE_AX200_COMMON \
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IWL_DEVICE_22000_COMMON, \
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@ -190,7 +194,8 @@ static const struct iwl_ht_params iwl_22000_ht_params = {
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IWL_DEVICE_22000_COMMON, \
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.device_family = IWL_DEVICE_FAMILY_22000, \
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.base_params = &iwl_22000_base_params, \
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.csr = &iwl_csr_v1
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.csr = &iwl_csr_v1, \
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.gp2_reg_addr = 0xa02c68
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#define IWL_DEVICE_22560 \
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IWL_DEVICE_22000_COMMON, \
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@ -203,7 +208,9 @@ static const struct iwl_ht_params iwl_22000_ht_params = {
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.device_family = IWL_DEVICE_FAMILY_AX210, \
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.base_params = &iwl_22000_base_params, \
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.csr = &iwl_csr_v1, \
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.min_txq_size = 128
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.min_txq_size = 128, \
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.gp2_reg_addr = 0xd02c68, \
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.min_256_ba_txq_size = 512
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const struct iwl_cfg iwl22000_2ac_cfg_hr = {
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.name = "Intel(R) Dual Band Wireless AC 22000",
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@ -6,7 +6,7 @@
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2015-2017 Intel Deutschland GmbH
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* Copyright (C) 2018 Intel Corporation
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* Copyright (C) 2018 - 2019 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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@ -20,7 +20,7 @@
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* BSD LICENSE
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*
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* Copyright(c) 2015-2017 Intel Deutschland GmbH
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* Copyright (C) 2018 Intel Corporation
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* Copyright (C) 2018 - 2019 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -148,7 +148,11 @@ static const struct iwl_tt_params iwl9000_tt_params = {
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.d3_debug_data_length = 92 * 1024, \
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.ht_params = &iwl9000_ht_params, \
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.nvm_ver = IWL9000_NVM_VERSION, \
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.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
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.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
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.fw_mon_smem_write_ptr_addr = 0xa0476c, \
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.fw_mon_smem_write_ptr_msk = 0xfffff, \
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.fw_mon_smem_cycle_cnt_ptr_addr = 0xa04774, \
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.fw_mon_smem_cycle_cnt_ptr_msk = 0xfffff
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const struct iwl_cfg iwl9160_2ac_cfg = {
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@ -541,6 +541,66 @@ enum iwl_he_htc_flags {
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#define IWL_HE_HTC_LINK_ADAP_UNSOLICITED (2 << IWL_HE_HTC_LINK_ADAP_POS)
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#define IWL_HE_HTC_LINK_ADAP_BOTH (3 << IWL_HE_HTC_LINK_ADAP_POS)
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/**
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* struct iwl_he_sta_context_cmd_v1 - configure FW to work with HE AP
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* @sta_id: STA id
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* @tid_limit: max num of TIDs in TX HE-SU multi-TID agg
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* 0 - bad value, 1 - multi-tid not supported, 2..8 - tid limit
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* @reserved1: reserved byte for future use
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* @reserved2: reserved byte for future use
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* @flags: see %iwl_11ax_sta_ctxt_flags
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* @ref_bssid_addr: reference BSSID used by the AP
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* @reserved0: reserved 2 bytes for aligning the ref_bssid_addr field to 8 bytes
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* @htc_flags: which features are supported in HTC
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* @frag_flags: frag support in A-MSDU
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* @frag_level: frag support level
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* @frag_max_num: max num of "open" MSDUs in the receiver (in power of 2)
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* @frag_min_size: min frag size (except last frag)
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* @pkt_ext: optional, exists according to PPE-present bit in the HE-PHY capa
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* @bss_color: 11ax AP ID that is used in the HE SIG-A to mark inter BSS frame
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* @htc_trig_based_pkt_ext: default PE in 4us units
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* @frame_time_rts_th: HE duration RTS threshold, in units of 32us
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* @rand_alloc_ecwmin: random CWmin = 2**ECWmin-1
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* @rand_alloc_ecwmax: random CWmax = 2**ECWmax-1
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* @reserved3: reserved byte for future use
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* @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues
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*/
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struct iwl_he_sta_context_cmd_v1 {
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u8 sta_id;
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u8 tid_limit;
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u8 reserved1;
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u8 reserved2;
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__le32 flags;
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/* The below fields are set via Multiple BSSID IE */
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u8 ref_bssid_addr[6];
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__le16 reserved0;
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/* The below fields are set via HE-capabilities IE */
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__le32 htc_flags;
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u8 frag_flags;
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u8 frag_level;
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u8 frag_max_num;
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u8 frag_min_size;
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/* The below fields are set via PPE thresholds element */
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struct iwl_he_pkt_ext pkt_ext;
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/* The below fields are set via HE-Operation IE */
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u8 bss_color;
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u8 htc_trig_based_pkt_ext;
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__le16 frame_time_rts_th;
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/* Random access parameter set (i.e. RAPS) */
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u8 rand_alloc_ecwmin;
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u8 rand_alloc_ecwmax;
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__le16 reserved3;
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/* The below fields are set via MU EDCA parameter set element */
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struct iwl_he_backoff_conf trig_based_txf[AC_NUM];
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} __packed; /* STA_CONTEXT_DOT11AX_API_S_VER_1 */
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/**
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* struct iwl_he_sta_context_cmd - configure FW to work with HE AP
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* @sta_id: STA id
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@ -564,6 +624,14 @@ enum iwl_he_htc_flags {
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* @rand_alloc_ecwmax: random CWmax = 2**ECWmax-1
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* @reserved3: reserved byte for future use
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* @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues
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* @max_bssid_indicator: indicator of the max bssid supported on the associated
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* bss
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* @bssid_index: index of the associated VAP
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* @ema_ap: AP supports enhanced Multi BSSID advertisement
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* @profile_periodicity: number of Beacon periods that are needed to receive the
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* complete VAPs info
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* @bssid_count: actual number of VAPs in the MultiBSS Set
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* @reserved4: alignment
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*/
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struct iwl_he_sta_context_cmd {
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u8 sta_id;
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@ -599,7 +667,14 @@ struct iwl_he_sta_context_cmd {
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/* The below fields are set via MU EDCA parameter set element */
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struct iwl_he_backoff_conf trig_based_txf[AC_NUM];
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} __packed; /* STA_CONTEXT_DOT11AX_API_S */
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u8 max_bssid_indicator;
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u8 bssid_index;
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u8 ema_ap;
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u8 profile_periodicity;
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u8 bssid_count;
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u8 reserved4[3];
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} __packed; /* STA_CONTEXT_DOT11AX_API_S_VER_2 */
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/**
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* struct iwl_he_monitor_cmd - configure air sniffer for HE
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@ -967,10 +967,11 @@ iwl_fw_error_dump_file(struct iwl_fw_runtime *fwrt,
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if (fifo_len) {
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iwl_fw_dump_rxf(fwrt, &dump_data);
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iwl_fw_dump_txf(fwrt, &dump_data);
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if (radio_len)
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iwl_read_radio_regs(fwrt, &dump_data);
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}
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if (radio_len)
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iwl_read_radio_regs(fwrt, &dump_data);
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if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
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fwrt->dump.desc) {
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dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
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@ -1049,14 +1050,14 @@ static int iwl_dump_ini_prph_iter(struct iwl_fw_runtime *fwrt,
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{
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struct iwl_fw_ini_error_dump_range *range = range_ptr;
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__le32 *val = range->data;
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u32 addr, prph_val, offset = le32_to_cpu(reg->offset);
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u32 prph_val;
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u32 addr = le32_to_cpu(reg->start_addr[idx]) + le32_to_cpu(reg->offset);
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int i;
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range->start_addr = reg->start_addr[idx];
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range->start_addr = cpu_to_le64(addr);
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range->range_data_size = reg->internal.range_data_size;
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for (i = 0; i < le32_to_cpu(reg->internal.range_data_size); i += 4) {
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addr = le32_to_cpu(range->start_addr) + i;
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prph_val = iwl_read_prph(fwrt->trans, addr + offset);
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prph_val = iwl_read_prph(fwrt->trans, addr + i);
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if (prph_val == 0x5a5a5a5a)
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return -EBUSY;
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*val++ = cpu_to_le32(prph_val);
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@ -1071,16 +1072,13 @@ static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt,
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{
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struct iwl_fw_ini_error_dump_range *range = range_ptr;
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__le32 *val = range->data;
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u32 addr, offset = le32_to_cpu(reg->offset);
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u32 addr = le32_to_cpu(reg->start_addr[idx]) + le32_to_cpu(reg->offset);
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int i;
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range->start_addr = reg->start_addr[idx];
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range->start_addr = cpu_to_le64(addr);
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range->range_data_size = reg->internal.range_data_size;
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for (i = 0; i < le32_to_cpu(reg->internal.range_data_size); i += 4) {
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addr = le32_to_cpu(range->start_addr) + i;
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*val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans,
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addr + offset));
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}
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for (i = 0; i < le32_to_cpu(reg->internal.range_data_size); i += 4)
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*val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans, addr + i));
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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}
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@ -1090,12 +1088,11 @@ static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt,
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void *range_ptr, int idx)
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{
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struct iwl_fw_ini_error_dump_range *range = range_ptr;
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u32 addr = le32_to_cpu(range->start_addr);
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u32 offset = le32_to_cpu(reg->offset);
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u32 addr = le32_to_cpu(reg->start_addr[idx]) + le32_to_cpu(reg->offset);
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range->start_addr = reg->start_addr[idx];
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range->start_addr = cpu_to_le64(addr);
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range->range_data_size = reg->internal.range_data_size;
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iwl_trans_read_mem_bytes(fwrt->trans, addr + offset, range->data,
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iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
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le32_to_cpu(reg->internal.range_data_size));
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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@ -1109,7 +1106,7 @@ iwl_dump_ini_paging_gen2_iter(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_error_dump_range *range = range_ptr;
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u32 page_size = fwrt->trans->init_dram.paging[idx].size;
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range->start_addr = cpu_to_le32(idx);
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range->start_addr = cpu_to_le64(idx);
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range->range_data_size = cpu_to_le32(page_size);
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memcpy(range->data, fwrt->trans->init_dram.paging[idx].block,
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page_size);
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@ -1129,7 +1126,7 @@ static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
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dma_addr_t addr = fwrt->fw_paging_db[idx].fw_paging_phys;
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u32 page_size = fwrt->fw_paging_db[idx].fw_paging_size;
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range->start_addr = cpu_to_le32(idx);
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range->start_addr = cpu_to_le64(idx);
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range->range_data_size = cpu_to_le32(page_size);
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dma_sync_single_for_cpu(fwrt->trans->dev, addr, page_size,
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DMA_BIDIRECTIONAL);
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|
@ -1152,7 +1149,7 @@ iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt,
|
|||
if (start_addr == 0x5a5a5a5a)
|
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return -EBUSY;
|
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|
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range->start_addr = cpu_to_le32(start_addr);
|
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range->start_addr = cpu_to_le64(start_addr);
|
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range->range_data_size = cpu_to_le32(fwrt->trans->fw_mon[idx].size);
|
||||
|
||||
memcpy(range->data, fwrt->trans->fw_mon[idx].block,
|
||||
|
@ -1228,10 +1225,11 @@ static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
|
|||
{
|
||||
struct iwl_fw_ini_fifo_error_dump_range *range = range_ptr;
|
||||
struct iwl_ini_txf_iter_data *iter;
|
||||
struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
|
||||
u32 offs = le32_to_cpu(reg->offset), addr;
|
||||
u32 registers_size =
|
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le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32);
|
||||
__le32 *val = range->data;
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(*reg_dump);
|
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__le32 *data;
|
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unsigned long flags;
|
||||
int i;
|
||||
|
||||
|
@ -1249,11 +1247,18 @@ static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
|
|||
|
||||
iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
|
||||
|
||||
/* read txf registers */
|
||||
/*
|
||||
* read txf registers. for each register, write to the dump the
|
||||
* register address and its value
|
||||
*/
|
||||
for (i = 0; i < le32_to_cpu(reg->fifos.num_of_registers); i++) {
|
||||
addr = le32_to_cpu(reg->start_addr[i]) + offs;
|
||||
|
||||
*val++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
reg_dump->addr = cpu_to_le32(addr);
|
||||
reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
|
||||
addr));
|
||||
|
||||
reg_dump++;
|
||||
}
|
||||
|
||||
if (reg->fifos.header_only) {
|
||||
|
@ -1270,8 +1275,9 @@ static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
|
|||
|
||||
/* Read FIFO */
|
||||
addr = TXF_READ_MODIFY_DATA + offs;
|
||||
for (i = 0; i < iter->fifo_size; i += sizeof(__le32))
|
||||
*val++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
data = (void *)reg_dump;
|
||||
for (i = 0; i < iter->fifo_size; i += sizeof(*data))
|
||||
*data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
|
||||
out:
|
||||
iwl_trans_release_nic_access(fwrt->trans, &flags);
|
||||
|
@ -1327,10 +1333,11 @@ static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
|
|||
{
|
||||
struct iwl_fw_ini_fifo_error_dump_range *range = range_ptr;
|
||||
struct iwl_ini_rxf_data rxf_data;
|
||||
struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
|
||||
u32 offs = le32_to_cpu(reg->offset), addr;
|
||||
u32 registers_size =
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32);
|
||||
__le32 *val = range->data;
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(*reg_dump);
|
||||
__le32 *data;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
|
@ -1341,17 +1348,22 @@ static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
|
|||
if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
|
||||
return -EBUSY;
|
||||
|
||||
offs += rxf_data.offset;
|
||||
|
||||
range->fifo_num = cpu_to_le32(rxf_data.fifo_num);
|
||||
range->num_of_registers = reg->fifos.num_of_registers;
|
||||
range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
|
||||
|
||||
/* read rxf registers */
|
||||
/*
|
||||
* read rxf registers. for each register, write to the dump the
|
||||
* register address and its value
|
||||
*/
|
||||
for (i = 0; i < le32_to_cpu(reg->fifos.num_of_registers); i++) {
|
||||
addr = le32_to_cpu(reg->start_addr[i]) + offs;
|
||||
|
||||
*val++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
reg_dump->addr = cpu_to_le32(addr);
|
||||
reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
|
||||
addr));
|
||||
|
||||
reg_dump++;
|
||||
}
|
||||
|
||||
if (reg->fifos.header_only) {
|
||||
|
@ -1359,6 +1371,12 @@ static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
|
|||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* region register have absolute value so apply rxf offset after
|
||||
* reading the registers
|
||||
*/
|
||||
offs += rxf_data.offset;
|
||||
|
||||
/* Lock fence */
|
||||
iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
|
||||
/* Set fence pointer to the same place like WR pointer */
|
||||
|
@ -1369,8 +1387,9 @@ static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
|
|||
|
||||
/* Read FIFO */
|
||||
addr = RXF_FIFO_RD_FENCE_INC + offs;
|
||||
for (i = 0; i < rxf_data.size; i += sizeof(__le32))
|
||||
*val++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
data = (void *)reg_dump;
|
||||
for (i = 0; i < rxf_data.size; i += sizeof(*data))
|
||||
*data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
|
||||
out:
|
||||
iwl_trans_release_nic_access(fwrt->trans, &flags);
|
||||
|
@ -1384,32 +1403,86 @@ static void *iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
|
|||
{
|
||||
struct iwl_fw_ini_error_dump *dump = data;
|
||||
|
||||
dump->header.version = cpu_to_le32(IWL_INI_DUMP_MEM_VER);
|
||||
|
||||
return dump->ranges;
|
||||
}
|
||||
|
||||
static void
|
||||
*iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_fw_ini_region_cfg *reg,
|
||||
struct iwl_fw_ini_monitor_dump *data,
|
||||
u32 write_ptr_addr, u32 write_ptr_msk,
|
||||
u32 cycle_cnt_addr, u32 cycle_cnt_msk)
|
||||
{
|
||||
u32 write_ptr, cycle_cnt;
|
||||
unsigned long flags;
|
||||
|
||||
if (!iwl_trans_grab_nic_access(fwrt->trans, &flags)) {
|
||||
IWL_ERR(fwrt, "Failed to get monitor header\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
write_ptr = iwl_read_prph_no_grab(fwrt->trans, write_ptr_addr);
|
||||
cycle_cnt = iwl_read_prph_no_grab(fwrt->trans, cycle_cnt_addr);
|
||||
|
||||
iwl_trans_release_nic_access(fwrt->trans, &flags);
|
||||
|
||||
data->header.version = cpu_to_le32(IWL_INI_DUMP_MONITOR_VER);
|
||||
data->write_ptr = cpu_to_le32(write_ptr & write_ptr_msk);
|
||||
data->cycle_cnt = cpu_to_le32(cycle_cnt & cycle_cnt_msk);
|
||||
|
||||
return data->ranges;
|
||||
}
|
||||
|
||||
static void
|
||||
*iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_fw_ini_region_cfg *reg,
|
||||
void *data)
|
||||
{
|
||||
struct iwl_fw_ini_monitor_dram_dump *mon_dump = (void *)data;
|
||||
u32 write_ptr, cycle_cnt;
|
||||
unsigned long flags;
|
||||
struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
|
||||
u32 write_ptr_addr, write_ptr_msk, cycle_cnt_addr, cycle_cnt_msk;
|
||||
|
||||
if (!iwl_trans_grab_nic_access(fwrt->trans, &flags)) {
|
||||
IWL_ERR(fwrt, "Failed to get DRAM monitor header\n");
|
||||
switch (fwrt->trans->cfg->device_family) {
|
||||
case IWL_DEVICE_FAMILY_9000:
|
||||
case IWL_DEVICE_FAMILY_22000:
|
||||
write_ptr_addr = MON_BUFF_WRPTR_VER2;
|
||||
write_ptr_msk = -1;
|
||||
cycle_cnt_addr = MON_BUFF_CYCLE_CNT_VER2;
|
||||
cycle_cnt_msk = -1;
|
||||
break;
|
||||
default:
|
||||
IWL_ERR(fwrt, "Unsupported device family %d\n",
|
||||
fwrt->trans->cfg->device_family);
|
||||
return NULL;
|
||||
}
|
||||
write_ptr = iwl_read_umac_prph_no_grab(fwrt->trans,
|
||||
MON_BUFF_WRPTR_VER2);
|
||||
cycle_cnt = iwl_read_umac_prph_no_grab(fwrt->trans,
|
||||
MON_BUFF_CYCLE_CNT_VER2);
|
||||
iwl_trans_release_nic_access(fwrt->trans, &flags);
|
||||
|
||||
mon_dump->write_ptr = cpu_to_le32(write_ptr);
|
||||
mon_dump->cycle_cnt = cpu_to_le32(cycle_cnt);
|
||||
return iwl_dump_ini_mon_fill_header(fwrt, reg, mon_dump, write_ptr_addr,
|
||||
write_ptr_msk, cycle_cnt_addr,
|
||||
cycle_cnt_msk);
|
||||
}
|
||||
|
||||
static void
|
||||
*iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_fw_ini_region_cfg *reg,
|
||||
void *data)
|
||||
{
|
||||
struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
|
||||
const struct iwl_cfg *cfg = fwrt->trans->cfg;
|
||||
|
||||
if (fwrt->trans->cfg->device_family != IWL_DEVICE_FAMILY_9000 &&
|
||||
fwrt->trans->cfg->device_family != IWL_DEVICE_FAMILY_22000) {
|
||||
IWL_ERR(fwrt, "Unsupported device family %d\n",
|
||||
fwrt->trans->cfg->device_family);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return iwl_dump_ini_mon_fill_header(fwrt, reg, mon_dump,
|
||||
cfg->fw_mon_smem_write_ptr_addr,
|
||||
cfg->fw_mon_smem_write_ptr_msk,
|
||||
cfg->fw_mon_smem_cycle_cnt_ptr_addr,
|
||||
cfg->fw_mon_smem_cycle_cnt_ptr_msk);
|
||||
|
||||
return mon_dump->ranges;
|
||||
}
|
||||
|
||||
static void *iwl_dump_ini_fifo_fill_header(struct iwl_fw_runtime *fwrt,
|
||||
|
@ -1418,6 +1491,8 @@ static void *iwl_dump_ini_fifo_fill_header(struct iwl_fw_runtime *fwrt,
|
|||
{
|
||||
struct iwl_fw_ini_fifo_error_dump *dump = data;
|
||||
|
||||
dump->header.version = cpu_to_le32(IWL_INI_DUMP_FIFO_VER);
|
||||
|
||||
return dump->ranges;
|
||||
}
|
||||
|
||||
|
@ -1509,7 +1584,8 @@ static u32 iwl_dump_ini_paging_get_size(struct iwl_fw_runtime *fwrt,
|
|||
static u32 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_fw_ini_region_cfg *reg)
|
||||
{
|
||||
u32 size = sizeof(struct iwl_fw_ini_monitor_dram_dump);
|
||||
u32 size = sizeof(struct iwl_fw_ini_monitor_dump) +
|
||||
sizeof(struct iwl_fw_ini_error_dump_range);
|
||||
|
||||
if (fwrt->trans->num_blocks)
|
||||
size += fwrt->trans->fw_mon[0].size;
|
||||
|
@ -1517,6 +1593,15 @@ static u32 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime *fwrt,
|
|||
return size;
|
||||
}
|
||||
|
||||
static u32 iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_fw_ini_region_cfg *reg)
|
||||
{
|
||||
return sizeof(struct iwl_fw_ini_monitor_dump) +
|
||||
iwl_dump_ini_mem_ranges(fwrt, reg) *
|
||||
(sizeof(struct iwl_fw_ini_error_dump_range) +
|
||||
le32_to_cpu(reg->internal.range_data_size));
|
||||
}
|
||||
|
||||
static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_fw_ini_region_cfg *reg)
|
||||
{
|
||||
|
@ -1524,7 +1609,7 @@ static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
|
|||
void *fifo_iter = fwrt->dump.fifo_iter;
|
||||
u32 size = 0;
|
||||
u32 fifo_hdr = sizeof(struct iwl_fw_ini_fifo_error_dump_range) +
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32);
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32) * 2;
|
||||
|
||||
fwrt->dump.fifo_iter = &iter;
|
||||
while (iwl_ini_txf_iter(fwrt, reg)) {
|
||||
|
@ -1547,7 +1632,7 @@ static u32 iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime *fwrt,
|
|||
struct iwl_ini_rxf_data rx_data;
|
||||
u32 size = sizeof(struct iwl_fw_ini_fifo_error_dump) +
|
||||
sizeof(struct iwl_fw_ini_fifo_error_dump_range) +
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32);
|
||||
le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32) * 2;
|
||||
|
||||
if (reg->fifos.header_only)
|
||||
return size;
|
||||
|
@ -1584,17 +1669,17 @@ struct iwl_dump_ini_mem_ops {
|
|||
* @fwrt: fw runtime struct.
|
||||
* @data: dump memory data.
|
||||
* @reg: region to copy to the dump.
|
||||
* @ops: memory dump operations.
|
||||
*/
|
||||
static void
|
||||
iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt,
|
||||
enum iwl_fw_ini_region_type type,
|
||||
struct iwl_fw_error_dump_data **data,
|
||||
struct iwl_fw_ini_region_cfg *reg,
|
||||
struct iwl_dump_ini_mem_ops *ops)
|
||||
{
|
||||
struct iwl_fw_ini_error_dump_header *header = (void *)(*data)->data;
|
||||
u32 num_of_ranges, i, type = le32_to_cpu(reg->region_type);
|
||||
void *range;
|
||||
u32 num_of_ranges, i;
|
||||
|
||||
if (WARN_ON(!ops || !ops->get_num_of_ranges || !ops->get_size ||
|
||||
!ops->fill_mem_hdr || !ops->fill_range))
|
||||
|
@ -1605,6 +1690,7 @@ iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt,
|
|||
(*data)->type = cpu_to_le32(type | INI_DUMP_BIT);
|
||||
(*data)->len = cpu_to_le32(ops->get_size(fwrt, reg));
|
||||
|
||||
header->region_id = reg->region_id;
|
||||
header->num_of_ranges = cpu_to_le32(num_of_ranges);
|
||||
header->name_len = cpu_to_le32(min_t(int, IWL_FW_INI_MAX_NAME,
|
||||
le32_to_cpu(reg->name_len)));
|
||||
|
@ -1641,7 +1727,6 @@ static int iwl_fw_ini_get_trigger_len(struct iwl_fw_runtime *fwrt,
|
|||
for (i = 0; i < le32_to_cpu(trigger->num_regions); i++) {
|
||||
u32 reg_id = le32_to_cpu(trigger->data[i]);
|
||||
struct iwl_fw_ini_region_cfg *reg;
|
||||
enum iwl_fw_ini_region_type type;
|
||||
|
||||
if (WARN_ON(reg_id >= ARRAY_SIZE(fwrt->dump.active_regs)))
|
||||
continue;
|
||||
|
@ -1650,13 +1735,11 @@ static int iwl_fw_ini_get_trigger_len(struct iwl_fw_runtime *fwrt,
|
|||
if (WARN(!reg, "Unassigned region %d\n", reg_id))
|
||||
continue;
|
||||
|
||||
type = le32_to_cpu(reg->region_type);
|
||||
switch (type) {
|
||||
switch (le32_to_cpu(reg->region_type)) {
|
||||
case IWL_FW_INI_REGION_DEVICE_MEMORY:
|
||||
case IWL_FW_INI_REGION_PERIPHERY_MAC:
|
||||
case IWL_FW_INI_REGION_PERIPHERY_PHY:
|
||||
case IWL_FW_INI_REGION_PERIPHERY_AUX:
|
||||
case IWL_FW_INI_REGION_INTERNAL_BUFFER:
|
||||
case IWL_FW_INI_REGION_CSR:
|
||||
size += hdr_len + iwl_dump_ini_mem_get_size(fwrt, reg);
|
||||
break;
|
||||
|
@ -1666,7 +1749,7 @@ static int iwl_fw_ini_get_trigger_len(struct iwl_fw_runtime *fwrt,
|
|||
case IWL_FW_INI_REGION_RXF:
|
||||
size += hdr_len + iwl_dump_ini_rxf_get_size(fwrt, reg);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_PAGING: {
|
||||
case IWL_FW_INI_REGION_PAGING:
|
||||
size += hdr_len;
|
||||
if (iwl_fw_dbg_is_paging_enabled(fwrt)) {
|
||||
size += iwl_dump_ini_paging_get_size(fwrt, reg);
|
||||
|
@ -1675,13 +1758,16 @@ static int iwl_fw_ini_get_trigger_len(struct iwl_fw_runtime *fwrt,
|
|||
reg);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case IWL_FW_INI_REGION_DRAM_BUFFER:
|
||||
if (!fwrt->trans->num_blocks)
|
||||
break;
|
||||
size += hdr_len +
|
||||
iwl_dump_ini_mon_dram_get_size(fwrt, reg);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_INTERNAL_BUFFER:
|
||||
size += hdr_len +
|
||||
iwl_dump_ini_mon_smem_get_size(fwrt, reg);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_DRAM_IMR:
|
||||
/* Undefined yet */
|
||||
default:
|
||||
|
@ -1699,7 +1785,6 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
|
|||
|
||||
for (i = 0; i < num; i++) {
|
||||
u32 reg_id = le32_to_cpu(trigger->data[i]);
|
||||
enum iwl_fw_ini_region_type type;
|
||||
struct iwl_fw_ini_region_cfg *reg;
|
||||
struct iwl_dump_ini_mem_ops ops;
|
||||
|
||||
|
@ -1711,15 +1796,17 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
|
|||
if (!reg)
|
||||
continue;
|
||||
|
||||
type = le32_to_cpu(reg->region_type);
|
||||
switch (type) {
|
||||
/* currently the driver supports always on domain only */
|
||||
if (le32_to_cpu(reg->domain) != IWL_FW_INI_DBG_DOMAIN_ALWAYS_ON)
|
||||
continue;
|
||||
|
||||
switch (le32_to_cpu(reg->region_type)) {
|
||||
case IWL_FW_INI_REGION_DEVICE_MEMORY:
|
||||
case IWL_FW_INI_REGION_INTERNAL_BUFFER:
|
||||
ops.get_num_of_ranges = iwl_dump_ini_mem_ranges;
|
||||
ops.get_size = iwl_dump_ini_mem_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_mem_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_dev_mem_iter;
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_PERIPHERY_MAC:
|
||||
case IWL_FW_INI_REGION_PERIPHERY_PHY:
|
||||
|
@ -1728,16 +1815,23 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
|
|||
ops.get_size = iwl_dump_ini_mem_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_mem_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_prph_iter;
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_DRAM_BUFFER:
|
||||
ops.get_num_of_ranges = iwl_dump_ini_mon_dram_ranges;
|
||||
ops.get_size = iwl_dump_ini_mon_dram_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_mon_dram_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_mon_dram_iter;
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_PAGING: {
|
||||
case IWL_FW_INI_REGION_INTERNAL_BUFFER:
|
||||
ops.get_num_of_ranges = iwl_dump_ini_mem_ranges;
|
||||
ops.get_size = iwl_dump_ini_mon_smem_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_mon_smem_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_dev_mem_iter;
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_PAGING:
|
||||
ops.fill_mem_hdr = iwl_dump_ini_mem_fill_header;
|
||||
if (iwl_fw_dbg_is_paging_enabled(fwrt)) {
|
||||
ops.get_num_of_ranges =
|
||||
|
@ -1752,9 +1846,8 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
|
|||
ops.fill_range = iwl_dump_ini_paging_gen2_iter;
|
||||
}
|
||||
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
}
|
||||
case IWL_FW_INI_REGION_TXF: {
|
||||
struct iwl_ini_txf_iter_data iter = { .init = true };
|
||||
void *fifo_iter = fwrt->dump.fifo_iter;
|
||||
|
@ -1764,7 +1857,7 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
|
|||
ops.get_size = iwl_dump_ini_txf_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_fifo_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_txf_iter;
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
fwrt->dump.fifo_iter = fifo_iter;
|
||||
break;
|
||||
}
|
||||
|
@ -1773,14 +1866,14 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
|
|||
ops.get_size = iwl_dump_ini_rxf_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_fifo_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_rxf_iter;
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_CSR:
|
||||
ops.get_num_of_ranges = iwl_dump_ini_mem_ranges;
|
||||
ops.get_size = iwl_dump_ini_mem_get_size;
|
||||
ops.fill_mem_hdr = iwl_dump_ini_mem_fill_header;
|
||||
ops.fill_range = iwl_dump_ini_csr_iter;
|
||||
iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
|
||||
iwl_dump_ini_mem(fwrt, data, reg, &ops);
|
||||
break;
|
||||
case IWL_FW_INI_REGION_DRAM_IMR:
|
||||
/* This is undefined yet */
|
||||
|
@ -2320,6 +2413,10 @@ static void iwl_fw_dbg_send_hcmd(struct iwl_fw_runtime *fwrt,
|
|||
.data = { data->data, },
|
||||
};
|
||||
|
||||
/* currently the driver supports always on domain only */
|
||||
if (le32_to_cpu(hcmd_tlv->domain) != IWL_FW_INI_DBG_DOMAIN_ALWAYS_ON)
|
||||
return;
|
||||
|
||||
iwl_trans_send_cmd(fwrt->trans, &hcmd);
|
||||
}
|
||||
|
||||
|
|
|
@ -458,4 +458,14 @@ static inline void iwl_fw_umac_set_alive_err_table(struct iwl_trans *trans,
|
|||
/* This bit is used to differentiate the legacy dump from the ini dump */
|
||||
#define INI_DUMP_BIT BIT(31)
|
||||
|
||||
static inline void iwl_fw_error_collect(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
if (fwrt->trans->ini_valid && fwrt->trans->hw_error) {
|
||||
_iwl_fw_dbg_ini_collect(fwrt, IWL_FW_TRIGGER_ID_FW_HW_ERROR);
|
||||
fwrt->trans->hw_error = false;
|
||||
} else {
|
||||
iwl_fw_dbg_collect_desc(fwrt, &iwl_dump_desc_assert, false, 0);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* __iwl_fw_dbg_h__ */
|
||||
|
|
|
@ -278,25 +278,33 @@ struct iwl_fw_error_dump_mem {
|
|||
u8 data[];
|
||||
};
|
||||
|
||||
#define IWL_INI_DUMP_MEM_VER 1
|
||||
#define IWL_INI_DUMP_MONITOR_VER 1
|
||||
#define IWL_INI_DUMP_FIFO_VER 1
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_error_dump_range - range of memory
|
||||
* @start_addr: the start address of this range
|
||||
* @range_data_size: the size of this range, in bytes
|
||||
* @start_addr: the start address of this range
|
||||
* @data: the actual memory
|
||||
*/
|
||||
struct iwl_fw_ini_error_dump_range {
|
||||
__le32 start_addr;
|
||||
__le32 range_data_size;
|
||||
__le64 start_addr;
|
||||
__le32 data[];
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_error_dump_header - ini region dump header
|
||||
* @version: dump version
|
||||
* @region_id: id of the region
|
||||
* @num_of_ranges: number of ranges in this region
|
||||
* @name_len: number of bytes allocated to the name string of this region
|
||||
* @name: name of the region
|
||||
*/
|
||||
struct iwl_fw_ini_error_dump_header {
|
||||
__le32 version;
|
||||
__le32 region_id;
|
||||
__le32 num_of_ranges;
|
||||
__le32 name_len;
|
||||
u8 name[IWL_FW_INI_MAX_NAME];
|
||||
|
@ -315,13 +323,24 @@ struct iwl_fw_ini_error_dump {
|
|||
/* This bit is used to differentiate between lmac and umac rxf */
|
||||
#define IWL_RXF_UMAC_BIT BIT(31)
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_error_dump_register - ini register dump
|
||||
* @addr: address of the register
|
||||
* @data: data of the register
|
||||
*/
|
||||
struct iwl_fw_ini_error_dump_register {
|
||||
__le32 addr;
|
||||
__le32 data;
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_fifo_error_dump_range - ini fifo range dump
|
||||
* @fifo_num: the fifo num. In case of rxf and umac rxf, set BIT(31) to
|
||||
* distinguish between lmac and umac
|
||||
* @num_of_registers: num of registers to dump, dword size each
|
||||
* @range_data_size: the size of the registers and fifo data
|
||||
* @data: fifo data
|
||||
* @range_data_size: the size of the data
|
||||
* @data: consist of
|
||||
* num_of_registers * (register address + register value) + fifo data
|
||||
*/
|
||||
struct iwl_fw_ini_fifo_error_dump_range {
|
||||
__le32 fifo_num;
|
||||
|
@ -355,13 +374,13 @@ struct iwl_fw_error_dump_rb {
|
|||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_monitor_dram_dump - ini dram monitor dump
|
||||
* struct iwl_fw_ini_monitor_dump - ini monitor dump
|
||||
* @header - header of the region
|
||||
* @write_ptr - write pointer position in the dram
|
||||
* @write_ptr - write pointer position in the buffer
|
||||
* @cycle_cnt - cycles count
|
||||
* @ranges - the memory ranges of this this region
|
||||
*/
|
||||
struct iwl_fw_ini_monitor_dram_dump {
|
||||
struct iwl_fw_ini_monitor_dump {
|
||||
struct iwl_fw_ini_error_dump_header header;
|
||||
__le32 write_ptr;
|
||||
__le32 cycle_cnt;
|
||||
|
|
|
@ -279,6 +279,8 @@ typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
|
|||
* @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
|
||||
* SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
|
||||
* SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
|
||||
* @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
|
||||
* STA_CONTEXT_DOT11AX_API_S
|
||||
*
|
||||
* @NUM_IWL_UCODE_TLV_API: number of bits used
|
||||
*/
|
||||
|
@ -308,6 +310,7 @@ enum iwl_ucode_tlv_api {
|
|||
IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,
|
||||
IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,
|
||||
IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,
|
||||
IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,
|
||||
|
||||
NUM_IWL_UCODE_TLV_API
|
||||
#ifdef __CHECKER__
|
||||
|
|
|
@ -384,6 +384,8 @@ struct iwl_csr_params {
|
|||
* @min_txq_size: minimum number of slots required in a TX queue
|
||||
* @umac_prph_offset: offset to add to UMAC periphery address
|
||||
* @uhb_supported: ultra high band channels supported
|
||||
* @min_256_ba_txq_size: minimum number of slots required in a TX queue which
|
||||
* supports 256 BA aggregation
|
||||
*
|
||||
* We enable the driver to be backward compatible wrt. hardware features.
|
||||
* API differences in uCode shouldn't be handled here but through TLVs
|
||||
|
@ -452,6 +454,12 @@ struct iwl_cfg {
|
|||
u32 d3_debug_data_length;
|
||||
u32 min_txq_size;
|
||||
u32 umac_prph_offset;
|
||||
u32 fw_mon_smem_write_ptr_addr;
|
||||
u32 fw_mon_smem_write_ptr_msk;
|
||||
u32 fw_mon_smem_cycle_cnt_ptr_addr;
|
||||
u32 fw_mon_smem_cycle_cnt_ptr_msk;
|
||||
u32 gp2_reg_addr;
|
||||
u32 min_256_ba_txq_size;
|
||||
};
|
||||
|
||||
extern const struct iwl_csr_params iwl_csr_v1;
|
||||
|
|
|
@ -651,12 +651,7 @@ static struct ieee80211_sband_iftype_data iwl_he_capa[] = {
|
|||
static void iwl_init_he_hw_capab(struct ieee80211_supported_band *sband,
|
||||
u8 tx_chains, u8 rx_chains)
|
||||
{
|
||||
if (sband->band == NL80211_BAND_2GHZ ||
|
||||
sband->band == NL80211_BAND_5GHZ)
|
||||
sband->iftype_data = iwl_he_capa;
|
||||
else
|
||||
return;
|
||||
|
||||
sband->iftype_data = iwl_he_capa;
|
||||
sband->n_iftype_data = ARRAY_SIZE(iwl_he_capa);
|
||||
|
||||
/* If not 2x2, we need to indicate 1x1 in the Midamble RX Max NSTS */
|
||||
|
|
|
@ -768,6 +768,7 @@ struct iwl_self_init_dram {
|
|||
* @umac_error_event_table: addr of umac error table
|
||||
* @error_event_table_tlv_status: bitmap that indicates what error table
|
||||
* pointers was recevied via TLV. use enum &iwl_error_event_table_status
|
||||
* @hw_error: equals true if hw error interrupt was received from the FW
|
||||
*/
|
||||
struct iwl_trans {
|
||||
const struct iwl_trans_ops *ops;
|
||||
|
@ -831,6 +832,7 @@ struct iwl_trans {
|
|||
u32 umac_error_event_table;
|
||||
unsigned int error_event_table_tlv_status;
|
||||
wait_queue_head_t fw_halt_waitq;
|
||||
bool hw_error;
|
||||
|
||||
/* pointer to trans specific struct */
|
||||
/*Ensure that this pointer will always be aligned to sizeof pointer */
|
||||
|
|
|
@ -743,9 +743,8 @@ static ssize_t iwl_dbgfs_quota_min_read(struct file *file,
|
|||
#define MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz) \
|
||||
_MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz, struct ieee80211_vif)
|
||||
#define MVM_DEBUGFS_ADD_FILE_VIF(name, parent, mode) do { \
|
||||
if (!debugfs_create_file(#name, mode, parent, vif, \
|
||||
&iwl_dbgfs_##name##_ops)) \
|
||||
goto err; \
|
||||
debugfs_create_file(#name, mode, parent, vif, \
|
||||
&iwl_dbgfs_##name##_ops); \
|
||||
} while (0)
|
||||
|
||||
MVM_DEBUGFS_READ_FILE_OPS(mac_params);
|
||||
|
@ -775,12 +774,6 @@ void iwl_mvm_vif_dbgfs_register(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
|||
|
||||
mvmvif->dbgfs_dir = debugfs_create_dir("iwlmvm", dbgfs_dir);
|
||||
|
||||
if (!mvmvif->dbgfs_dir) {
|
||||
IWL_ERR(mvm, "Failed to create debugfs directory under %pd\n",
|
||||
dbgfs_dir);
|
||||
return;
|
||||
}
|
||||
|
||||
if (iwlmvm_mod_params.power_scheme != IWL_POWER_SCHEME_CAM &&
|
||||
((vif->type == NL80211_IFTYPE_STATION && !vif->p2p) ||
|
||||
(vif->type == NL80211_IFTYPE_STATION && vif->p2p)))
|
||||
|
@ -812,12 +805,6 @@ void iwl_mvm_vif_dbgfs_register(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
|||
|
||||
mvmvif->dbgfs_slink = debugfs_create_symlink(dbgfs_dir->d_name.name,
|
||||
mvm->debugfs_dir, buf);
|
||||
if (!mvmvif->dbgfs_slink)
|
||||
IWL_ERR(mvm, "Can't create debugfs symbolic link under %pd\n",
|
||||
dbgfs_dir);
|
||||
return;
|
||||
err:
|
||||
IWL_ERR(mvm, "Can't create debugfs entity\n");
|
||||
}
|
||||
|
||||
void iwl_mvm_vif_dbgfs_clean(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
||||
|
|
|
@ -1696,9 +1696,8 @@ static ssize_t iwl_dbgfs_d0i3_refs_write(struct iwl_mvm *mvm, char *buf,
|
|||
#define MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz) \
|
||||
_MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz, struct iwl_mvm)
|
||||
#define MVM_DEBUGFS_ADD_FILE_ALIAS(alias, name, parent, mode) do { \
|
||||
if (!debugfs_create_file(alias, mode, parent, mvm, \
|
||||
&iwl_dbgfs_##name##_ops)) \
|
||||
goto err; \
|
||||
debugfs_create_file(alias, mode, parent, mvm, \
|
||||
&iwl_dbgfs_##name##_ops); \
|
||||
} while (0)
|
||||
#define MVM_DEBUGFS_ADD_FILE(name, parent, mode) \
|
||||
MVM_DEBUGFS_ADD_FILE_ALIAS(#name, name, parent, mode)
|
||||
|
@ -1709,9 +1708,8 @@ static ssize_t iwl_dbgfs_d0i3_refs_write(struct iwl_mvm *mvm, char *buf,
|
|||
_MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz, struct ieee80211_sta)
|
||||
|
||||
#define MVM_DEBUGFS_ADD_STA_FILE_ALIAS(alias, name, parent, mode) do { \
|
||||
if (!debugfs_create_file(alias, mode, parent, sta, \
|
||||
&iwl_dbgfs_##name##_ops)) \
|
||||
goto err; \
|
||||
debugfs_create_file(alias, mode, parent, sta, \
|
||||
&iwl_dbgfs_##name##_ops); \
|
||||
} while (0)
|
||||
#define MVM_DEBUGFS_ADD_STA_FILE(name, parent, mode) \
|
||||
MVM_DEBUGFS_ADD_STA_FILE_ALIAS(#name, name, parent, mode)
|
||||
|
@ -2092,13 +2090,9 @@ void iwl_mvm_sta_add_debugfs(struct ieee80211_hw *hw,
|
|||
|
||||
if (iwl_mvm_has_tlc_offload(mvm))
|
||||
MVM_DEBUGFS_ADD_STA_FILE(rs_data, dir, 0400);
|
||||
|
||||
return;
|
||||
err:
|
||||
IWL_ERR(mvm, "Can't create the mvm station debugfs entry\n");
|
||||
}
|
||||
|
||||
int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
|
||||
void iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
|
||||
{
|
||||
struct dentry *bcast_dir __maybe_unused;
|
||||
char buf[100];
|
||||
|
@ -2142,14 +2136,10 @@ int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
|
|||
#endif
|
||||
MVM_DEBUGFS_ADD_FILE(he_sniffer_params, mvm->debugfs_dir, 0600);
|
||||
|
||||
if (!debugfs_create_bool("enable_scan_iteration_notif",
|
||||
0600,
|
||||
mvm->debugfs_dir,
|
||||
&mvm->scan_iter_notif_enabled))
|
||||
goto err;
|
||||
if (!debugfs_create_bool("drop_bcn_ap_mode", 0600,
|
||||
mvm->debugfs_dir, &mvm->drop_bcn_ap_mode))
|
||||
goto err;
|
||||
debugfs_create_bool("enable_scan_iteration_notif", 0600,
|
||||
mvm->debugfs_dir, &mvm->scan_iter_notif_enabled);
|
||||
debugfs_create_bool("drop_bcn_ap_mode", 0600, mvm->debugfs_dir,
|
||||
&mvm->drop_bcn_ap_mode);
|
||||
|
||||
MVM_DEBUGFS_ADD_FILE(uapsd_noagg_bssids, mvm->debugfs_dir, S_IRUSR);
|
||||
|
||||
|
@ -2157,13 +2147,9 @@ int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
|
|||
if (mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_BCAST_FILTERING) {
|
||||
bcast_dir = debugfs_create_dir("bcast_filtering",
|
||||
mvm->debugfs_dir);
|
||||
if (!bcast_dir)
|
||||
goto err;
|
||||
|
||||
if (!debugfs_create_bool("override", 0600,
|
||||
bcast_dir,
|
||||
&mvm->dbgfs_bcast_filtering.override))
|
||||
goto err;
|
||||
debugfs_create_bool("override", 0600, bcast_dir,
|
||||
&mvm->dbgfs_bcast_filtering.override);
|
||||
|
||||
MVM_DEBUGFS_ADD_FILE_ALIAS("filters", bcast_filters,
|
||||
bcast_dir, 0600);
|
||||
|
@ -2175,35 +2161,26 @@ int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
|
|||
#ifdef CONFIG_PM_SLEEP
|
||||
MVM_DEBUGFS_ADD_FILE(d3_sram, mvm->debugfs_dir, 0600);
|
||||
MVM_DEBUGFS_ADD_FILE(d3_test, mvm->debugfs_dir, 0400);
|
||||
if (!debugfs_create_bool("d3_wake_sysassert", 0600,
|
||||
mvm->debugfs_dir, &mvm->d3_wake_sysassert))
|
||||
goto err;
|
||||
if (!debugfs_create_u32("last_netdetect_scans", 0400,
|
||||
mvm->debugfs_dir, &mvm->last_netdetect_scans))
|
||||
goto err;
|
||||
debugfs_create_bool("d3_wake_sysassert", 0600, mvm->debugfs_dir,
|
||||
&mvm->d3_wake_sysassert);
|
||||
debugfs_create_u32("last_netdetect_scans", 0400, mvm->debugfs_dir,
|
||||
&mvm->last_netdetect_scans);
|
||||
#endif
|
||||
|
||||
if (!debugfs_create_u8("ps_disabled", 0400,
|
||||
mvm->debugfs_dir, &mvm->ps_disabled))
|
||||
goto err;
|
||||
if (!debugfs_create_blob("nvm_hw", 0400,
|
||||
mvm->debugfs_dir, &mvm->nvm_hw_blob))
|
||||
goto err;
|
||||
if (!debugfs_create_blob("nvm_sw", 0400,
|
||||
mvm->debugfs_dir, &mvm->nvm_sw_blob))
|
||||
goto err;
|
||||
if (!debugfs_create_blob("nvm_calib", 0400,
|
||||
mvm->debugfs_dir, &mvm->nvm_calib_blob))
|
||||
goto err;
|
||||
if (!debugfs_create_blob("nvm_prod", 0400,
|
||||
mvm->debugfs_dir, &mvm->nvm_prod_blob))
|
||||
goto err;
|
||||
if (!debugfs_create_blob("nvm_phy_sku", 0400,
|
||||
mvm->debugfs_dir, &mvm->nvm_phy_sku_blob))
|
||||
goto err;
|
||||
if (!debugfs_create_blob("nvm_reg", S_IRUSR,
|
||||
mvm->debugfs_dir, &mvm->nvm_reg_blob))
|
||||
goto err;
|
||||
debugfs_create_u8("ps_disabled", 0400, mvm->debugfs_dir,
|
||||
&mvm->ps_disabled);
|
||||
debugfs_create_blob("nvm_hw", 0400, mvm->debugfs_dir,
|
||||
&mvm->nvm_hw_blob);
|
||||
debugfs_create_blob("nvm_sw", 0400, mvm->debugfs_dir,
|
||||
&mvm->nvm_sw_blob);
|
||||
debugfs_create_blob("nvm_calib", 0400, mvm->debugfs_dir,
|
||||
&mvm->nvm_calib_blob);
|
||||
debugfs_create_blob("nvm_prod", 0400, mvm->debugfs_dir,
|
||||
&mvm->nvm_prod_blob);
|
||||
debugfs_create_blob("nvm_phy_sku", 0400, mvm->debugfs_dir,
|
||||
&mvm->nvm_phy_sku_blob);
|
||||
debugfs_create_blob("nvm_reg", S_IRUSR,
|
||||
mvm->debugfs_dir, &mvm->nvm_reg_blob);
|
||||
|
||||
debugfs_create_file("mem", 0600, dbgfs_dir, mvm, &iwl_dbgfs_mem_ops);
|
||||
|
||||
|
@ -2212,11 +2189,5 @@ int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
|
|||
* exists (before the opmode exists which removes the target.)
|
||||
*/
|
||||
snprintf(buf, 100, "../../%pd2", dbgfs_dir->d_parent);
|
||||
if (!debugfs_create_symlink("iwlwifi", mvm->hw->wiphy->debugfsdir, buf))
|
||||
goto err;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
IWL_ERR(mvm, "Can't create the mvm debugfs directory\n");
|
||||
return -ENOMEM;
|
||||
debugfs_create_symlink("iwlwifi", mvm->hw->wiphy->debugfsdir, buf);
|
||||
}
|
||||
|
|
|
@ -262,9 +262,7 @@ int iwl_mvm_mac_ctxt_init(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
|||
.preferred_tsf = NUM_TSF_IDS,
|
||||
.found_vif = false,
|
||||
};
|
||||
u32 ac;
|
||||
int ret, i, queue_limit;
|
||||
unsigned long used_hw_queues;
|
||||
int ret, i;
|
||||
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
|
||||
|
@ -341,37 +339,9 @@ int iwl_mvm_mac_ctxt_init(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
|||
INIT_LIST_HEAD(&mvmvif->time_event_data.list);
|
||||
mvmvif->time_event_data.id = TE_MAX;
|
||||
|
||||
/* No need to allocate data queues to P2P Device MAC.*/
|
||||
if (vif->type == NL80211_IFTYPE_P2P_DEVICE) {
|
||||
for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
|
||||
vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
|
||||
|
||||
/* No need to allocate data queues to P2P Device MAC and NAN.*/
|
||||
if (vif->type == NL80211_IFTYPE_P2P_DEVICE)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* queues in mac80211 almost entirely independent of
|
||||
* the ones here - no real limit
|
||||
*/
|
||||
queue_limit = IEEE80211_MAX_QUEUES;
|
||||
|
||||
/*
|
||||
* Find available queues, and allocate them to the ACs. When in
|
||||
* DQA-mode they aren't really used, and this is done only so the
|
||||
* mac80211 ieee80211_check_queues() function won't fail
|
||||
*/
|
||||
for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
|
||||
u8 queue = find_first_zero_bit(&used_hw_queues, queue_limit);
|
||||
|
||||
if (queue >= queue_limit) {
|
||||
IWL_ERR(mvm, "Failed to allocate queue\n");
|
||||
ret = -EIO;
|
||||
goto exit_fail;
|
||||
}
|
||||
|
||||
__set_bit(queue, &used_hw_queues);
|
||||
vif->hw_queue[ac] = queue;
|
||||
}
|
||||
|
||||
/* Allocate the CAB queue for softAP and GO interfaces */
|
||||
if (vif->type == NL80211_IFTYPE_AP ||
|
||||
|
@ -1143,9 +1113,7 @@ static void iwl_mvm_mac_ctxt_cmd_fill_ap(struct iwl_mvm *mvm,
|
|||
ieee80211_tu_to_usec(data.beacon_int * rand /
|
||||
100);
|
||||
} else {
|
||||
mvmvif->ap_beacon_time =
|
||||
iwl_read_prph(mvm->trans,
|
||||
DEVICE_SYSTEM_TIME_REG);
|
||||
mvmvif->ap_beacon_time = iwl_mvm_get_systime(mvm);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -2212,6 +2212,10 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm,
|
|||
.frame_time_rts_th =
|
||||
cpu_to_le16(vif->bss_conf.frame_time_rts_th),
|
||||
};
|
||||
int size = fw_has_api(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_API_MBSSID_HE) ?
|
||||
sizeof(sta_ctxt_cmd) :
|
||||
sizeof(struct iwl_he_sta_context_cmd_v1);
|
||||
struct ieee80211_sta *sta;
|
||||
u32 flags;
|
||||
int i;
|
||||
|
@ -2339,16 +2343,18 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm,
|
|||
|
||||
/* Set the PPE thresholds accordingly */
|
||||
if (low_th >= 0 && high_th >= 0) {
|
||||
u8 ***pkt_ext_qam =
|
||||
(void *)sta_ctxt_cmd.pkt_ext.pkt_ext_qam_th;
|
||||
struct iwl_he_pkt_ext *pkt_ext =
|
||||
(struct iwl_he_pkt_ext *)&sta_ctxt_cmd.pkt_ext;
|
||||
|
||||
for (i = 0; i < MAX_HE_SUPP_NSS; i++) {
|
||||
u8 bw;
|
||||
|
||||
for (bw = 0; bw < MAX_HE_CHANNEL_BW_INDX;
|
||||
bw++) {
|
||||
pkt_ext_qam[i][bw][0] = low_th;
|
||||
pkt_ext_qam[i][bw][1] = high_th;
|
||||
pkt_ext->pkt_ext_qam_th[i][bw][0] =
|
||||
low_th;
|
||||
pkt_ext->pkt_ext_qam_th[i][bw][1] =
|
||||
high_th;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2397,13 +2403,19 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm,
|
|||
flags |= STA_CTXT_HE_REF_BSSID_VALID;
|
||||
ether_addr_copy(sta_ctxt_cmd.ref_bssid_addr,
|
||||
vif->bss_conf.transmitter_bssid);
|
||||
sta_ctxt_cmd.max_bssid_indicator =
|
||||
vif->bss_conf.bssid_indicator;
|
||||
sta_ctxt_cmd.bssid_index = vif->bss_conf.bssid_index;
|
||||
sta_ctxt_cmd.ema_ap = vif->bss_conf.ema_ap;
|
||||
sta_ctxt_cmd.profile_periodicity =
|
||||
vif->bss_conf.profile_periodicity;
|
||||
}
|
||||
|
||||
sta_ctxt_cmd.flags = cpu_to_le32(flags);
|
||||
|
||||
if (iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(STA_HE_CTXT_CMD,
|
||||
DATA_PATH_GROUP, 0),
|
||||
0, sizeof(sta_ctxt_cmd), &sta_ctxt_cmd))
|
||||
0, size, &sta_ctxt_cmd))
|
||||
IWL_ERR(mvm, "Failed to config FW to work HE!\n");
|
||||
}
|
||||
|
||||
|
@ -3728,7 +3740,7 @@ static int iwl_mvm_send_aux_roc_cmd(struct iwl_mvm *mvm,
|
|||
struct ieee80211_vif *vif,
|
||||
int duration)
|
||||
{
|
||||
int res, time_reg = DEVICE_SYSTEM_TIME_REG;
|
||||
int res;
|
||||
struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
|
||||
struct iwl_mvm_time_event_data *te_data = &mvmvif->hs_time_event_data;
|
||||
static const u16 time_event_response[] = { HOT_SPOT_CMD };
|
||||
|
@ -3754,7 +3766,7 @@ static int iwl_mvm_send_aux_roc_cmd(struct iwl_mvm *mvm,
|
|||
0);
|
||||
|
||||
/* Set the time and duration */
|
||||
tail->apply_time = cpu_to_le32(iwl_read_prph(mvm->trans, time_reg));
|
||||
tail->apply_time = cpu_to_le32(iwl_mvm_get_systime(mvm));
|
||||
|
||||
delay = AUX_ROC_MIN_DELAY;
|
||||
req_dur = MSEC_TO_TU(duration);
|
||||
|
|
|
@ -1539,6 +1539,7 @@ void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm);
|
|||
u8 first_antenna(u8 mask);
|
||||
u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx);
|
||||
void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime);
|
||||
u32 iwl_mvm_get_systime(struct iwl_mvm *mvm);
|
||||
|
||||
/* Tx / Host Commands */
|
||||
int __must_check iwl_mvm_send_cmd(struct iwl_mvm *mvm,
|
||||
|
@ -1786,14 +1787,13 @@ void iwl_mvm_rx_umac_scan_iter_complete_notif(struct iwl_mvm *mvm,
|
|||
|
||||
/* MVM debugfs */
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir);
|
||||
void iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir);
|
||||
void iwl_mvm_vif_dbgfs_register(struct iwl_mvm *mvm, struct ieee80211_vif *vif);
|
||||
void iwl_mvm_vif_dbgfs_clean(struct iwl_mvm *mvm, struct ieee80211_vif *vif);
|
||||
#else
|
||||
static inline int iwl_mvm_dbgfs_register(struct iwl_mvm *mvm,
|
||||
struct dentry *dbgfs_dir)
|
||||
static inline void iwl_mvm_dbgfs_register(struct iwl_mvm *mvm,
|
||||
struct dentry *dbgfs_dir)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline void
|
||||
iwl_mvm_vif_dbgfs_register(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
||||
|
|
|
@ -862,9 +862,7 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
|||
min_backoff = iwl_mvm_min_backoff(mvm);
|
||||
iwl_mvm_thermal_initialize(mvm, min_backoff);
|
||||
|
||||
err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir);
|
||||
if (err)
|
||||
goto out_unregister;
|
||||
iwl_mvm_dbgfs_register(mvm, dbgfs_dir);
|
||||
|
||||
if (!iwl_mvm_has_new_rx_stats_api(mvm))
|
||||
memset(&mvm->rx_stats_v3, 0,
|
||||
|
@ -881,14 +879,6 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
|||
|
||||
return op_mode;
|
||||
|
||||
out_unregister:
|
||||
if (iwlmvm_mod_params.init_dbg)
|
||||
return op_mode;
|
||||
|
||||
ieee80211_unregister_hw(mvm->hw);
|
||||
mvm->hw_registered = false;
|
||||
iwl_mvm_leds_exit(mvm);
|
||||
iwl_mvm_thermal_exit(mvm);
|
||||
out_free:
|
||||
iwl_fw_flush_dump(&mvm->fwrt);
|
||||
iwl_fw_runtime_free(&mvm->fwrt);
|
||||
|
@ -1291,8 +1281,7 @@ void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error)
|
|||
* can't recover this since we're already half suspended.
|
||||
*/
|
||||
if (!mvm->fw_restart && fw_error) {
|
||||
iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert,
|
||||
false, 0);
|
||||
iwl_fw_error_collect(&mvm->fwrt);
|
||||
} else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
|
||||
struct iwl_mvm_reprobe *reprobe;
|
||||
|
||||
|
@ -1340,8 +1329,8 @@ void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error)
|
|||
}
|
||||
}
|
||||
|
||||
iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert,
|
||||
false, 0);
|
||||
iwl_fw_error_collect(&mvm->fwrt);
|
||||
|
||||
if (fw_error && mvm->fw_restart > 0)
|
||||
mvm->fw_restart--;
|
||||
set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status);
|
||||
|
|
|
@ -4078,9 +4078,8 @@ static ssize_t iwl_dbgfs_ss_force_write(struct iwl_lq_sta *lq_sta, char *buf,
|
|||
#define MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz) \
|
||||
_MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz, struct iwl_lq_sta)
|
||||
#define MVM_DEBUGFS_ADD_FILE_RS(name, parent, mode) do { \
|
||||
if (!debugfs_create_file(#name, mode, parent, lq_sta, \
|
||||
&iwl_dbgfs_##name##_ops)) \
|
||||
goto err; \
|
||||
debugfs_create_file(#name, mode, parent, lq_sta, \
|
||||
&iwl_dbgfs_##name##_ops); \
|
||||
} while (0)
|
||||
|
||||
MVM_DEBUGFS_READ_WRITE_FILE_OPS(ss_force, 32);
|
||||
|
@ -4108,9 +4107,6 @@ static void rs_drv_add_sta_debugfs(void *mvm, void *priv_sta,
|
|||
&lq_sta->pers.dbg_fixed_txp_reduction);
|
||||
|
||||
MVM_DEBUGFS_ADD_FILE_RS(ss_force, dir, 0600);
|
||||
return;
|
||||
err:
|
||||
IWL_ERR((struct iwl_mvm *)mvm, "Can't create debugfs entity\n");
|
||||
}
|
||||
|
||||
void rs_remove_sta_debugfs(void *mvm, void *mvm_sta)
|
||||
|
|
|
@ -2275,7 +2275,8 @@ int iwl_mvm_add_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
|||
static const u8 _maddr[] = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
const u8 *maddr = _maddr;
|
||||
struct iwl_trans_txq_scd_cfg cfg = {
|
||||
.fifo = IWL_MVM_TX_FIFO_MCAST,
|
||||
.fifo = vif->type == NL80211_IFTYPE_AP ?
|
||||
IWL_MVM_TX_FIFO_MCAST : IWL_MVM_TX_FIFO_BE,
|
||||
.sta_id = msta->sta_id,
|
||||
.tid = 0,
|
||||
.aggregate = false,
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
*
|
||||
* Copyright(c) 2014 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(C) 2018 Intel Corporation
|
||||
* Copyright(C) 2018 - 2019 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -29,7 +29,7 @@
|
|||
*
|
||||
* Copyright(c) 2014 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(C) 2018 Intel Corporation
|
||||
* Copyright(C) 2018 - 2019 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -252,8 +252,7 @@ static void iwl_mvm_tdls_update_cs_state(struct iwl_mvm *mvm,
|
|||
|
||||
/* we only send requests to our switching peer - update sent time */
|
||||
if (state == IWL_MVM_TDLS_SW_REQ_SENT)
|
||||
mvm->tdls_cs.peer.sent_timestamp =
|
||||
iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
|
||||
mvm->tdls_cs.peer.sent_timestamp = iwl_mvm_get_systime(mvm);
|
||||
|
||||
if (state == IWL_MVM_TDLS_SW_IDLE)
|
||||
mvm->tdls_cs.cur_sta_id = IWL_MVM_INVALID_STA;
|
||||
|
|
|
@ -1418,6 +1418,16 @@ void iwl_mvm_tcm_rm_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
|||
cancel_delayed_work_sync(&mvmvif->uapsd_nonagg_detected_wk);
|
||||
}
|
||||
|
||||
u32 iwl_mvm_get_systime(struct iwl_mvm *mvm)
|
||||
{
|
||||
u32 reg_addr = DEVICE_SYSTEM_TIME_REG;
|
||||
|
||||
if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000 &&
|
||||
mvm->trans->cfg->gp2_reg_addr)
|
||||
reg_addr = mvm->trans->cfg->gp2_reg_addr;
|
||||
|
||||
return iwl_read_prph(mvm->trans, reg_addr);
|
||||
}
|
||||
|
||||
void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
|
||||
{
|
||||
|
@ -1432,7 +1442,7 @@ void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
|
|||
iwl_mvm_power_update_device(mvm);
|
||||
}
|
||||
|
||||
*gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
|
||||
*gp2 = iwl_mvm_get_systime(mvm);
|
||||
*boottime = ktime_get_boot_ns();
|
||||
|
||||
if (!ps_disabled) {
|
||||
|
|
|
@ -959,12 +959,9 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
|||
{IWL_PCI_DEVICE(0x2723, 0x008C, iwl22260_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x1653, killer1650w_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x1654, killer1650x_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x2080, iwl22260_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x4080, iwl22260_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2723, 0x4088, iwl22260_2ax_cfg)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x1a56, 0x1653, killer1650w_2ax_cfg)},
|
||||
{IWL_PCI_DEVICE(0x1a56, 0x1654, killer1650x_2ax_cfg)},
|
||||
|
||||
{IWL_PCI_DEVICE(0x2725, 0x0090, iwlax210_2ax_cfg_so_hr_a0)},
|
||||
{IWL_PCI_DEVICE(0x7A70, 0x0090, iwlax210_2ax_cfg_so_hr_a0)},
|
||||
{IWL_PCI_DEVICE(0x7A70, 0x0310, iwlax210_2ax_cfg_so_hr_a0)},
|
||||
|
@ -1046,9 +1043,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
}
|
||||
|
||||
/* register transport layer debugfs here */
|
||||
ret = iwl_trans_pcie_dbgfs_register(iwl_trans);
|
||||
if (ret)
|
||||
goto out_free_drv;
|
||||
iwl_trans_pcie_dbgfs_register(iwl_trans);
|
||||
|
||||
/* if RTPM is in use, enable it in our device */
|
||||
if (iwl_trans->runtime_pm_mode != IWL_PLAT_PM_MODE_DISABLED) {
|
||||
|
@ -1077,8 +1072,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
|
||||
return 0;
|
||||
|
||||
out_free_drv:
|
||||
iwl_drv_stop(iwl_trans->drv);
|
||||
out_free_trans:
|
||||
iwl_trans_pcie_free(iwl_trans);
|
||||
return ret;
|
||||
|
|
|
@ -1030,12 +1030,9 @@ void iwl_trans_pcie_dump_regs(struct iwl_trans *trans);
|
|||
void iwl_trans_sync_nmi(struct iwl_trans *trans);
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans);
|
||||
void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans);
|
||||
#else
|
||||
static inline int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans) { }
|
||||
#endif
|
||||
|
||||
int iwl_pci_fw_exit_d0i3(struct iwl_trans *trans);
|
||||
|
|
|
@ -2207,6 +2207,7 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id)
|
|||
"Hardware error detected. Restarting.\n");
|
||||
|
||||
isr_stats->hw++;
|
||||
trans->hw_error = true;
|
||||
iwl_pcie_irq_handle_error(trans);
|
||||
}
|
||||
|
||||
|
|
|
@ -2442,9 +2442,8 @@ void iwl_pcie_dump_csr(struct iwl_trans *trans)
|
|||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
/* create and remove of files */
|
||||
#define DEBUGFS_ADD_FILE(name, parent, mode) do { \
|
||||
if (!debugfs_create_file(#name, mode, parent, trans, \
|
||||
&iwl_dbgfs_##name##_ops)) \
|
||||
goto err; \
|
||||
debugfs_create_file(#name, mode, parent, trans, \
|
||||
&iwl_dbgfs_##name##_ops); \
|
||||
} while (0)
|
||||
|
||||
/* file operation */
|
||||
|
@ -2847,7 +2846,7 @@ static const struct file_operations iwl_dbgfs_monitor_data_ops = {
|
|||
};
|
||||
|
||||
/* Create the debugfs files and directories */
|
||||
int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
|
||||
void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
|
||||
{
|
||||
struct dentry *dir = trans->dbgfs_dir;
|
||||
|
||||
|
@ -2858,11 +2857,6 @@ int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
|
|||
DEBUGFS_ADD_FILE(fh_reg, dir, 0400);
|
||||
DEBUGFS_ADD_FILE(rfkill, dir, 0600);
|
||||
DEBUGFS_ADD_FILE(monitor_data, dir, 0400);
|
||||
return 0;
|
||||
|
||||
err:
|
||||
IWL_ERR(trans, "failed to create the trans debugfs entry\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static void iwl_trans_pcie_debugfs_cleanup(struct iwl_trans *trans)
|
||||
|
|
|
@ -999,7 +999,8 @@ static int iwl_pcie_tx_alloc(struct iwl_trans *trans)
|
|||
slots_num = max_t(u32, TFD_CMD_SLOTS,
|
||||
trans->cfg->min_txq_size);
|
||||
else
|
||||
slots_num = TFD_TX_CMD_SLOTS;
|
||||
slots_num = max_t(u32, TFD_TX_CMD_SLOTS,
|
||||
trans->cfg->min_256_ba_txq_size);
|
||||
trans_pcie->txq[txq_id] = &trans_pcie->txq_memory[txq_id];
|
||||
ret = iwl_pcie_txq_alloc(trans, trans_pcie->txq[txq_id],
|
||||
slots_num, cmd_queue);
|
||||
|
@ -1052,7 +1053,8 @@ int iwl_pcie_tx_init(struct iwl_trans *trans)
|
|||
slots_num = max_t(u32, TFD_CMD_SLOTS,
|
||||
trans->cfg->min_txq_size);
|
||||
else
|
||||
slots_num = TFD_TX_CMD_SLOTS;
|
||||
slots_num = max_t(u32, TFD_TX_CMD_SLOTS,
|
||||
trans->cfg->min_256_ba_txq_size);
|
||||
ret = iwl_pcie_txq_init(trans, trans_pcie->txq[txq_id],
|
||||
slots_num, cmd_queue);
|
||||
if (ret) {
|
||||
|
|
Loading…
Reference in New Issue