mirror of https://gitee.com/openkylin/linux.git
xhci: move usb3 speficic bits to own function in get_port_status call
refactoring, no functional changes Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -818,6 +818,41 @@ static u32 xhci_get_ext_port_status(u32 raw_port_status, u32 port_li)
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return ext_stat;
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}
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static void xhci_get_usb3_port_status(struct xhci_port *port, u32 *status,
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u32 portsc)
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{
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struct xhci_hcd *xhci;
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u32 link_state;
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u32 portnum;
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xhci = hcd_to_xhci(port->rhub->hcd);
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link_state = portsc & PORT_PLS_MASK;
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portnum = port->hcd_portnum;
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/* USB3 specific wPortChange bits
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*
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* Port link change with port in resume state should not be
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* reported to usbcore, as this is an internal state to be
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* handled by xhci driver. Reporting PLC to usbcore may
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* cause usbcore clearing PLC first and port change event
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* irq won't be generated.
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*/
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if (portsc & PORT_PLC && (link_state != XDEV_RESUME))
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*status |= USB_PORT_STAT_C_LINK_STATE << 16;
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if (portsc & PORT_WRC)
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*status |= USB_PORT_STAT_C_BH_RESET << 16;
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if (portsc & PORT_CEC)
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*status |= USB_PORT_STAT_C_CONFIG_ERROR << 16;
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/* USB3 specific wPortStatus bits */
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if (portsc & PORT_POWER)
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*status |= USB_SS_PORT_STAT_POWER;
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xhci_hub_report_usb3_link_state(xhci, status, portsc);
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xhci_del_comp_mod_timer(xhci, portsc, portnum);
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}
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/*
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* Converts a raw xHCI port status into the format that external USB 2.0 or USB
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* 3.0 hubs use.
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@ -854,22 +889,8 @@ static u32 xhci_get_port_status(struct usb_hcd *hcd,
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if ((raw_port_status & PORT_RC))
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status |= USB_PORT_STAT_C_RESET << 16;
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/* USB3.0 only */
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if (hcd->speed >= HCD_USB3) {
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/* Port link change with port in resume state should not be
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* reported to usbcore, as this is an internal state to be
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* handled by xhci driver. Reporting PLC to usbcore may
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* cause usbcore clearing PLC first and port change event
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* irq won't be generated.
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*/
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if ((raw_port_status & PORT_PLC) &&
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(raw_port_status & PORT_PLS_MASK) != XDEV_RESUME)
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status |= USB_PORT_STAT_C_LINK_STATE << 16;
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if ((raw_port_status & PORT_WRC))
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status |= USB_PORT_STAT_C_BH_RESET << 16;
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if ((raw_port_status & PORT_CEC))
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status |= USB_PORT_STAT_C_CONFIG_ERROR << 16;
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}
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if (hcd->speed >= HCD_USB3)
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xhci_get_usb3_port_status(port, &status, raw_port_status);
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if (hcd->speed < HCD_USB3) {
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if ((raw_port_status & PORT_PLS_MASK) == XDEV_U3
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&& (raw_port_status & PORT_POWER))
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@ -989,22 +1010,13 @@ static u32 xhci_get_port_status(struct usb_hcd *hcd,
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if (raw_port_status & PORT_RESET)
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status |= USB_PORT_STAT_RESET;
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if (raw_port_status & PORT_POWER) {
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if (hcd->speed >= HCD_USB3)
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status |= USB_SS_PORT_STAT_POWER;
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else
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if (hcd->speed < HCD_USB3)
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status |= USB_PORT_STAT_POWER;
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}
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/* Update Port Link State */
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if (hcd->speed >= HCD_USB3) {
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xhci_hub_report_usb3_link_state(xhci, &status, raw_port_status);
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/*
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* Verify if all USB3 Ports Have entered U0 already.
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* Delete Compliance Mode Timer if so.
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*/
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xhci_del_comp_mod_timer(xhci, raw_port_status, wIndex);
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} else {
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if (hcd->speed < HCD_USB3)
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xhci_hub_report_usb2_link_state(&status, raw_port_status);
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}
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if (bus_state->port_c_suspend & (1 << wIndex))
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status |= USB_PORT_STAT_C_SUSPEND << 16;
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