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Convert the OMAP HDQ1W driver to use runtime PM. Make it available on 

all OMAP2+ chips that appear to have it integrated.  Fix a problem
 preventing it from being used on OMAP4.
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Merge tag 'omap-devel-b-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-driver

Convert the OMAP HDQ1W driver to use runtime PM.  Make it available on
all OMAP2+ chips that appear to have it integrated.  Fix a problem
preventing it from being used on OMAP4.
This commit is contained in:
Tony Lindgren 2012-06-25 07:32:51 -07:00
parent 6b16351acb c354a86484
commit 5f7b900429
4 changed files with 44 additions and 108 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
arch/arm/mach-omap2/devices.c
View File

@ -672,43 +672,6 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
#endif
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
#define OMAP_HDQ_BASE 0x480B2000
static struct resource omap_hdq_resources[] = {
{
.start = OMAP_HDQ_BASE,
.end = OMAP_HDQ_BASE + 0x1C,
.flags = IORESOURCE_MEM,
},
{
.start = INT_24XX_HDQ_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device omap_hdq_dev = {
.name = "omap_hdq",
.id = 0,
.dev = {
.platform_data = NULL,
},
.num_resources = ARRAY_SIZE(omap_hdq_resources),
.resource = omap_hdq_resources,
};
static inline void omap_hdq_init(void)
{
if (cpu_is_omap2420())
return;
platform_device_register(&omap_hdq_dev);
}
#else
static inline void omap_hdq_init(void) {}
#endif
/*---------------------------------------------------------------------------*/
#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
@ -753,7 +716,6 @@ static int __init omap2_init_devices(void)
omap_init_mcspi();
}
omap_init_pmu();
omap_hdq_init();
omap_init_sti();
omap_init_sham();
omap_init_aes();

26
arch/arm/mach-omap2/hdq1w.c
View File

@ -22,7 +22,13 @@
* 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include <plat/hdq1w.h>
#include "common.h"
@ -70,3 +76,23 @@ int omap_hdq1w_reset(struct omap_hwmod *oh)
return 0;
}
static int __init omap_init_hdq(void)
{
int id = -1;
struct platform_device *pdev;
struct omap_hwmod *oh;
char *oh_name = "hdq1w";
char *devname = "omap_hdq";
oh = omap_hwmod_lookup(oh_name);
if (!oh)
return 0;
pdev = omap_device_build(devname, id, oh, NULL, 0, NULL, 0, 0);
WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
devname, oh->name);
return 0;
}
arch_initcall(omap_init_hdq);

2
drivers/w1/masters/Kconfig
View File

@ -60,7 +60,7 @@ config W1_MASTER_GPIO
config HDQ_MASTER_OMAP
tristate "OMAP HDQ driver"
depends on SOC_OMAP2430 || ARCH_OMAP3
depends on ARCH_OMAP2PLUS
help
Say Y here if you want support for the 1-wire or HDQ Interface
on an OMAP processor.

86
drivers/w1/masters/omap_hdq.c
View File

@ -1,7 +1,7 @@
/*
* drivers/w1/masters/omap_hdq.c
*
* Copyright (C) 2007 Texas Instruments, Inc.
* Copyright (C) 2007,2012 Texas Instruments, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@ -14,9 +14,9 @@
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/sched.h>
#include <linux/pm_runtime.h>
#include <asm/irq.h>
#include <mach/hardware.h>
@ -61,8 +61,6 @@ struct hdq_data {
/* lock status update */
struct mutex hdq_mutex;
int hdq_usecount;
struct clk *hdq_ick;
struct clk *hdq_fck;
u8 hdq_irqstatus;
/* device lock */
spinlock_t hdq_spinlock;
@ -102,20 +100,20 @@ static struct w1_bus_master omap_w1_master = {
/* HDQ register I/O routines */
static inline u8 hdq_reg_in(struct hdq_data *hdq_data, u32 offset)
{
return __raw_readb(hdq_data->hdq_base + offset);
return __raw_readl(hdq_data->hdq_base + offset);
}
static inline void hdq_reg_out(struct hdq_data *hdq_data, u32 offset, u8 val)
{
__raw_writeb(val, hdq_data->hdq_base + offset);
__raw_writel(val, hdq_data->hdq_base + offset);
}
static inline u8 hdq_reg_merge(struct hdq_data *hdq_data, u32 offset,
u8 val, u8 mask)
{
u8 new_val = (__raw_readb(hdq_data->hdq_base + offset) & ~mask)
u8 new_val = (__raw_readl(hdq_data->hdq_base + offset) & ~mask)
| (val & mask);
__raw_writeb(new_val, hdq_data->hdq_base + offset);
__raw_writel(new_val, hdq_data->hdq_base + offset);
return new_val;
}
@ -419,17 +417,8 @@ static int omap_hdq_get(struct hdq_data *hdq_data)
hdq_data->hdq_usecount++;
try_module_get(THIS_MODULE);
if (1 == hdq_data->hdq_usecount) {
if (clk_enable(hdq_data->hdq_ick)) {
dev_dbg(hdq_data->dev, "Can not enable ick\n");
ret = -ENODEV;
goto clk_err;
}
if (clk_enable(hdq_data->hdq_fck)) {
dev_dbg(hdq_data->dev, "Can not enable fck\n");
clk_disable(hdq_data->hdq_ick);
ret = -ENODEV;
goto clk_err;
}
pm_runtime_get_sync(hdq_data->dev);
/* make sure HDQ is out of reset */
if (!(hdq_reg_in(hdq_data, OMAP_HDQ_SYSSTATUS) &
@ -450,9 +439,6 @@ static int omap_hdq_get(struct hdq_data *hdq_data)
}
}
clk_err:
clk_put(hdq_data->hdq_ick);
clk_put(hdq_data->hdq_fck);
out:
mutex_unlock(&hdq_data->hdq_mutex);
rtn:
@ -475,10 +461,8 @@ static int omap_hdq_put(struct hdq_data *hdq_data)
} else {
hdq_data->hdq_usecount--;
module_put(THIS_MODULE);
if (0 == hdq_data->hdq_usecount) {
clk_disable(hdq_data->hdq_ick);
clk_disable(hdq_data->hdq_fck);
}
if (0 == hdq_data->hdq_usecount)
pm_runtime_put_sync(hdq_data->dev);
}
mutex_unlock(&hdq_data->hdq_mutex);
@ -591,35 +575,11 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev)
goto err_ioremap;
}
/* get interface & functional clock objects */
hdq_data->hdq_ick = clk_get(&pdev->dev, "ick");
if (IS_ERR(hdq_data->hdq_ick)) {
dev_dbg(&pdev->dev, "Can't get HDQ ick clock object\n");
ret = PTR_ERR(hdq_data->hdq_ick);
goto err_ick;
}
hdq_data->hdq_fck = clk_get(&pdev->dev, "fck");
if (IS_ERR(hdq_data->hdq_fck)) {
dev_dbg(&pdev->dev, "Can't get HDQ fck clock object\n");
ret = PTR_ERR(hdq_data->hdq_fck);
goto err_fck;
}
hdq_data->hdq_usecount = 0;
mutex_init(&hdq_data->hdq_mutex);
if (clk_enable(hdq_data->hdq_ick)) {
dev_dbg(&pdev->dev, "Can not enable ick\n");
ret = -ENODEV;
goto err_intfclk;
}
if (clk_enable(hdq_data->hdq_fck)) {
dev_dbg(&pdev->dev, "Can not enable fck\n");
ret = -ENODEV;
goto err_fnclk;
}
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
rev = hdq_reg_in(hdq_data, OMAP_HDQ_REVISION);
dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n",
@ -641,9 +601,7 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev)
omap_hdq_break(hdq_data);
/* don't clock the HDQ until it is needed */
clk_disable(hdq_data->hdq_ick);
clk_disable(hdq_data->hdq_fck);
pm_runtime_put_sync(&pdev->dev);
omap_w1_master.data = hdq_data;
@ -655,20 +613,11 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev)
return 0;
err_w1:
err_irq:
clk_disable(hdq_data->hdq_fck);
pm_runtime_put_sync(&pdev->dev);
err_w1:
pm_runtime_disable(&pdev->dev);
err_fnclk:
clk_disable(hdq_data->hdq_ick);
err_intfclk:
clk_put(hdq_data->hdq_fck);
err_fck:
clk_put(hdq_data->hdq_ick);
err_ick:
iounmap(hdq_data->hdq_base);
err_ioremap:
@ -696,8 +645,7 @@ static int omap_hdq_remove(struct platform_device *pdev)
mutex_unlock(&hdq_data->hdq_mutex);
/* remove module dependency */
clk_put(hdq_data->hdq_ick);
clk_put(hdq_data->hdq_fck);
pm_runtime_disable(&pdev->dev);
free_irq(INT_24XX_HDQ_IRQ, hdq_data);
platform_set_drvdata(pdev, NULL);
iounmap(hdq_data->hdq_base);