mirror of https://gitee.com/openkylin/linux.git
[ARM] msm: clock: provide clk_*() api support for
Makes use of the proc_comm interface to provide clock control on MSM7X01A family SoCs. Signed-off-by: Brian Swetland <swetland@google.com>
This commit is contained in:
Brian Swetland
parent
bcc0f6af07
commit
600f7cfebe
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@ -1,6 +1,7 @@
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obj-y += io.o idle.o irq.o timer.o dma.o
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obj-y += devices.o
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obj-y += proc_comm.o
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obj-y += clock.o clock-7x01a.o
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obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o
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@ -79,6 +79,7 @@ static void __init halibut_init(void)
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static void __init halibut_map_io(void)
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{
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msm_map_common_io();
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msm_clock_init();
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}
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MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
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@ -0,0 +1,126 @@
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/* arch/arm/mach-msm/clock-7x01a.c
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*
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* Clock tables for MSM7X01A
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include "clock.h"
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#include "devices.h"
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/* clock IDs used by the modem processor */
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#define ACPU_CLK 0 /* Applications processor clock */
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#define ADM_CLK 1 /* Applications data mover clock */
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#define ADSP_CLK 2 /* ADSP clock */
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#define EBI1_CLK 3 /* External bus interface 1 clock */
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#define EBI2_CLK 4 /* External bus interface 2 clock */
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#define ECODEC_CLK 5 /* External CODEC clock */
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#define EMDH_CLK 6 /* External MDDI host clock */
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#define GP_CLK 7 /* General purpose clock */
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#define GRP_CLK 8 /* Graphics clock */
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#define I2C_CLK 9 /* I2C clock */
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#define ICODEC_RX_CLK 10 /* Internal CODEX RX clock */
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#define ICODEC_TX_CLK 11 /* Internal CODEX TX clock */
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#define IMEM_CLK 12 /* Internal graphics memory clock */
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#define MDC_CLK 13 /* MDDI client clock */
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#define MDP_CLK 14 /* Mobile display processor clock */
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#define PBUS_CLK 15 /* Peripheral bus clock */
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#define PCM_CLK 16 /* PCM clock */
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#define PMDH_CLK 17 /* Primary MDDI host clock */
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#define SDAC_CLK 18 /* Stereo DAC clock */
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#define SDC1_CLK 19 /* Secure Digital Card clocks */
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#define SDC1_PCLK 20
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#define SDC2_CLK 21
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#define SDC2_PCLK 22
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#define SDC3_CLK 23
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#define SDC3_PCLK 24
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#define SDC4_CLK 25
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#define SDC4_PCLK 26
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#define TSIF_CLK 27 /* Transport Stream Interface clocks */
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#define TSIF_REF_CLK 28
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#define TV_DAC_CLK 29 /* TV clocks */
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#define TV_ENC_CLK 30
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#define UART1_CLK 31 /* UART clocks */
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#define UART2_CLK 32
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#define UART3_CLK 33
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#define UART1DM_CLK 34
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#define UART2DM_CLK 35
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#define USB_HS_CLK 36 /* High speed USB core clock */
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#define USB_HS_PCLK 37 /* High speed USB pbus clock */
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#define USB_OTG_CLK 38 /* Full speed USB clock */
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#define VDC_CLK 39 /* Video controller clock */
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#define VFE_CLK 40 /* Camera / Video Front End clock */
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#define VFE_MDC_CLK 41 /* VFE MDDI client clock */
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#define NR_CLKS 42
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#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
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.name = clk_name, \
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.id = clk_id, \
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.flags = clk_flags, \
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.dev = clk_dev, \
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}
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#define OFF CLKFLAG_AUTO_OFF
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#define MINMAX CLKFLAG_USE_MIN_MAX_TO_SET
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struct clk msm_clocks[] = {
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CLOCK("adm_clk", ADM_CLK, NULL, 0),
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CLOCK("adsp_clk", ADSP_CLK, NULL, 0),
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CLOCK("ebi1_clk", EBI1_CLK, NULL, 0),
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CLOCK("ebi2_clk", EBI2_CLK, NULL, 0),
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CLOCK("ecodec_clk", ECODEC_CLK, NULL, 0),
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CLOCK("emdh_clk", EMDH_CLK, NULL, OFF),
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CLOCK("gp_clk", GP_CLK, NULL, 0),
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CLOCK("grp_clk", GRP_CLK, NULL, OFF),
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CLOCK("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
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CLOCK("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
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CLOCK("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
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CLOCK("imem_clk", IMEM_CLK, NULL, OFF),
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CLOCK("mdc_clk", MDC_CLK, NULL, 0),
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CLOCK("mdp_clk", MDP_CLK, NULL, OFF),
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CLOCK("pbus_clk", PBUS_CLK, NULL, 0),
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CLOCK("pcm_clk", PCM_CLK, NULL, 0),
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CLOCK("pmdh_clk", PMDH_CLK, NULL, OFF | MINMAX),
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CLOCK("sdac_clk", SDAC_CLK, NULL, OFF),
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CLOCK("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
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CLOCK("sdc_pclk", SDC1_PCLK, &msm_device_sdc1.dev, OFF),
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CLOCK("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
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CLOCK("sdc_pclk", SDC2_PCLK, &msm_device_sdc2.dev, OFF),
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CLOCK("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
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CLOCK("sdc_pclk", SDC3_PCLK, &msm_device_sdc3.dev, OFF),
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CLOCK("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
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CLOCK("sdc_pclk", SDC4_PCLK, &msm_device_sdc4.dev, OFF),
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CLOCK("tsif_clk", TSIF_CLK, NULL, 0),
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CLOCK("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
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CLOCK("tv_dac_clk", TV_DAC_CLK, NULL, 0),
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CLOCK("tv_enc_clk", TV_ENC_CLK, NULL, 0),
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CLOCK("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
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CLOCK("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
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CLOCK("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
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CLOCK("uart1dm_clk", UART1DM_CLK, NULL, OFF),
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CLOCK("uart2dm_clk", UART2DM_CLK, NULL, 0),
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CLOCK("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
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CLOCK("usb_hs_pclk", USB_HS_PCLK, &msm_device_hsusb.dev, OFF),
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CLOCK("usb_otg_clk", USB_OTG_CLK, NULL, 0),
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CLOCK("vdc_clk", VDC_CLK, NULL, OFF | MINMAX),
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CLOCK("vfe_clk", VFE_CLK, NULL, OFF),
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CLOCK("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
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};
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unsigned msm_num_clocks = ARRAY_SIZE(msm_clocks);
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@ -0,0 +1,218 @@
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/* arch/arm/mach-msm/clock.c
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include "clock.h"
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#include "proc_comm.h"
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static DEFINE_MUTEX(clocks_mutex);
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static DEFINE_SPINLOCK(clocks_lock);
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static LIST_HEAD(clocks);
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/*
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* glue for the proc_comm interface
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*/
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static inline int pc_clk_enable(unsigned id)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
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}
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static inline void pc_clk_disable(unsigned id)
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{
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msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
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}
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static inline int pc_clk_set_rate(unsigned id, unsigned rate)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate);
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}
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static inline int pc_clk_set_min_rate(unsigned id, unsigned rate)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate);
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}
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static inline int pc_clk_set_max_rate(unsigned id, unsigned rate)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate);
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}
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static inline int pc_clk_set_flags(unsigned id, unsigned flags)
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{
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return msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
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}
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static inline unsigned pc_clk_get_rate(unsigned id)
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{
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if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL))
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return 0;
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else
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return id;
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}
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static inline unsigned pc_clk_is_enabled(unsigned id)
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{
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if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL))
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return 0;
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else
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return id;
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}
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static inline int pc_pll_request(unsigned id, unsigned on)
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{
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on = !!on;
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return msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on);
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}
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/*
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* Standard clock functions defined in include/linux/clk.h
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*/
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *clk;
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mutex_lock(&clocks_mutex);
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list_for_each_entry(clk, &clocks, list)
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if (!strcmp(id, clk->name) && clk->dev == dev)
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goto found_it;
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list_for_each_entry(clk, &clocks, list)
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if (!strcmp(id, clk->name) && clk->dev == NULL)
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goto found_it;
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clk = ERR_PTR(-ENOENT);
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found_it:
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mutex_unlock(&clocks_mutex);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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clk->count++;
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if (clk->count == 1)
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pc_clk_enable(clk->id);
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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BUG_ON(clk->count == 0);
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clk->count--;
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if (clk->count == 0)
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pc_clk_disable(clk->id);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return pc_clk_get_rate(clk->id);
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}
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EXPORT_SYMBOL(clk_get_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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int ret;
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if (clk->flags & CLKFLAG_USE_MIN_MAX_TO_SET) {
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ret = pc_clk_set_max_rate(clk->id, rate);
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if (ret)
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return ret;
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return pc_clk_set_min_rate(clk->id, rate);
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}
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return pc_clk_set_rate(clk->id, rate);
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}
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EXPORT_SYMBOL(clk_set_rate);
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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return -ENOSYS;
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}
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EXPORT_SYMBOL(clk_set_parent);
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struct clk *clk_get_parent(struct clk *clk)
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{
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return ERR_PTR(-ENOSYS);
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}
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EXPORT_SYMBOL(clk_get_parent);
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int clk_set_flags(struct clk *clk, unsigned long flags)
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{
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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return pc_clk_set_flags(clk->id, flags);
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}
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EXPORT_SYMBOL(clk_set_flags);
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void __init msm_clock_init(void)
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{
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unsigned n;
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spin_lock_init(&clocks_lock);
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mutex_lock(&clocks_mutex);
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for (n = 0; n < msm_num_clocks; n++)
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list_add_tail(&msm_clocks[n].list, &clocks);
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mutex_unlock(&clocks_mutex);
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}
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/* The bootloader and/or AMSS may have left various clocks enabled.
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* Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have
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* not been explicitly enabled by a clk_enable() call.
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*/
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static int __init clock_late_init(void)
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{
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unsigned long flags;
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struct clk *clk;
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unsigned count = 0;
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mutex_lock(&clocks_mutex);
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list_for_each_entry(clk, &clocks, list) {
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if (clk->flags & CLKFLAG_AUTO_OFF) {
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spin_lock_irqsave(&clocks_lock, flags);
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if (!clk->count) {
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count++;
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pc_clk_disable(clk->id);
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}
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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}
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mutex_unlock(&clocks_mutex);
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pr_info("clock_late_init() disabled %d unused clocks\n", count);
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return 0;
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}
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late_initcall(clock_late_init);
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@ -0,0 +1,48 @@
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/* arch/arm/mach-msm/clock.h
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
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#define __ARCH_ARM_MACH_MSM_CLOCK_H
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#include <linux/list.h>
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#define CLKFLAG_INVERT 0x00000001
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#define CLKFLAG_NOINVERT 0x00000002
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#define CLKFLAG_NONEST 0x00000004
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#define CLKFLAG_NORESET 0x00000008
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#define CLK_FIRST_AVAILABLE_FLAG 0x00000100
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#define CLKFLAG_USE_MIN_MAX_TO_SET 0x00000200
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#define CLKFLAG_AUTO_OFF 0x00000400
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struct clk {
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uint32_t id;
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uint32_t count;
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uint32_t flags;
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const char *name;
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struct list_head list;
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struct device *dev;
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};
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#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
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#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
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#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
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extern struct clk msm_clocks[];
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extern unsigned msm_num_clocks;
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#endif
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@ -33,5 +33,6 @@ void __init msm_add_devices(void);
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void __init msm_map_common_io(void);
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void __init msm_init_irq(void);
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void __init msm_init_gpio(void);
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void __init msm_clock_init(void);
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#endif
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