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mt76: move set_{tx,rx}_path routines in mt76x02-lib module 

Move mt76x02_phy_set_rxpath and mt76x02_phy_tx_dac routines in
mt76x02_phy.c since they are shared between mt76x2 and mt76x0 drivers.
Moreover move chainmask variable from mt76x2/mt76x0 to mt76_dev data
structure

Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Lorenzo Bianconi 2018-09-28 13:39:03 +02:00 committed by Felix Fietkau
parent 4468e92cf8
commit 6034b2b07a
13 changed files with 50 additions and 73 deletions
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1
drivers/net/wireless/mediatek/mt76/mt76.h
View File

@ -404,6 +404,7 @@ struct mt76_dev {
unsigned long state;
u8 antenna_mask;
u16 chainmask;
struct mt76_sband sband_2g;
struct mt76_sband sband_5g;

2
drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c
View File

@ -313,7 +313,7 @@ int mt76x0_eeprom_init(struct mt76x0_dev *dev)
mt76x0_set_freq_offset(dev);
mt76x0_set_temp_offset(dev);
dev->chainmask = 0x0101;
dev->mt76.chainmask = 0x0101;
return 0;
}

1
drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h
View File

@ -104,7 +104,6 @@ struct mt76x0_dev {
int avg_rssi; /* starts at 0 and converges */
u8 agc_save;
u16 chainmask;
bool no_2ghz;

31
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
View File

@ -855,32 +855,6 @@ void mt76x0_phy_con_cal_onoff(struct mt76x0_dev *dev,
spin_unlock_bh(&dev->con_mon_lock);
}
static void
mt76x0_set_rx_chains(struct mt76x0_dev *dev)
{
u32 val;
val = mt76_rr(dev, MT_BBP(AGC, 0));
val &= ~(BIT(3) | BIT(4));
if (dev->chainmask & BIT(1))
val |= BIT(3);
mt76_wr(dev, MT_BBP(AGC, 0), val);
mb();
val = mt76_rr(dev, MT_BBP(AGC, 0));
}
static void
mt76x0_set_tx_dac(struct mt76x0_dev *dev)
{
if (dev->chainmask & BIT(1))
mt76_set(dev, MT_BBP(TXBE, 5), 3);
else
mt76_clear(dev, MT_BBP(TXBE, 5), 3);
}
static void
mt76x0_rf_init(struct mt76x0_dev *dev)
{
@ -940,7 +914,6 @@ void mt76x0_phy_init(struct mt76x0_dev *dev)
INIT_DELAYED_WORK(&dev->cal_work, mt76x0_phy_calibrate);
mt76x0_rf_init(dev);
mt76x0_set_rx_chains(dev);
mt76x0_set_tx_dac(dev);
mt76x02_phy_set_rxpath(&dev->mt76);
mt76x02_phy_set_txdac(&dev->mt76);
}

38
drivers/net/wireless/mediatek/mt76/mt76x02_phy.c
View File

@ -20,6 +20,44 @@
#include "mt76.h"
#include "mt76x02_phy.h"
void mt76x02_phy_set_rxpath(struct mt76_dev *dev)
{
u32 val;
val = __mt76_rr(dev, MT_BBP(AGC, 0));
val &= ~BIT(4);
switch (dev->chainmask & 0xf) {
case 2:
val |= BIT(3);
break;
default:
val &= ~BIT(3);
break;
}
__mt76_wr(dev, MT_BBP(AGC, 0), val);
mb();
val = __mt76_rr(dev, MT_BBP(AGC, 0));
}
EXPORT_SYMBOL_GPL(mt76x02_phy_set_rxpath);
void mt76x02_phy_set_txdac(struct mt76_dev *dev)
{
int txpath;
txpath = (dev->chainmask >> 8) & 0xf;
switch (txpath) {
case 2:
__mt76_set(dev, MT_BBP(TXBE, 5), 0x3);
break;
default:
__mt76_clear(dev, MT_BBP(TXBE, 5), 0x3);
break;
}
}
EXPORT_SYMBOL_GPL(mt76x02_phy_set_txdac);
static u32
mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4)
{

2
drivers/net/wireless/mediatek/mt76/mt76x02_phy.h
View File

@ -23,5 +23,7 @@ void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset);
void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_2);
void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit);
int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
void mt76x02_phy_set_rxpath(struct mt76_dev *dev);
void mt76x02_phy_set_txdac(struct mt76_dev *dev);
#endif /* __MT76x02_PHY_H */

2
drivers/net/wireless/mediatek/mt76/mt76x2.h
View File

@ -97,8 +97,6 @@ struct mt76x2_dev {
u8 tbtt_count;
u16 beacon_int;
u16 chainmask;
struct mt76x2_calibration cal;
s8 target_power;

2
drivers/net/wireless/mediatek/mt76/mt76x2_init_common.c
View File

@ -177,7 +177,7 @@ void mt76x2_init_device(struct mt76x2_dev *dev)
dev->mt76.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
dev->mt76.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
dev->chainmask = 0x202;
dev->mt76.chainmask = 0x202;
dev->mt76.global_wcid.idx = 255;
dev->mt76.global_wcid.hw_key_idx = -1;
dev->slottime = 9;

2
drivers/net/wireless/mediatek/mt76/mt76x2_main.c
View File

@ -241,7 +241,7 @@ static int mt76x2_set_antenna(struct ieee80211_hw *hw, u32 tx_ant,
mutex_lock(&dev->mt76.mutex);
dev->chainmask = (tx_ant == 3) ? 0x202 : 0x101;
dev->mt76.chainmask = (tx_ant == 3) ? 0x202 : 0x101;
dev->mt76.antenna_mask = tx_ant;
mt76_set_stream_caps(&dev->mt76, true);

2
drivers/net/wireless/mediatek/mt76/mt76x2_mcu_common.c
View File

@ -42,7 +42,7 @@ int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
.idx = channel,
.scan = scan,
.bw = bw,
.chainmask = cpu_to_le16(dev->chainmask),
.chainmask = cpu_to_le16(dev->mt76.chainmask),
};
/* first set the channel without the extension channel info */

2
drivers/net/wireless/mediatek/mt76/mt76x2u.h
View File

@ -45,8 +45,6 @@ int mt76x2u_phy_set_channel(struct mt76x2_dev *dev,
struct cfg80211_chan_def *chandef);
void mt76x2u_phy_calibrate(struct work_struct *work);
void mt76x2u_phy_channel_calibrate(struct mt76x2_dev *dev);
void mt76x2u_phy_set_txdac(struct mt76x2_dev *dev);
void mt76x2u_phy_set_rxpath(struct mt76x2_dev *dev);
void mt76x2u_mcu_complete_urb(struct urb *urb);
int mt76x2u_mcu_set_dynamic_vga(struct mt76x2_dev *dev, u8 channel, bool ap,

5
drivers/net/wireless/mediatek/mt76/mt76x2u_init.c
View File

@ -18,6 +18,7 @@
#include "mt76x2u.h"
#include "mt76x02_util.h"
#include "mt76x02_phy.h"
#include "mt76x2_eeprom.h"
static void mt76x2u_init_dma(struct mt76x2_dev *dev)
@ -236,8 +237,8 @@ int mt76x2u_init_hardware(struct mt76x2_dev *dev)
if (err < 0)
return err;
mt76x2u_phy_set_rxpath(dev);
mt76x2u_phy_set_txdac(dev);
mt76x02_phy_set_rxpath(&dev->mt76);
mt76x02_phy_set_txdac(&dev->mt76);
return mt76x2u_mac_stop(dev);
}

33
drivers/net/wireless/mediatek/mt76/mt76x2u_phy.c
View File

@ -17,39 +17,6 @@
#include "mt76x2u.h"
#include "mt76x2_eeprom.h"
void mt76x2u_phy_set_rxpath(struct mt76x2_dev *dev)
{
u32 val;
val = mt76_rr(dev, MT_BBP(AGC, 0));
val &= ~BIT(4);
switch (dev->chainmask & 0xf) {
case 2:
val |= BIT(3);
break;
default:
val &= ~BIT(3);
break;
}
mt76_wr(dev, MT_BBP(AGC, 0), val);
}
void mt76x2u_phy_set_txdac(struct mt76x2_dev *dev)
{
int txpath;
txpath = (dev->chainmask >> 8) & 0xf;
switch (txpath) {
case 2:
mt76_set(dev, MT_BBP(TXBE, 5), 0x3);
break;
default:
mt76_clear(dev, MT_BBP(TXBE, 5), 0x3);
break;
}
}
void mt76x2u_phy_channel_calibrate(struct mt76x2_dev *dev)
{
struct ieee80211_channel *chan = dev->mt76.chandef.chan;