ASoC: Intel: Skylake: Reset the controller in probe

Controller can be in reset state by default. Capability structure
traversal requires the controller to be out of reset else it
results in broken capability parsing. Hence make sure that controller is
out of reset before parsing capabilities by doing a full reset.

Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
guneshwor.o.singh@intel.com 2017-07-28 16:12:13 +05:30 committed by Mark Brown
parent cc4db0e257
commit 60767abcea
1 changed files with 2 additions and 0 deletions

View File

@ -702,6 +702,8 @@ static int skl_first_init(struct hdac_ext_bus *ebus)
return -ENXIO;
}
skl_init_chip(bus, true);
snd_hdac_bus_parse_capabilities(bus);
if (skl_acquire_irq(ebus, 0) < 0)