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perf_counter: add comment to barrier
We need to ensure the enabled=0 write happens before we start disabling the actual counters, so that a pcm_amd_enable() will not enable one underneath us. I think the race is impossible anyway, we always balance the ops within any one context and perform enable() with IRQs disabled. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -247,6 +247,10 @@ static u64 pmc_amd_save_disable_all(void)
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enabled = cpuc->enabled;
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cpuc->enabled = 0;
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/*
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* ensure we write the disable before we start disabling the
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* counters proper, so that pcm_amd_enable() does the right thing.
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*/
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barrier();
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for (idx = 0; idx < nr_counters_generic; idx++) {
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