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Revert "x86/mm/legacy: Populate the user page-table with user pgd's" 

This reverts commit 1f40a46cf4.

It turned out that this patch is not sufficient to enable PTI on 32 bit
systems with legacy 2-level page-tables. In this paging mode the huge-page
PTEs are in the top-level page-table directory, where also the mirroring to
the user-space page-table happens. So every huge PTE exits twice, in the
kernel and in the user page-table.

That means that accessed/dirty bits need to be fetched from two PTEs in
this mode to be safe, but this is not trivial to implement because it needs
changes to generic code just for the sake of enabling PTI with 32-bit
legacy paging. As all systems that need PTI should support PAE anyway,
remove support for PTI when 32-bit legacy paging is used.

Fixes: 7757d607c6 ('x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32')
Reported-by: Meelis Roos <mroos@linux.ee>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: hpa@zytor.com
Cc: linux-mm@kvack.org
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Link: https://lkml.kernel.org/r/1536922754-31379-1-git-send-email-joro@8bytes.org
This commit is contained in:
Joerg Roedel 2018-09-14 12:59:14 +02:00 committed by Thomas Gleixner
parent cf40361ede
commit 61a6bd83ab
2 changed files with 1 additions and 10 deletions
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9
arch/x86/include/asm/pgtable-2level.h
View File

@ -19,9 +19,6 @@ static inline void native_set_pte(pte_t *ptep , pte_t pte)
static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
{ {
#ifdef CONFIG_PAGE_TABLE_ISOLATION
pmd.pud.p4d.pgd = pti_set_user_pgtbl(&pmdp->pud.p4d.pgd, pmd.pud.p4d.pgd);
#endif
*pmdp = pmd; *pmdp = pmd;
} }
@ -61,9 +58,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp) static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
{ {
#ifdef CONFIG_PAGE_TABLE_ISOLATION
pti_set_user_pgtbl(&xp->pud.p4d.pgd, __pgd(0));
#endif
return __pmd(xchg((pmdval_t *)xp, 0)); return __pmd(xchg((pmdval_t *)xp, 0));
} }
#else #else
@ -73,9 +67,6 @@ static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
static inline pud_t native_pudp_get_and_clear(pud_t *xp) static inline pud_t native_pudp_get_and_clear(pud_t *xp)
{ {
#ifdef CONFIG_PAGE_TABLE_ISOLATION
pti_set_user_pgtbl(&xp->p4d.pgd, __pgd(0));
#endif
return __pud(xchg((pudval_t *)xp, 0)); return __pud(xchg((pudval_t *)xp, 0));
} }
#else #else

2
security/Kconfig
View File

@ -57,7 +57,7 @@ config SECURITY_NETWORK
config PAGE_TABLE_ISOLATION config PAGE_TABLE_ISOLATION
bool "Remove the kernel mapping in user mode" bool "Remove the kernel mapping in user mode"
default y default y
depends on X86 && !UML depends on (X86_64 || X86_PAE) && !UML
help help
This feature reduces the number of hardware side channels by This feature reduces the number of hardware side channels by
ensuring that the majority of kernel addresses are not mapped ensuring that the majority of kernel addresses are not mapped