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[ARM] 4127/1: Flush the prefetch buffer after changing the DACR 

The ARM Architecture Reference Manual specifies that a prefetch flush
is needed after changing the DACR register (chapter B2.7.6).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas 2007-02-05 14:47:46 +01:00 committed by Russell King
parent dcda7e4ba1
commit 620879c9e3
1 changed files with 1 additions and 0 deletions
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1
include/asm-arm/domain.h
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@ -57,6 +57,7 @@
__asm__ __volatile__( \ __asm__ __volatile__( \
"mcr p15, 0, %0, c3, c0 @ set domain" \ "mcr p15, 0, %0, c3, c0 @ set domain" \
: : "r" (x)); \ : : "r" (x)); \
isb(); \
} while (0) } while (0)
#define modify_domain(dom,type) \ #define modify_domain(dom,type) \