mirror of https://gitee.com/openkylin/linux.git
mtd: nand: hynix: Add read-retry support for 1x nm MLC NANDs
All Hynix MLC NANDs produced with the 1x nm process support read-retry. This read retry implementation should also be re-usable for other Hynix NANDs, but the method to retrieve the read-retry parameters from the read-retry OTP area might change a bit (some NANDs are even using a fixed set of values instead of retrieving those information from the OTP area). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
This commit is contained in:
Boris Brezillon
parent
78f3482d74
commit
626994e074
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@ -17,6 +17,53 @@
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#include <linux/mtd/nand.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#define NAND_HYNIX_CMD_SET_PARAMS 0x36
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#define NAND_HYNIX_CMD_APPLY_PARAMS 0x16
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#define NAND_HYNIX_1XNM_RR_REPEAT 8
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/**
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* struct hynix_read_retry - read-retry data
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* @nregs: number of register to set when applying a new read-retry mode
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* @regs: register offsets (NAND chip dependent)
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* @values: array of values to set in registers. The array size is equal to
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* (nregs * nmodes)
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*/
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struct hynix_read_retry {
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int nregs;
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const u8 *regs;
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u8 values[0];
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};
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/**
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* struct hynix_nand - private Hynix NAND struct
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* @nand_technology: manufacturing process expressed in picometer
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* @read_retry: read-retry information
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*/
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struct hynix_nand {
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const struct hynix_read_retry *read_retry;
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};
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/**
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* struct hynix_read_retry_otp - structure describing how the read-retry OTP
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* area
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* @nregs: number of hynix private registers to set before reading the reading
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* the OTP area
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* @regs: registers that should be configured
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* @values: values that should be set in regs
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* @page: the address to pass to the READ_PAGE command. Depends on the NAND
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* chip
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* @size: size of the read-retry OTP section
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*/
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struct hynix_read_retry_otp {
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int nregs;
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const u8 *regs;
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const u8 *values;
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int page;
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int size;
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};
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static bool hynix_nand_has_valid_jedecid(struct nand_chip *chip)
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{
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@ -31,6 +78,288 @@ static bool hynix_nand_has_valid_jedecid(struct nand_chip *chip)
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return !strcmp("JEDEC", jedecid);
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}
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static int hynix_nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct hynix_nand *hynix = nand_get_manufacturer_data(chip);
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const u8 *values;
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int status;
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int i;
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values = hynix->read_retry->values +
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(retry_mode * hynix->read_retry->nregs);
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/* Enter 'Set Hynix Parameters' mode */
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chip->cmdfunc(mtd, NAND_HYNIX_CMD_SET_PARAMS, -1, -1);
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/*
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* Configure the NAND in the requested read-retry mode.
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* This is done by setting pre-defined values in internal NAND
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* registers.
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*
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* The set of registers is NAND specific, and the values are either
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* predefined or extracted from an OTP area on the NAND (values are
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* probably tweaked at production in this case).
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*/
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for (i = 0; i < hynix->read_retry->nregs; i++) {
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int column = hynix->read_retry->regs[i];
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column |= column << 8;
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chip->cmdfunc(mtd, NAND_CMD_NONE, column, -1);
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chip->write_byte(mtd, values[i]);
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}
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/* Apply the new settings. */
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chip->cmdfunc(mtd, NAND_HYNIX_CMD_APPLY_PARAMS, -1, -1);
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status = chip->waitfunc(mtd, chip);
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if (status & NAND_STATUS_FAIL)
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return -EIO;
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return 0;
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}
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/**
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* hynix_get_majority - get the value that is occurring the most in a given
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* set of values
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* @in: the array of values to test
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* @repeat: the size of the in array
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* @out: pointer used to store the output value
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*
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* This function implements the 'majority check' logic that is supposed to
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* overcome the unreliability of MLC NANDs when reading the OTP area storing
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* the read-retry parameters.
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*
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* It's based on a pretty simple assumption: if we repeat the same value
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* several times and then take the one that is occurring the most, we should
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* find the correct value.
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* Let's hope this dummy algorithm prevents us from losing the read-retry
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* parameters.
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*/
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static int hynix_get_majority(const u8 *in, int repeat, u8 *out)
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{
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int i, j, half = repeat / 2;
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/*
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* We only test the first half of the in array because we must ensure
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* that the value is at least occurring repeat / 2 times.
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*
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* This loop is suboptimal since we may count the occurrences of the
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* same value several time, but we are doing that on small sets, which
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* makes it acceptable.
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*/
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for (i = 0; i < half; i++) {
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int cnt = 0;
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u8 val = in[i];
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/* Count all values that are matching the one at index i. */
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for (j = i + 1; j < repeat; j++) {
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if (in[j] == val)
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cnt++;
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}
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/* We found a value occurring more than repeat / 2. */
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if (cnt > half) {
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*out = val;
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return 0;
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}
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}
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return -EIO;
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}
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static int hynix_read_rr_otp(struct nand_chip *chip,
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const struct hynix_read_retry_otp *info,
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void *buf)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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int i;
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chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
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chip->cmdfunc(mtd, NAND_HYNIX_CMD_SET_PARAMS, -1, -1);
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for (i = 0; i < info->nregs; i++) {
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int column = info->regs[i];
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column |= column << 8;
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chip->cmdfunc(mtd, NAND_CMD_NONE, column, -1);
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chip->write_byte(mtd, info->values[i]);
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}
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chip->cmdfunc(mtd, NAND_HYNIX_CMD_APPLY_PARAMS, -1, -1);
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/* Sequence to enter OTP mode? */
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chip->cmdfunc(mtd, 0x17, -1, -1);
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chip->cmdfunc(mtd, 0x04, -1, -1);
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chip->cmdfunc(mtd, 0x19, -1, -1);
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/* Now read the page */
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, info->page);
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chip->read_buf(mtd, buf, info->size);
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/* Put everything back to normal */
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chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
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chip->cmdfunc(mtd, NAND_HYNIX_CMD_SET_PARAMS, 0x38, -1);
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chip->write_byte(mtd, 0x0);
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chip->cmdfunc(mtd, NAND_HYNIX_CMD_APPLY_PARAMS, -1, -1);
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, -1);
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return 0;
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}
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#define NAND_HYNIX_1XNM_RR_COUNT_OFFS 0
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#define NAND_HYNIX_1XNM_RR_REG_COUNT_OFFS 8
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#define NAND_HYNIX_1XNM_RR_SET_OFFS(x, setsize, inv) \
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(16 + ((((x) * 2) + ((inv) ? 1 : 0)) * (setsize)))
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static int hynix_mlc_1xnm_rr_value(const u8 *buf, int nmodes, int nregs,
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int mode, int reg, bool inv, u8 *val)
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{
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u8 tmp[NAND_HYNIX_1XNM_RR_REPEAT];
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int val_offs = (mode * nregs) + reg;
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int set_size = nmodes * nregs;
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int i, ret;
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for (i = 0; i < NAND_HYNIX_1XNM_RR_REPEAT; i++) {
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int set_offs = NAND_HYNIX_1XNM_RR_SET_OFFS(i, set_size, inv);
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tmp[i] = buf[val_offs + set_offs];
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}
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ret = hynix_get_majority(tmp, NAND_HYNIX_1XNM_RR_REPEAT, val);
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if (ret)
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return ret;
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if (inv)
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*val = ~*val;
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return 0;
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}
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static u8 hynix_1xnm_mlc_read_retry_regs[] = {
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0xcc, 0xbf, 0xaa, 0xab, 0xcd, 0xad, 0xae, 0xaf
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};
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static int hynix_mlc_1xnm_rr_init(struct nand_chip *chip,
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const struct hynix_read_retry_otp *info)
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{
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struct hynix_nand *hynix = nand_get_manufacturer_data(chip);
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struct hynix_read_retry *rr = NULL;
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int ret, i, j;
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u8 nregs, nmodes;
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u8 *buf;
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buf = kmalloc(info->size, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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ret = hynix_read_rr_otp(chip, info, buf);
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if (ret)
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goto out;
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ret = hynix_get_majority(buf, NAND_HYNIX_1XNM_RR_REPEAT,
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&nmodes);
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if (ret)
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goto out;
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ret = hynix_get_majority(buf + NAND_HYNIX_1XNM_RR_REPEAT,
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NAND_HYNIX_1XNM_RR_REPEAT,
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&nregs);
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if (ret)
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goto out;
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rr = kzalloc(sizeof(*rr) + (nregs * nmodes), GFP_KERNEL);
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if (!rr)
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goto out;
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for (i = 0; i < nmodes; i++) {
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for (j = 0; j < nregs; j++) {
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u8 *val = rr->values + (i * nregs);
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ret = hynix_mlc_1xnm_rr_value(buf, nmodes, nregs, i, j,
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false, val);
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if (!ret)
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continue;
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ret = hynix_mlc_1xnm_rr_value(buf, nmodes, nregs, i, j,
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true, val);
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if (ret)
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goto out;
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}
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}
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rr->nregs = nregs;
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rr->regs = hynix_1xnm_mlc_read_retry_regs;
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hynix->read_retry = rr;
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chip->setup_read_retry = hynix_nand_setup_read_retry;
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chip->read_retries = nmodes;
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out:
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kfree(buf);
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if (ret)
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kfree(rr);
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return ret;
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}
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static const u8 hynix_mlc_1xnm_rr_otp_regs[] = { 0x38 };
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static const u8 hynix_mlc_1xnm_rr_otp_values[] = { 0x52 };
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static const struct hynix_read_retry_otp hynix_mlc_1xnm_rr_otps[] = {
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{
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.nregs = ARRAY_SIZE(hynix_mlc_1xnm_rr_otp_regs),
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.regs = hynix_mlc_1xnm_rr_otp_regs,
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.values = hynix_mlc_1xnm_rr_otp_values,
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.page = 0x21f,
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.size = 784
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},
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{
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.nregs = ARRAY_SIZE(hynix_mlc_1xnm_rr_otp_regs),
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.regs = hynix_mlc_1xnm_rr_otp_regs,
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.values = hynix_mlc_1xnm_rr_otp_values,
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.page = 0x200,
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.size = 528,
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},
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};
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static int hynix_nand_rr_init(struct nand_chip *chip)
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{
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int i, ret = 0;
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bool valid_jedecid;
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valid_jedecid = hynix_nand_has_valid_jedecid(chip);
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/*
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* We only support read-retry for 1xnm NANDs, and those NANDs all
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* expose a valid JEDEC ID.
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*/
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if (valid_jedecid) {
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u8 nand_tech = chip->id.data[5] >> 4;
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/* 1xnm technology */
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if (nand_tech == 4) {
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for (i = 0; i < ARRAY_SIZE(hynix_mlc_1xnm_rr_otps);
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i++) {
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/*
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* FIXME: Hynix recommend to copy the
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* read-retry OTP area into a normal page.
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*/
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ret = hynix_mlc_1xnm_rr_init(chip,
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hynix_mlc_1xnm_rr_otps);
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if (!ret)
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break;
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}
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}
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}
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if (ret)
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pr_warn("failed to initialize read-retry infrastructure");
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return 0;
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}
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static void hynix_nand_extract_oobsize(struct nand_chip *chip,
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bool valid_jedecid)
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{
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@ -258,17 +587,43 @@ static void hynix_nand_decode_id(struct nand_chip *chip)
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hynix_nand_extract_scrambling_requirements(chip, valid_jedecid);
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}
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static void hynix_nand_cleanup(struct nand_chip *chip)
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{
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struct hynix_nand *hynix = nand_get_manufacturer_data(chip);
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if (!hynix)
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return;
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kfree(hynix->read_retry);
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kfree(hynix);
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nand_set_manufacturer_data(chip, NULL);
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}
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static int hynix_nand_init(struct nand_chip *chip)
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{
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struct hynix_nand *hynix;
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int ret;
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if (!nand_is_slc(chip))
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chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
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else
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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return 0;
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hynix = kzalloc(sizeof(*hynix), GFP_KERNEL);
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if (!hynix)
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return -ENOMEM;
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nand_set_manufacturer_data(chip, hynix);
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ret = hynix_nand_rr_init(chip);
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if (ret)
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hynix_nand_cleanup(chip);
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return ret;
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}
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const struct nand_manufacturer_ops hynix_nand_manuf_ops = {
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.detect = hynix_nand_decode_id,
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.init = hynix_nand_init,
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.cleanup = hynix_nand_cleanup,
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};
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