mirror of https://gitee.com/openkylin/linux.git
drm/radeon/cik: implement some more atom helpers for DPM
Required for DPM on CIK. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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58ea2deab3
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@ -3077,6 +3077,121 @@ int radeon_atom_get_leakage_vddc_based_on_leakage_idx(struct radeon_device *rdev
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return radeon_atom_get_max_vddc(rdev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage);
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}
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int radeon_atom_get_leakage_id_from_vbios(struct radeon_device *rdev,
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u16 *leakage_id)
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{
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union set_voltage args;
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int index = GetIndexIntoMasterTable(COMMAND, SetVoltage);
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u8 frev, crev;
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if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
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return -EINVAL;
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switch (crev) {
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case 3:
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case 4:
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args.v3.ucVoltageType = 0;
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args.v3.ucVoltageMode = ATOM_GET_LEAKAGE_ID;
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args.v3.usVoltageLevel = 0;
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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*leakage_id = le16_to_cpu(args.v3.usVoltageLevel);
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break;
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default:
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DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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return -EINVAL;
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}
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return 0;
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}
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int radeon_atom_get_leakage_vddc_based_on_leakage_params(struct radeon_device *rdev,
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u16 *vddc, u16 *vddci,
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u16 virtual_voltage_id,
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u16 vbios_voltage_id)
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{
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int index = GetIndexIntoMasterTable(DATA, ASIC_ProfilingInfo);
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u8 frev, crev;
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u16 data_offset, size;
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int i, j;
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ATOM_ASIC_PROFILING_INFO_V2_1 *profile;
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u16 *leakage_bin, *vddc_id_buf, *vddc_buf, *vddci_id_buf, *vddci_buf;
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*vddc = 0;
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*vddci = 0;
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if (!atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
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&frev, &crev, &data_offset))
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return -EINVAL;
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profile = (ATOM_ASIC_PROFILING_INFO_V2_1 *)
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(rdev->mode_info.atom_context->bios + data_offset);
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switch (frev) {
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case 1:
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return -EINVAL;
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case 2:
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switch (crev) {
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case 1:
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if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
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return -EINVAL;
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leakage_bin = (u16 *)
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(rdev->mode_info.atom_context->bios + data_offset +
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le16_to_cpu(profile->usLeakageBinArrayOffset));
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vddc_id_buf = (u16 *)
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(rdev->mode_info.atom_context->bios + data_offset +
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le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
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vddc_buf = (u16 *)
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(rdev->mode_info.atom_context->bios + data_offset +
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le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
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vddci_id_buf = (u16 *)
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(rdev->mode_info.atom_context->bios + data_offset +
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le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
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vddci_buf = (u16 *)
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(rdev->mode_info.atom_context->bios + data_offset +
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le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
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if (profile->ucElbVDDC_Num > 0) {
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for (i = 0; i < profile->ucElbVDDC_Num; i++) {
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if (vddc_id_buf[i] == virtual_voltage_id) {
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for (j = 0; j < profile->ucLeakageBinNum; j++) {
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if (vbios_voltage_id <= leakage_bin[j]) {
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*vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
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break;
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}
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}
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break;
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}
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}
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}
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if (profile->ucElbVDDCI_Num > 0) {
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for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
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if (vddci_id_buf[i] == virtual_voltage_id) {
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for (j = 0; j < profile->ucLeakageBinNum; j++) {
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if (vbios_voltage_id <= leakage_bin[j]) {
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*vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
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break;
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}
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}
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break;
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}
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}
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}
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break;
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default:
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DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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return -EINVAL;
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}
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break;
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default:
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DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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return -EINVAL;
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}
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return 0;
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}
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int radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev,
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u16 voltage_level, u8 voltage_type,
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u32 *gpio_value, u32 *gpio_mask)
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