mirror of https://gitee.com/openkylin/linux.git
clk: qcom: dispcc-sm8250: use parent_hws where possible
Switch to using parent_hws instead of parent_data when parents are defined in this driver and so accessible using clk_hw. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210405224743.590029-19-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
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f8fae78c81
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@ -448,8 +448,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = {
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.width = 2,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte0_div_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_byte0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_byte0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_regmap_div_ops,
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@ -463,8 +463,8 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = {
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.width = 2,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte1_div_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_byte1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_byte1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_regmap_div_ops,
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@ -478,8 +478,8 @@ static struct clk_regmap_div disp_cc_mdss_dp_link1_div_clk_src = {
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.width = 2,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dp_link1_div_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_link1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_link1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_regmap_div_ro_ops,
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@ -493,8 +493,8 @@ static struct clk_regmap_div disp_cc_mdss_dp_link_div_clk_src = {
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.width = 2,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dp_link_div_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_regmap_div_ro_ops,
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@ -509,8 +509,8 @@ static struct clk_branch disp_cc_mdss_ahb_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_ahb_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_ahb_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -527,8 +527,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_byte0_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_byte0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_byte0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -545,8 +545,8 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_byte0_intf_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_byte0_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -563,8 +563,8 @@ static struct clk_branch disp_cc_mdss_byte1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_byte1_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_byte1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_byte1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -581,8 +581,8 @@ static struct clk_branch disp_cc_mdss_byte1_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_byte1_intf_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_byte1_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_byte1_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -599,8 +599,8 @@ static struct clk_branch disp_cc_mdss_dp_aux1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_aux1_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_aux1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_aux1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -617,8 +617,8 @@ static struct clk_branch disp_cc_mdss_dp_aux_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_aux_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_aux_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_aux_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -635,8 +635,8 @@ static struct clk_branch disp_cc_mdss_dp_link1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_link1_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_link1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_link1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -653,8 +653,8 @@ static struct clk_branch disp_cc_mdss_dp_link1_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_link1_intf_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_link1_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_link1_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_branch2_ops,
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@ -670,8 +670,8 @@ static struct clk_branch disp_cc_mdss_dp_link_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_link_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -688,8 +688,8 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_link_intf_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_link_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_link_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_branch2_ops,
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@ -705,8 +705,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_pixel1_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_pixel1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_pixel1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -723,8 +723,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel2_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_pixel2_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_pixel2_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_pixel2_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -741,8 +741,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_dp_pixel_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_dp_pixel_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_dp_pixel_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -759,8 +759,8 @@ static struct clk_branch disp_cc_mdss_esc0_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_esc0_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_esc0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_esc0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -777,8 +777,8 @@ static struct clk_branch disp_cc_mdss_esc1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_esc1_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_esc1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_esc1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -795,8 +795,8 @@ static struct clk_branch disp_cc_mdss_mdp_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_mdp_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_mdp_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -813,8 +813,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_mdp_lut_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_mdp_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_branch2_ops,
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@ -830,8 +830,8 @@ static struct clk_branch disp_cc_mdss_non_gdsc_ahb_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_non_gdsc_ahb_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_ahb_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -848,8 +848,8 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_pclk0_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_pclk0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -866,8 +866,8 @@ static struct clk_branch disp_cc_mdss_pclk1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_pclk1_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_pclk1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_pclk1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -884,8 +884,8 @@ static struct clk_branch disp_cc_mdss_rot_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_rot_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_rot_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_rot_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -902,8 +902,8 @@ static struct clk_branch disp_cc_mdss_rscc_ahb_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_rscc_ahb_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_ahb_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -920,8 +920,8 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_rscc_vsync_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_vsync_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -938,8 +938,8 @@ static struct clk_branch disp_cc_mdss_vsync_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_vsync_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]){
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&disp_cc_mdss_vsync_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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