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Second Round of Renesas ARM Based SoC Fixes for v4.6 

* Don't disable referenced optional scif clock
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXIUSSAAoJENfPZGlqN0++NxUP/iExGz3SUIwOMh9vcq4zl6Iz
 LSvZMo26XYkF4/HBOAfrtNGxfFZnZRPOLhQ1K757YJejvo7uPxp6loOxolfe93GI
 o92dMCRWCFN7IcmGX+JOlcnMkyG4o8fUjgrPm3V5DUV3+bn7UBYnkD91RXgFiMxw
 2it4mas1sDajEzgJ16AJK/JT/x0amrMzZp9dieO/7++g1lLp8SToxDTtJarWgrkc
 OytMGN96fxfvKKSjDC/MUD7vq12+yVQXHYlxIo+E851fP42xqhUuc070/xPbtRqm
 9EsGPoqF9CQL5c4NY9TbXtY2gD/cvHWd0ojbPtHPGpg7vMXGBSLIDBn7pBEmu5oK
 5ivMXtSSIXX2lr0hGnJM27NmfSx/JGQiJhW/BdyYrMJgTS7/Sji3/Vau0+aEqxt/
 SxpZQf0xcVKd+xd+ZnvBB7b3ffBbdkAPAYVAv/Y452oTWlUs6yH76nvMUqAf7dy/
 wMfHGucxtNhKM8jB/iS3Z2aWMcWDZxH+B3Q/PwmkjUxJLxj9Db2bKQ/2Gn6IrX3B
 dl+S2ZrGC/n+Qqh7+aLoqbtAp7hn5i43fZIe3UL6xYf90kWi/D7iOz+w/LaHX7YE
 qlTF4lInwy39Y58PXkLNgivaS0zSFCZ3gWFk7hg0gXBPQlnLYsIZ9dFqGMF4uQZt
 2Qj3ebjkIq37eM20l7cd
 =ySSs
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Second Round of Renesas ARM Based SoC Fixes for v4.6" from Simon Horman:

* Don't disable referenced optional scif clock

* tag 'renesas-fixes2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Don't disable referenced optional scif clock
  ARM: shmobile: timer: Fix preset_lpj leading to too short delays
  Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
  ARM: dts: r8a7791: Don't disable referenced optional clocks
This commit is contained in:
Arnd Bergmann 2016-04-28 17:46:27 +02:00
parent 94379acca0 f5515f9cdf
commit 6383190203
5 changed files with 14 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -661,6 +661,7 @@ &usbphy {
};
&pcie_bus_clk {
clock-frequency = <100000000>;
status = "okay";
};

14
arch/arm/boot/dts/r8a7791-porter.dts
View File

@ -143,19 +143,11 @@ &extal_clk {
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
@ -229,11 +221,6 @@ &scif0 {
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&ether {
pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default";
@ -414,6 +401,7 @@ &usbphy {
};
&pcie_bus_clk {
clock-frequency = <100000000>;
status = "okay";
};

5
arch/arm/boot/dts/r8a7791.dtsi
View File

@ -1083,9 +1083,8 @@ audio_clk_c: audio_clk_c {
pcie_bus_clk: pcie_bus_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-frequency = <0>;
clock-output-names = "pcie_bus";
status = "disabled";
};
/* External SCIF clock */
@ -1094,7 +1093,6 @@ scif_clk: scif {
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
status = "disabled";
};
/* External USB clock - can be overridden by the board */
@ -1112,7 +1110,6 @@ can_clk: can_clk {
/* This value must be overridden by the board. */
clock-frequency = <0>;
clock-output-names = "can_clk";
status = "disabled";
};
/* Special CPG clocks */

28
arch/arm/mach-shmobile/timer.c
View File

@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
void __init shmobile_init_delay(void)
{
struct device_node *np, *cpus;
bool is_a7_a8_a9 = false;
bool is_a15 = false;
unsigned int div = 0;
bool has_arch_timer = false;
u32 max_freq = 0;
@ -55,27 +54,22 @@ void __init shmobile_init_delay(void)
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
if (of_device_is_compatible(np, "arm,cortex-a8") ||
of_device_is_compatible(np, "arm,cortex-a9")) {
is_a7_a8_a9 = true;
} else if (of_device_is_compatible(np, "arm,cortex-a7")) {
is_a7_a8_a9 = true;
has_arch_timer = true;
} else if (of_device_is_compatible(np, "arm,cortex-a15")) {
is_a15 = true;
if (of_device_is_compatible(np, "arm,cortex-a8")) {
div = 2;
} else if (of_device_is_compatible(np, "arm,cortex-a9")) {
div = 1;
} else if (of_device_is_compatible(np, "arm,cortex-a7") ||
of_device_is_compatible(np, "arm,cortex-a15")) {
div = 1;
has_arch_timer = true;
}
}
of_node_put(cpus);
if (!max_freq)
if (!max_freq || !div)
return;
if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
if (is_a7_a8_a9)
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (is_a15)
shmobile_setup_delay_hz(max_freq, 2, 4);
}
if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
shmobile_setup_delay_hz(max_freq, 1, div);
}

1
arch/arm64/boot/dts/renesas/r8a7795.dtsi
View File

@ -120,7 +120,6 @@ scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
status = "disabled";
};
soc {