perf_event: x86: Optimize the constraint searching bits

Instead of copying bitmasks around, pass pointers to the constraint
structure.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
LKML-Reference: <20100122155535.887853503@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra 2010-01-22 16:32:17 +01:00 committed by Ingo Molnar
parent 9f41699ed0
commit 63b146490b
1 changed files with 34 additions and 41 deletions

View File

@ -134,12 +134,14 @@ struct x86_pmu {
u64 intel_ctrl; u64 intel_ctrl;
void (*enable_bts)(u64 config); void (*enable_bts)(u64 config);
void (*disable_bts)(void); void (*disable_bts)(void);
void (*get_event_constraints)(struct cpu_hw_events *cpuc,
struct perf_event *event, struct event_constraint *
unsigned long *idxmsk); (*get_event_constraints)(struct cpu_hw_events *cpuc,
struct perf_event *event);
void (*put_event_constraints)(struct cpu_hw_events *cpuc, void (*put_event_constraints)(struct cpu_hw_events *cpuc,
struct perf_event *event); struct perf_event *event);
const struct event_constraint *event_constraints; struct event_constraint *event_constraints;
}; };
static struct x86_pmu x86_pmu __read_mostly; static struct x86_pmu x86_pmu __read_mostly;
@ -1242,17 +1244,15 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
{ {
int i, j , w, num; int i, j , w, num;
int weight, wmax; int weight, wmax;
unsigned long *c; struct event_constraint *c, *constraints[X86_PMC_IDX_MAX];
unsigned long constraints[X86_PMC_IDX_MAX][BITS_TO_LONGS(X86_PMC_IDX_MAX)];
unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
struct hw_perf_event *hwc; struct hw_perf_event *hwc;
bitmap_zero(used_mask, X86_PMC_IDX_MAX); bitmap_zero(used_mask, X86_PMC_IDX_MAX);
for (i = 0; i < n; i++) { for (i = 0; i < n; i++) {
x86_pmu.get_event_constraints(cpuc, constraints[i] =
cpuc->event_list[i], x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
constraints[i]);
} }
/* /*
@ -1267,7 +1267,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
break; break;
/* constraint still honored */ /* constraint still honored */
if (!test_bit(hwc->idx, c)) if (!test_bit(hwc->idx, c->idxmsk))
break; break;
/* not already used */ /* not already used */
@ -1320,11 +1320,11 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
c = constraints[i]; c = constraints[i];
hwc = &cpuc->event_list[i]->hw; hwc = &cpuc->event_list[i]->hw;
weight = bitmap_weight(c, X86_PMC_IDX_MAX); weight = bitmap_weight(c->idxmsk, X86_PMC_IDX_MAX);
if (weight != w) if (weight != w)
continue; continue;
for_each_bit(j, c, X86_PMC_IDX_MAX) { for_each_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
if (!test_bit(j, used_mask)) if (!test_bit(j, used_mask))
break; break;
} }
@ -2155,11 +2155,13 @@ perf_event_nmi_handler(struct notifier_block *self,
return NOTIFY_STOP; return NOTIFY_STOP;
} }
static struct event_constraint unconstrained;
static struct event_constraint bts_constraint = static struct event_constraint bts_constraint =
EVENT_CONSTRAINT(0, 1ULL << X86_PMC_IDX_FIXED_BTS, 0); EVENT_CONSTRAINT(0, 1ULL << X86_PMC_IDX_FIXED_BTS, 0);
static int intel_special_constraints(struct perf_event *event, static struct event_constraint *
unsigned long *idxmsk) intel_special_constraints(struct perf_event *event)
{ {
unsigned int hw_event; unsigned int hw_event;
@ -2169,46 +2171,34 @@ static int intel_special_constraints(struct perf_event *event,
x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) && x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) &&
(event->hw.sample_period == 1))) { (event->hw.sample_period == 1))) {
bitmap_copy((unsigned long *)idxmsk, return &bts_constraint;
(unsigned long *)bts_constraint.idxmsk,
X86_PMC_IDX_MAX);
return 1;
} }
return 0; return NULL;
} }
static void intel_get_event_constraints(struct cpu_hw_events *cpuc, static struct event_constraint *
struct perf_event *event, intel_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
unsigned long *idxmsk)
{ {
const struct event_constraint *c; struct event_constraint *c;
/* c = intel_special_constraints(event);
* cleanup bitmask if (c)
*/ return c;
bitmap_zero(idxmsk, X86_PMC_IDX_MAX);
if (intel_special_constraints(event, idxmsk))
return;
if (x86_pmu.event_constraints) { if (x86_pmu.event_constraints) {
for_each_event_constraint(c, x86_pmu.event_constraints) { for_each_event_constraint(c, x86_pmu.event_constraints) {
if ((event->hw.config & c->cmask) == c->code) { if ((event->hw.config & c->cmask) == c->code)
bitmap_copy(idxmsk, c->idxmsk, X86_PMC_IDX_MAX); return c;
return;
}
} }
} }
/* no constraints, means supports all generic counters */
bitmap_fill((unsigned long *)idxmsk, x86_pmu.num_events); return &unconstrained;
} }
static void amd_get_event_constraints(struct cpu_hw_events *cpuc, static struct event_constraint *
struct perf_event *event, amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
unsigned long *idxmsk)
{ {
/* no constraints, means supports all generic counters */ return &unconstrained;
bitmap_fill(idxmsk, x86_pmu.num_events);
} }
static int x86_event_sched_in(struct perf_event *event, static int x86_event_sched_in(struct perf_event *event,
@ -2576,6 +2566,9 @@ void __init init_hw_perf_events(void)
perf_events_lapic_init(); perf_events_lapic_init();
register_die_notifier(&perf_event_nmi_notifier); register_die_notifier(&perf_event_nmi_notifier);
unconstrained = (struct event_constraint)
EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1, 0);
pr_info("... version: %d\n", x86_pmu.version); pr_info("... version: %d\n", x86_pmu.version);
pr_info("... bit width: %d\n", x86_pmu.event_bits); pr_info("... bit width: %d\n", x86_pmu.event_bits);
pr_info("... generic registers: %d\n", x86_pmu.num_events); pr_info("... generic registers: %d\n", x86_pmu.num_events);