mirror of https://gitee.com/openkylin/linux.git
KVM: x86: avoid incorrect writes to host MSR_IA32_SPEC_CTRL
If the guest is configured to have SPEC_CTRL but the host does not (which is a nonsensical configuration but these are not explicitly forbidden) then a host-initiated MSR write can write vmx->spec_ctrl (respectively svm->spec_ctrl) and trigger a #GP when KVM tries to restore the host value of the MSR. Add a more comprehensive check for valid bits of SPEC_CTRL, covering host CPUID flags and, since we are at it and it is more correct that way, guest CPUID flags too. For AMD, remove the unnecessary is_guest_mode check around setting the MSR interception bitmap, so that the code looks the same as for Intel. Cc: Jim Mattson <jmattson@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -4324,12 +4324,10 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
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return 1;
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/* The STIBP bit doesn't fault even if it's not advertised */
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if (data & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD))
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if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
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return 1;
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svm->spec_ctrl = data;
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if (!data)
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break;
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@ -4353,13 +4351,12 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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if (data & ~PRED_CMD_IBPB)
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return 1;
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if (!boot_cpu_has(X86_FEATURE_AMD_IBPB))
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return 1;
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if (!data)
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break;
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wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
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if (is_guest_mode(vcpu))
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break;
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set_msr_interception(svm->msrpm, MSR_IA32_PRED_CMD, 0, 1);
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break;
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case MSR_AMD64_VIRT_SPEC_CTRL:
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@ -1998,12 +1998,10 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
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return 1;
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/* The STIBP bit doesn't fault even if it's not advertised */
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if (data & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD))
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if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
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return 1;
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vmx->spec_ctrl = data;
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if (!data)
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break;
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@ -2037,7 +2035,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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if (data & ~PRED_CMD_IBPB)
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return 1;
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if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL))
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return 1;
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if (!data)
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break;
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@ -10389,6 +10389,28 @@ bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
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}
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EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
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u64 kvm_spec_ctrl_valid_bits(struct kvm_vcpu *vcpu)
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{
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uint64_t bits = SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD;
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/* The STIBP bit doesn't fault even if it's not advertised */
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if (!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS))
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bits &= ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP);
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if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL) &&
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!boot_cpu_has(X86_FEATURE_AMD_IBRS))
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bits &= ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP);
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if (!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL_SSBD) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
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bits &= ~SPEC_CTRL_SSBD;
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if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) &&
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!boot_cpu_has(X86_FEATURE_AMD_SSBD))
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bits &= ~SPEC_CTRL_SSBD;
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return bits;
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}
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EXPORT_SYMBOL_GPL(kvm_spec_ctrl_valid_bits);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
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@ -367,5 +367,6 @@ static inline bool kvm_pat_valid(u64 data)
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void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
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void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
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u64 kvm_spec_ctrl_valid_bits(struct kvm_vcpu *vcpu);
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#endif
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