mirror of https://gitee.com/openkylin/linux.git
First batch of AT91 cleanup for 3.5 kernel.
- The biggest improvement of this series is the ability to compile several AT91 SoCs in one kernel image. For now on it's limited to the DT-enabled boards but we can compile all the core together. - The Kconfig series is stacked before other patches as it is simple and non-intrusive. Its goal is to remove too restrictive dependencies on SoC names. This will allow to add support for newer SoC seamlessly. - Some very "cosmetic" Kconfig changes are also added (entry names, comments, etc.). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJPjYz4AAoJEAf03oE53VmQ/0wH/3kXJYM/8nX8fqlQ8eTh0SHi lRsoNL+4arHFKcocYhZyiXEidUKCUMLuQSdvL9MWy1e286+ABsaFgrjfLsp/ZDqE jDJBCZIxUD6rL94VRnYEHrhWqGzzPKi8/syVZ8JOv/1HGml402CqPcRDKmWY/e4Q ajl/d463q0ufwfQ4LMP+DsR29TxEdecs4DkxnhwcrRCbJ2hDPLmWVER+tPITPwqp R8qVGY3K6axG68b964B/hsACjRF7C1lqRQsiQbi8pVPPGEhekmgnW8hF6dNdy1VW wVo8F0GCST6jLk9YFbirBdKsDRJTLc+WsyP6jUZyWkrrM6p4ycs+voGFDNZbhPw= =CXyd -----END PGP SIGNATURE----- Merge tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup Nicolas Ferre <nicolas.ferre@atmel.com> writes: First batch of AT91 cleanup for 3.5 kernel. - The biggest improvement of this series is the ability to compile several AT91 SoCs in one kernel image. For now on it's limited to the DT-enabled boards but we can compile all the core together. - The Kconfig series is stacked before other patches as it is simple and non-intrusive. Its goal is to remove too restrictive dependencies on SoC names. This will allow to add support for newer SoC seamlessly. - Some very "cosmetic" Kconfig changes are also added (entry names, comments, etc.). * tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91: (19 commits) ARM: at91: add defconfig for device tree ARM: at91/dt: do not specify the board any more ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select ARM: at91: pm select memory controler at runtime ARM: at91: move at91_init_leds to board init ARM: at91: do not pin mux the UARTs in init_early ARM: at91: drop at91_set_serial_console ARM: at91: uncompress: autodetect the uart to use ARM: at91: uncompress Store UART address in a variable hwrng: Kconfig: remove dependency for atmel-rng driver Input: Kconfig: remove dependency for atmel_tsadcc driver rtc: Kconfig: remove dependency for AT91 rtc driver ARM: at91/Kconfig: website link for AT91SAM9G20-EK ARM: at91/Kconfig: add AT91SAM9x5 family to AT91_EARLY_DBGU0 entry ARM: at91/Kconfig: add clarifications to AT91SAM9M10G45-EK entry ARM: at91/Kconfig: add comment to at91sam9x5 family entry ARM: at91/Kconfig: change at91sam9g45 entry ARM: at91: change AT91 Kconfig entry comment Also updates the cleanup branch to v3.4-rc3. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
6540afeae0
|
@ -1,5 +1,5 @@
|
|||
What: /sys/bus/usb/drivers/usbtmc/devices/*/interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/device_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/device_capabilities
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -12,8 +12,8 @@ Description:
|
|||
The files are read only.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/usb488_interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/usb488_device_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/usb488_interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/usb488_device_capabilities
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -27,7 +27,7 @@ Description:
|
|||
The files are read only.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/TermChar
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/TermChar
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -40,7 +40,7 @@ Description:
|
|||
sent to the device or not.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/TermCharEnabled
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/TermCharEnabled
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -51,7 +51,7 @@ Description:
|
|||
published by the USB-IF.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/auto_abort
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/auto_abort
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
|
|
@ -0,0 +1,18 @@
|
|||
What: /sys/block/rssd*/registers
|
||||
Date: March 2012
|
||||
KernelVersion: 3.3
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Dumps below driver information and
|
||||
hardware registers.
|
||||
- S ACTive
|
||||
- Command Issue
|
||||
- Allocated
|
||||
- Completed
|
||||
- PORT IRQ STAT
|
||||
- HOST IRQ STAT
|
||||
|
||||
What: /sys/block/rssd*/status
|
||||
Date: April 2012
|
||||
KernelVersion: 3.4
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Indicates the status of the device.
|
|
@ -0,0 +1,8 @@
|
|||
What: /sys/block/<device>/iosched/target_latency
|
||||
Date: March 2012
|
||||
contact: Tao Ma <boyu.mt@taobao.com>
|
||||
Description:
|
||||
The /sys/block/<device>/iosched/target_latency only exists
|
||||
when the user sets cfq to /sys/block/<device>/scheduler.
|
||||
It contains an estimated latency time for the cfq. cfq will
|
||||
use it to calculate the time slice used for every task.
|
|
@ -34,8 +34,7 @@ Current Status: linux-2.6.34-mmotm(development version of 2010/April)
|
|||
|
||||
Features:
|
||||
- accounting anonymous pages, file caches, swap caches usage and limiting them.
|
||||
- private LRU and reclaim routine. (system's global LRU and private LRU
|
||||
work independently from each other)
|
||||
- pages are linked to per-memcg LRU exclusively, and there is no global LRU.
|
||||
- optionally, memory+swap usage can be accounted and limited.
|
||||
- hierarchical accounting
|
||||
- soft limit
|
||||
|
@ -154,7 +153,7 @@ updated. page_cgroup has its own LRU on cgroup.
|
|||
2.2.1 Accounting details
|
||||
|
||||
All mapped anon pages (RSS) and cache pages (Page Cache) are accounted.
|
||||
Some pages which are never reclaimable and will not be on the global LRU
|
||||
Some pages which are never reclaimable and will not be on the LRU
|
||||
are not accounted. We just account pages under usual VM management.
|
||||
|
||||
RSS pages are accounted at page_fault unless they've already been accounted
|
||||
|
|
|
@ -531,3 +531,11 @@ Why: There appear to be no production users of the get_robust_list syscall,
|
|||
of ASLR. It was only ever intended for debugging, so it should be
|
||||
removed.
|
||||
Who: Kees Cook <keescook@chromium.org>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: setitimer accepts user NULL pointer (value)
|
||||
When: 3.6
|
||||
Why: setitimer is not returning -EFAULT if user pointer is NULL. This
|
||||
violates the spec.
|
||||
Who: Sasikantha Babu <sasikanth.v19@gmail.com>
|
||||
|
|
|
@ -114,7 +114,7 @@ members are defined:
|
|||
struct file_system_type {
|
||||
const char *name;
|
||||
int fs_flags;
|
||||
struct dentry (*mount) (struct file_system_type *, int,
|
||||
struct dentry *(*mount) (struct file_system_type *, int,
|
||||
const char *, void *);
|
||||
void (*kill_sb) (struct super_block *);
|
||||
struct module *owner;
|
||||
|
|
|
@ -43,7 +43,9 @@ ALC680
|
|||
|
||||
ALC882/883/885/888/889
|
||||
======================
|
||||
N/A
|
||||
acer-aspire-4930g Acer Aspire 4930G/5930G/6530G/6930G/7730G
|
||||
acer-aspire-8930g Acer Aspire 8330G/6935G
|
||||
acer-aspire Acer Aspire others
|
||||
|
||||
ALC861/660
|
||||
==========
|
||||
|
|
|
@ -168,6 +168,28 @@ that if the completion handler or anyone else tries to resubmit it
|
|||
they will get a -EPERM error. Thus you can be sure that when
|
||||
usb_kill_urb() returns, the URB is totally idle.
|
||||
|
||||
There is a lifetime issue to consider. An URB may complete at any
|
||||
time, and the completion handler may free the URB. If this happens
|
||||
while usb_unlink_urb or usb_kill_urb is running, it will cause a
|
||||
memory-access violation. The driver is responsible for avoiding this,
|
||||
which often means some sort of lock will be needed to prevent the URB
|
||||
from being deallocated while it is still in use.
|
||||
|
||||
On the other hand, since usb_unlink_urb may end up calling the
|
||||
completion handler, the handler must not take any lock that is held
|
||||
when usb_unlink_urb is invoked. The general solution to this problem
|
||||
is to increment the URB's reference count while holding the lock, then
|
||||
drop the lock and call usb_unlink_urb or usb_kill_urb, and then
|
||||
decrement the URB's reference count. You increment the reference
|
||||
count by calling
|
||||
|
||||
struct urb *usb_get_urb(struct urb *urb)
|
||||
|
||||
(ignore the return value; it is the same as the argument) and
|
||||
decrement the reference count by calling usb_free_urb. Of course,
|
||||
none of this is necessary if there's no danger of the URB being freed
|
||||
by the completion handler.
|
||||
|
||||
|
||||
1.7. What about the completion handler?
|
||||
|
||||
|
|
|
@ -183,10 +183,10 @@ An input control transfer to get a port status.
|
|||
d5ea89a0 3575914555 S Ci:1:001:0 s a3 00 0000 0003 0004 4 <
|
||||
d5ea89a0 3575914560 C Ci:1:001:0 0 4 = 01050000
|
||||
|
||||
An output bulk transfer to send a SCSI command 0x5E in a 31-byte Bulk wrapper
|
||||
to a storage device at address 5:
|
||||
An output bulk transfer to send a SCSI command 0x28 (READ_10) in a 31-byte
|
||||
Bulk wrapper to a storage device at address 5:
|
||||
|
||||
dd65f0e8 4128379752 S Bo:1:005:2 -115 31 = 55534243 5e000000 00000000 00000600 00000000 00000000 00000000 000000
|
||||
dd65f0e8 4128379752 S Bo:1:005:2 -115 31 = 55534243 ad000000 00800000 80010a28 20000000 20000040 00000000 000000
|
||||
dd65f0e8 4128379808 C Bo:1:005:2 0 31 >
|
||||
|
||||
* Raw binary format and API
|
||||
|
|
21
MAINTAINERS
21
MAINTAINERS
|
@ -1504,8 +1504,8 @@ M: Gustavo Padovan <gustavo@padovan.org>
|
|||
M: Johan Hedberg <johan.hedberg@gmail.com>
|
||||
L: linux-bluetooth@vger.kernel.org
|
||||
W: http://www.bluez.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/padovan/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jh/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
|
||||
S: Maintained
|
||||
F: drivers/bluetooth/
|
||||
|
||||
|
@ -1515,8 +1515,8 @@ M: Gustavo Padovan <gustavo@padovan.org>
|
|||
M: Johan Hedberg <johan.hedberg@gmail.com>
|
||||
L: linux-bluetooth@vger.kernel.org
|
||||
W: http://www.bluez.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/padovan/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jh/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
|
||||
S: Maintained
|
||||
F: net/bluetooth/
|
||||
F: include/net/bluetooth/
|
||||
|
@ -4516,8 +4516,7 @@ S: Supported
|
|||
F: drivers/net/ethernet/myricom/myri10ge/
|
||||
|
||||
NATSEMI ETHERNET DRIVER (DP8381x)
|
||||
M: Tim Hockin <thockin@hockin.org>
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/ethernet/natsemi/natsemi.c
|
||||
|
||||
NATIVE INSTRUMENTS USB SOUND INTERFACE DRIVER
|
||||
|
@ -4786,6 +4785,7 @@ F: arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
|
|||
F: arch/arm/mach-omap2/clockdomain44xx.c
|
||||
|
||||
OMAP AUDIO SUPPORT
|
||||
M: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
M: Jarkko Nikula <jarkko.nikula@bitmer.com>
|
||||
L: alsa-devel@alsa-project.org (subscribers-only)
|
||||
L: linux-omap@vger.kernel.org
|
||||
|
@ -5100,6 +5100,11 @@ F: drivers/i2c/busses/i2c-pca-*
|
|||
F: include/linux/i2c-algo-pca.h
|
||||
F: include/linux/i2c-pca-platform.h
|
||||
|
||||
PCDP - PRIMARY CONSOLE AND DEBUG PORT
|
||||
M: Khalid Aziz <khalid.aziz@hp.com>
|
||||
S: Maintained
|
||||
F: drivers/firmware/pcdp.*
|
||||
|
||||
PCI ERROR RECOVERY
|
||||
M: Linas Vepstas <linasvepstas@gmail.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
|
@ -6449,6 +6454,7 @@ S: Odd Fixes
|
|||
F: drivers/staging/olpc_dcon/
|
||||
|
||||
STAGING - OZMO DEVICES USB OVER WIFI DRIVER
|
||||
M: Rupesh Gujare <rgujare@ozmodevices.com>
|
||||
M: Chris Kelly <ckelly@ozmodevices.com>
|
||||
S: Maintained
|
||||
F: drivers/staging/ozwpan/
|
||||
|
@ -7444,8 +7450,7 @@ F: include/linux/wm97xx.h
|
|||
|
||||
WOLFSON MICROELECTRONICS DRIVERS
|
||||
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
||||
M: Ian Lartey <ian@opensource.wolfsonmicro.com>
|
||||
M: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
|
||||
L: patches@opensource.wolfsonmicro.com
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-asoc
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus
|
||||
W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
|
||||
#include <linux/types.h>
|
||||
#include <asm/barrier.h>
|
||||
#include <asm/cmpxchg.h>
|
||||
|
||||
/*
|
||||
* Atomic operations that C can't guarantee us. Useful for
|
||||
|
@ -168,73 +169,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
|||
return result;
|
||||
}
|
||||
|
||||
/*
|
||||
* Atomic exchange routines.
|
||||
*/
|
||||
|
||||
#define __ASM__MB
|
||||
#define ____xchg(type, args...) __xchg ## type ## _local(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg_local(ptr,x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg_local((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#undef __ASM__MB
|
||||
#define __ASM__MB "\tmb\n"
|
||||
#endif
|
||||
#undef ____xchg
|
||||
#undef ____cmpxchg
|
||||
#define ____xchg(type, args...) __xchg ##type(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg(ptr,x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, sizeof(*(ptr)));\
|
||||
})
|
||||
|
||||
#define cmpxchg64(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#undef __ASM__MB
|
||||
#undef ____cmpxchg
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
|
||||
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
|
||||
|
||||
|
|
|
@ -0,0 +1,71 @@
|
|||
#ifndef _ALPHA_CMPXCHG_H
|
||||
#define _ALPHA_CMPXCHG_H
|
||||
|
||||
/*
|
||||
* Atomic exchange routines.
|
||||
*/
|
||||
|
||||
#define __ASM__MB
|
||||
#define ____xchg(type, args...) __xchg ## type ## _local(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg_local(ptr, x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg_local((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#undef __ASM__MB
|
||||
#define __ASM__MB "\tmb\n"
|
||||
#endif
|
||||
#undef ____xchg
|
||||
#undef ____cmpxchg
|
||||
#define ____xchg(type, args...) __xchg ##type(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg(ptr, x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, sizeof(*(ptr)));\
|
||||
})
|
||||
|
||||
#define cmpxchg64(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#undef __ASM__MB
|
||||
#undef ____cmpxchg
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
#endif /* _ALPHA_CMPXCHG_H */
|
|
@ -1,10 +1,10 @@
|
|||
#ifndef _ALPHA_ATOMIC_H
|
||||
#ifndef _ALPHA_CMPXCHG_H
|
||||
#error Do not include xchg.h directly!
|
||||
#else
|
||||
/*
|
||||
* xchg/xchg_local and cmpxchg/cmpxchg_local share the same code
|
||||
* except that local version do not have the expensive memory barrier.
|
||||
* So this file is included twice from asm/system.h.
|
||||
* So this file is included twice from asm/cmpxchg.h.
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
|
@ -340,8 +340,8 @@ config ARCH_AT91
|
|||
select IRQ_DOMAIN
|
||||
select NEED_MACH_IO_H if PCCARD
|
||||
help
|
||||
This enables support for systems based on the Atmel AT91RM9200,
|
||||
AT91SAM9 processors.
|
||||
This enables support for systems based on Atmel
|
||||
AT91RM9200 and AT91SAM9* processors.
|
||||
|
||||
config ARCH_BCMRING
|
||||
bool "Broadcom BCMRING"
|
||||
|
|
|
@ -77,6 +77,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space)
|
|||
} else if (atag->hdr.tag == ATAG_MEM) {
|
||||
if (memcount >= sizeof(mem_reg_property)/4)
|
||||
continue;
|
||||
if (!atag->u.mem.size)
|
||||
continue;
|
||||
mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start);
|
||||
mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size);
|
||||
} else if (atag->hdr.tag == ATAG_INITRD2) {
|
||||
|
|
|
@ -273,7 +273,7 @@ restart: adr r0, LC0
|
|||
add r0, r0, #0x100
|
||||
mov r1, r6
|
||||
sub r2, sp, r6
|
||||
blne atags_to_fdt
|
||||
bleq atags_to_fdt
|
||||
|
||||
ldmfd sp!, {r0-r3, ip, lr}
|
||||
sub sp, sp, #0x10000
|
||||
|
|
|
@ -55,7 +55,6 @@ aic: interrupt-controller@fffff000 {
|
|||
#interrupt-cells = <2>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -56,7 +56,6 @@ aic: interrupt-controller@fffff000 {
|
|||
#interrupt-cells = <2>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -54,7 +54,6 @@ aic: interrupt-controller@fffff000 {
|
|||
#interrupt-cells = <2>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -24,7 +24,6 @@ intc: interrupt-controller@a0411000 {
|
|||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xa0411000 0x1000>,
|
||||
<0xa0410100 0x100>;
|
||||
};
|
||||
|
|
|
@ -89,7 +89,6 @@ intc: interrupt-controller@fff11000 {
|
|||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfff11000 0x1000>,
|
||||
<0xfff10100 0x100>;
|
||||
};
|
||||
|
|
|
@ -427,19 +427,18 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
|
|||
|
||||
/*
|
||||
* Handle each interrupt in a single VIC. Returns non-zero if we've
|
||||
* handled at least one interrupt. This does a single read of the
|
||||
* status register and handles all interrupts in order from LSB first.
|
||||
* handled at least one interrupt. This reads the status register
|
||||
* before handling each interrupt, which is necessary given that
|
||||
* handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
|
||||
*/
|
||||
static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
|
||||
{
|
||||
u32 stat, irq;
|
||||
int handled = 0;
|
||||
|
||||
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
|
||||
while (stat) {
|
||||
while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
|
||||
irq = ffs(stat) - 1;
|
||||
handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
|
||||
stat &= ~(1 << irq);
|
||||
handled = 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -0,0 +1,196 @@
|
|||
CONFIG_EXPERIMENTAL=y
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_LBDAF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_SOC_AT91SAM9260=y
|
||||
CONFIG_SOC_AT91SAM9263=y
|
||||
CONFIG_SOC_AT91SAM9G45=y
|
||||
CONFIG_SOC_AT91SAM9X5=y
|
||||
CONFIG_MACH_AT91SAM_DT=y
|
||||
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
|
||||
CONFIG_AT91_TIMER_HZ=128
|
||||
CONFIG_AEABI=y
|
||||
# CONFIG_OABI_COMPAT is not set
|
||||
CONFIG_LEDS=y
|
||||
CONFIG_LEDS_CPU=y
|
||||
CONFIG_UACCESS_WITH_MEMCPY=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
CONFIG_IPV6=y
|
||||
# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET6_XFRM_MODE_BEET is not set
|
||||
CONFIG_IPV6_SIT_6RD=y
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_GLUEBI=y
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=4
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
CONFIG_ATMEL_PWM=y
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_EEPROM_93CX6=m
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_MULTI_LUN=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_MACB=y
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CHELSIO is not set
|
||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
CONFIG_DAVICOM_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
CONFIG_INPUT_POLLDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
|
||||
CONFIG_INPUT_JOYDEV=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
# CONFIG_SERIO is not set
|
||||
CONFIG_LEGACY_PTY_COUNT=4
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT91SAM9X_WATCHDOG=y
|
||||
CONFIG_SSB=m
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_ATMEL_LCDC=y
|
||||
# CONFIG_BACKLIGHT_GENERIC is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_ACORN_8x8=y
|
||||
CONFIG_FONT_MINI_4x6=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
# CONFIG_USB_DEVICE_CLASS is not set
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_ACM=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SERIAL=y
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=y
|
||||
CONFIG_USB_SERIAL_PL2303=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_AT91=m
|
||||
CONFIG_USB_ATMEL_USBA=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_CDC_COMPOSITE=m
|
||||
CONFIG_USB_G_ACM_MS=m
|
||||
CONFIG_USB_G_MULTI=m
|
||||
CONFIG_USB_G_MULTI_CDC=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_LEDS_TRIGGER_GPIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT91RM9200=y
|
||||
CONFIG_RTC_DRV_AT91SAM9=y
|
||||
CONFIG_DMADEVICES=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_AES=y
|
||||
CONFIG_CRYPTO_ARC4=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRYPTO_USER_API_HASH=m
|
||||
CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC_CCITT=m
|
||||
CONFIG_CRC_ITU_T=m
|
||||
CONFIG_CRC7=m
|
||||
CONFIG_AVERAGE=y
|
|
@ -14,6 +14,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
|
|||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_ARCH_AT91RM9200=y
|
||||
CONFIG_MACH_ONEARM=y
|
||||
CONFIG_ARCH_AT91RM9200DK=y
|
||||
CONFIG_MACH_AT91RM9200EK=y
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#define JUMP_LABEL_NOP "nop"
|
||||
#endif
|
||||
|
||||
static __always_inline bool arch_static_branch(struct jump_label_key *key)
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:\n\t"
|
||||
JUMP_LABEL_NOP "\n\t"
|
||||
|
|
|
@ -523,7 +523,21 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
|
|||
*/
|
||||
size -= start & ~PAGE_MASK;
|
||||
bank->start = PAGE_ALIGN(start);
|
||||
bank->size = size & PAGE_MASK;
|
||||
|
||||
#ifndef CONFIG_LPAE
|
||||
if (bank->start + size < bank->start) {
|
||||
printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
|
||||
"32-bit physical address space\n", (long long)start);
|
||||
/*
|
||||
* To ensure bank->start + bank->size is representable in
|
||||
* 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
|
||||
* This means we lose a page after masking.
|
||||
*/
|
||||
size = ULONG_MAX - bank->start;
|
||||
}
|
||||
#endif
|
||||
|
||||
bank->size = size & PAGE_MASK;
|
||||
|
||||
/*
|
||||
* Check whether this memory region has non-zero size or
|
||||
|
|
|
@ -118,10 +118,14 @@ static int twd_cpufreq_transition(struct notifier_block *nb,
|
|||
* The twd clock events must be reprogrammed to account for the new
|
||||
* frequency. The timer is local to a cpu, so cross-call to the
|
||||
* changing cpu.
|
||||
*
|
||||
* Only wait for it to finish, if the cpu is active to avoid
|
||||
* deadlock when cpu1 is spinning on while(!cpu_active(cpu1)) during
|
||||
* booting of that cpu.
|
||||
*/
|
||||
if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
|
||||
smp_call_function_single(freqs->cpu, twd_update_frequency,
|
||||
NULL, 1);
|
||||
NULL, cpu_active(freqs->cpu));
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
|
|
@ -9,15 +9,6 @@ config HAVE_AT91_DBGU0
|
|||
config HAVE_AT91_DBGU1
|
||||
bool
|
||||
|
||||
config HAVE_AT91_USART3
|
||||
bool
|
||||
|
||||
config HAVE_AT91_USART4
|
||||
bool
|
||||
|
||||
config HAVE_AT91_USART5
|
||||
bool
|
||||
|
||||
config AT91_SAM9_ALT_RESET
|
||||
bool
|
||||
default !ARCH_AT91X40
|
||||
|
@ -26,87 +17,121 @@ config AT91_SAM9G45_RESET
|
|||
bool
|
||||
default !ARCH_AT91X40
|
||||
|
||||
config SOC_AT91SAM9
|
||||
bool
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select CPU_ARM926T
|
||||
|
||||
menu "Atmel AT91 System-on-Chip"
|
||||
|
||||
choice
|
||||
prompt "Atmel AT91 Processor"
|
||||
comment "Atmel AT91 Processor"
|
||||
|
||||
config ARCH_AT91RM9200
|
||||
config SOC_AT91SAM9
|
||||
bool
|
||||
select CPU_ARM926T
|
||||
select AT91_SAM9_TIME
|
||||
select AT91_SAM9_SMC
|
||||
|
||||
config SOC_AT91RM9200
|
||||
bool "AT91RM9200"
|
||||
select CPU_ARM920T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_AT91_USART3
|
||||
|
||||
config SOC_AT91SAM9260
|
||||
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_NET_MACB
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
|
||||
or AT91SAM9G20 SoC.
|
||||
|
||||
config SOC_AT91SAM9261
|
||||
bool "AT91SAM9261 or AT91SAM9G10"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
|
||||
|
||||
config SOC_AT91SAM9263
|
||||
bool "AT91SAM9263"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU1
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
|
||||
config SOC_AT91SAM9RL
|
||||
bool "AT91SAM9RL"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
|
||||
config SOC_AT91SAM9G45
|
||||
bool "AT91SAM9G45 or AT91SAM9M10 families"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU1
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
|
||||
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
|
||||
|
||||
config SOC_AT91SAM9X5
|
||||
bool "AT91SAM9x5 family"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
|
||||
This means that your SAM9 name finishes with a '5' (except if it is
|
||||
AT91SAM9G45!).
|
||||
This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
|
||||
and AT91SAM9X35.
|
||||
|
||||
choice
|
||||
prompt "Atmel AT91 Processor Devices for non DT boards"
|
||||
|
||||
config ARCH_AT91_NONE
|
||||
bool "None"
|
||||
|
||||
config ARCH_AT91RM9200
|
||||
bool "AT91RM9200"
|
||||
select SOC_AT91RM9200
|
||||
|
||||
config ARCH_AT91SAM9260
|
||||
bool "AT91SAM9260 or AT91SAM9XE"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_AT91_USART3
|
||||
select HAVE_AT91_USART4
|
||||
select HAVE_AT91_USART5
|
||||
select HAVE_NET_MACB
|
||||
select SOC_AT91SAM9260
|
||||
|
||||
config ARCH_AT91SAM9261
|
||||
bool "AT91SAM9261"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_AT91_DBGU0
|
||||
select SOC_AT91SAM9261
|
||||
|
||||
config ARCH_AT91SAM9G10
|
||||
bool "AT91SAM9G10"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9261
|
||||
|
||||
config ARCH_AT91SAM9263
|
||||
bool "AT91SAM9263"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select HAVE_AT91_DBGU1
|
||||
select SOC_AT91SAM9263
|
||||
|
||||
config ARCH_AT91SAM9RL
|
||||
bool "AT91SAM9RL"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_USART3
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_AT91_DBGU0
|
||||
select SOC_AT91SAM9RL
|
||||
|
||||
config ARCH_AT91SAM9G20
|
||||
bool "AT91SAM9G20"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_AT91_USART3
|
||||
select HAVE_AT91_USART4
|
||||
select HAVE_AT91_USART5
|
||||
select HAVE_NET_MACB
|
||||
select SOC_AT91SAM9260
|
||||
|
||||
config ARCH_AT91SAM9G45
|
||||
bool "AT91SAM9G45"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_USART3
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select HAVE_AT91_DBGU1
|
||||
|
||||
config ARCH_AT91SAM9X5
|
||||
bool "AT91SAM9x5 family"
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select HAVE_AT91_DBGU0
|
||||
select SOC_AT91SAM9G45
|
||||
|
||||
config ARCH_AT91X40
|
||||
bool "AT91x40"
|
||||
depends on !MMU
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
|
||||
endchoice
|
||||
|
@ -364,6 +389,7 @@ config MACH_AT91SAM9G20EK_2MMC
|
|||
Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
|
||||
with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
|
||||
onwards.
|
||||
<http://www.atmel.com/tools/SAM9G20-EK.aspx>
|
||||
|
||||
config MACH_CPU9G20
|
||||
bool "Eukrea CPU9G20 board"
|
||||
|
@ -433,9 +459,10 @@ comment "AT91SAM9G45 Board Type"
|
|||
config MACH_AT91SAM9M10G45EK
|
||||
bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit.
|
||||
"ES" at the end of the name means that this board is an
|
||||
Engineering Sample.
|
||||
Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
|
||||
Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
|
||||
families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
|
||||
<http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
|
||||
|
||||
endif
|
||||
|
||||
|
@ -515,41 +542,6 @@ config AT91_TIMER_HZ
|
|||
system clock (of at least several MHz), rounding is less of a
|
||||
problem so it can be safer to use a decimal values like 100.
|
||||
|
||||
choice
|
||||
prompt "Select a UART for early kernel messages"
|
||||
|
||||
config AT91_EARLY_DBGU0
|
||||
bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
|
||||
depends on HAVE_AT91_DBGU0
|
||||
|
||||
config AT91_EARLY_DBGU1
|
||||
bool "DBGU on 9263 and 9g45"
|
||||
depends on HAVE_AT91_DBGU1
|
||||
|
||||
config AT91_EARLY_USART0
|
||||
bool "USART0"
|
||||
|
||||
config AT91_EARLY_USART1
|
||||
bool "USART1"
|
||||
|
||||
config AT91_EARLY_USART2
|
||||
bool "USART2"
|
||||
depends on ! ARCH_AT91X40
|
||||
|
||||
config AT91_EARLY_USART3
|
||||
bool "USART3"
|
||||
depends on HAVE_AT91_USART3
|
||||
|
||||
config AT91_EARLY_USART4
|
||||
bool "USART4"
|
||||
depends on HAVE_AT91_USART4
|
||||
|
||||
config AT91_EARLY_USART5
|
||||
bool "USART5"
|
||||
depends on HAVE_AT91_USART5
|
||||
|
||||
endchoice
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
@ -10,17 +10,25 @@ obj- :=
|
|||
obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
|
||||
obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o
|
||||
|
||||
# CPU-specific support
|
||||
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o at91sam926x_time.o sam9_smc.o
|
||||
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
|
||||
|
||||
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
|
||||
|
||||
# AT91RM9200 board-specific support
|
||||
|
|
|
@ -258,18 +258,6 @@ static void __init at91rm9200_register_clocks(void)
|
|||
clk_register(&pck3);
|
||||
}
|
||||
|
||||
static struct clk_lookup console_clock_lookup;
|
||||
|
||||
void __init at91rm9200_set_console_clock(int id)
|
||||
{
|
||||
if (id >= ARRAY_SIZE(usart_clocks_lookups))
|
||||
return;
|
||||
|
||||
console_clock_lookup.con_id = "usart";
|
||||
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
|
||||
clkdev_add(&console_clock_lookup);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
|
|
@ -1152,14 +1152,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
|
|||
at91_uarts[portnr] = pdev;
|
||||
}
|
||||
|
||||
void __init at91_set_serial_console(unsigned portnr)
|
||||
{
|
||||
if (portnr < ATMEL_MAX_UART) {
|
||||
atmel_default_console_device = at91_uarts[portnr];
|
||||
at91rm9200_set_console_clock(at91_uarts[portnr]->id);
|
||||
}
|
||||
}
|
||||
|
||||
void __init at91_add_device_serial(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -1168,14 +1160,10 @@ void __init at91_add_device_serial(void)
|
|||
if (at91_uarts[i])
|
||||
platform_device_register(at91_uarts[i]);
|
||||
}
|
||||
|
||||
if (!atmel_default_console_device)
|
||||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -268,18 +268,6 @@ static void __init at91sam9260_register_clocks(void)
|
|||
clk_register(&pck1);
|
||||
}
|
||||
|
||||
static struct clk_lookup console_clock_lookup;
|
||||
|
||||
void __init at91sam9260_set_console_clock(int id)
|
||||
{
|
||||
if (id >= ARRAY_SIZE(usart_clocks_lookups))
|
||||
return;
|
||||
|
||||
console_clock_lookup.con_id = "usart";
|
||||
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
|
||||
clkdev_add(&console_clock_lookup);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
|
|
@ -1229,14 +1229,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
|
|||
at91_uarts[portnr] = pdev;
|
||||
}
|
||||
|
||||
void __init at91_set_serial_console(unsigned portnr)
|
||||
{
|
||||
if (portnr < ATMEL_MAX_UART) {
|
||||
atmel_default_console_device = at91_uarts[portnr];
|
||||
at91sam9260_set_console_clock(at91_uarts[portnr]->id);
|
||||
}
|
||||
}
|
||||
|
||||
void __init at91_add_device_serial(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -1245,13 +1237,9 @@ void __init at91_add_device_serial(void)
|
|||
if (at91_uarts[i])
|
||||
platform_device_register(at91_uarts[i]);
|
||||
}
|
||||
|
||||
if (!atmel_default_console_device)
|
||||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -239,18 +239,6 @@ static void __init at91sam9261_register_clocks(void)
|
|||
clk_register(&hck1);
|
||||
}
|
||||
|
||||
static struct clk_lookup console_clock_lookup;
|
||||
|
||||
void __init at91sam9261_set_console_clock(int id)
|
||||
{
|
||||
if (id >= ARRAY_SIZE(usart_clocks_lookups))
|
||||
return;
|
||||
|
||||
console_clock_lookup.con_id = "usart";
|
||||
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
|
||||
clkdev_add(&console_clock_lookup);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
|
|
@ -1051,14 +1051,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
|
|||
at91_uarts[portnr] = pdev;
|
||||
}
|
||||
|
||||
void __init at91_set_serial_console(unsigned portnr)
|
||||
{
|
||||
if (portnr < ATMEL_MAX_UART) {
|
||||
atmel_default_console_device = at91_uarts[portnr];
|
||||
at91sam9261_set_console_clock(at91_uarts[portnr]->id);
|
||||
}
|
||||
}
|
||||
|
||||
void __init at91_add_device_serial(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -1067,13 +1059,9 @@ void __init at91_add_device_serial(void)
|
|||
if (at91_uarts[i])
|
||||
platform_device_register(at91_uarts[i]);
|
||||
}
|
||||
|
||||
if (!atmel_default_console_device)
|
||||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -255,18 +255,6 @@ static void __init at91sam9263_register_clocks(void)
|
|||
clk_register(&pck3);
|
||||
}
|
||||
|
||||
static struct clk_lookup console_clock_lookup;
|
||||
|
||||
void __init at91sam9263_set_console_clock(int id)
|
||||
{
|
||||
if (id >= ARRAY_SIZE(usart_clocks_lookups))
|
||||
return;
|
||||
|
||||
console_clock_lookup.con_id = "usart";
|
||||
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
|
||||
clkdev_add(&console_clock_lookup);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
|
|
@ -1461,14 +1461,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
|
|||
at91_uarts[portnr] = pdev;
|
||||
}
|
||||
|
||||
void __init at91_set_serial_console(unsigned portnr)
|
||||
{
|
||||
if (portnr < ATMEL_MAX_UART) {
|
||||
atmel_default_console_device = at91_uarts[portnr];
|
||||
at91sam9263_set_console_clock(at91_uarts[portnr]->id);
|
||||
}
|
||||
}
|
||||
|
||||
void __init at91_add_device_serial(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -1477,13 +1469,9 @@ void __init at91_add_device_serial(void)
|
|||
if (at91_uarts[i])
|
||||
platform_device_register(at91_uarts[i]);
|
||||
}
|
||||
|
||||
if (!atmel_default_console_device)
|
||||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -288,18 +288,6 @@ static void __init at91sam9g45_register_clocks(void)
|
|||
clk_register(&pck1);
|
||||
}
|
||||
|
||||
static struct clk_lookup console_clock_lookup;
|
||||
|
||||
void __init at91sam9g45_set_console_clock(int id)
|
||||
{
|
||||
if (id >= ARRAY_SIZE(usart_clocks_lookups))
|
||||
return;
|
||||
|
||||
console_clock_lookup.con_id = "usart";
|
||||
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
|
||||
clkdev_add(&console_clock_lookup);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
|
|
@ -1741,14 +1741,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
|
|||
at91_uarts[portnr] = pdev;
|
||||
}
|
||||
|
||||
void __init at91_set_serial_console(unsigned portnr)
|
||||
{
|
||||
if (portnr < ATMEL_MAX_UART) {
|
||||
atmel_default_console_device = at91_uarts[portnr];
|
||||
at91sam9g45_set_console_clock(at91_uarts[portnr]->id);
|
||||
}
|
||||
}
|
||||
|
||||
void __init at91_add_device_serial(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -1757,13 +1749,9 @@ void __init at91_add_device_serial(void)
|
|||
if (at91_uarts[i])
|
||||
platform_device_register(at91_uarts[i]);
|
||||
}
|
||||
|
||||
if (!atmel_default_console_device)
|
||||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -232,18 +232,6 @@ static void __init at91sam9rl_register_clocks(void)
|
|||
clk_register(&pck1);
|
||||
}
|
||||
|
||||
static struct clk_lookup console_clock_lookup;
|
||||
|
||||
void __init at91sam9rl_set_console_clock(int id)
|
||||
{
|
||||
if (id >= ARRAY_SIZE(usart_clocks_lookups))
|
||||
return;
|
||||
|
||||
console_clock_lookup.con_id = "usart";
|
||||
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
|
||||
clkdev_add(&console_clock_lookup);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
|
|
@ -1192,14 +1192,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
|
|||
at91_uarts[portnr] = pdev;
|
||||
}
|
||||
|
||||
void __init at91_set_serial_console(unsigned portnr)
|
||||
{
|
||||
if (portnr < ATMEL_MAX_UART) {
|
||||
atmel_default_console_device = at91_uarts[portnr];
|
||||
at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
|
||||
}
|
||||
}
|
||||
|
||||
void __init at91_add_device_serial(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -1208,13 +1200,9 @@ void __init at91_add_device_serial(void)
|
|||
if (at91_uarts[i])
|
||||
platform_device_register(at91_uarts[i]);
|
||||
}
|
||||
|
||||
if (!atmel_default_console_device)
|
||||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -47,20 +47,6 @@ static void __init onearm_init_early(void)
|
|||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata onearm_eth_data = {
|
||||
|
@ -82,6 +68,16 @@ static struct at91_udc_data __initdata onearm_udc_data = {
|
|||
static void __init onearm_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&onearm_eth_data);
|
||||
|
|
|
@ -52,22 +52,6 @@ static void __init afeb9260_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -183,6 +167,18 @@ static struct at91_cf_data afeb9260_cf_data = {
|
|||
static void __init afeb9260_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&afeb9260_usbh_data);
|
||||
|
|
|
@ -49,12 +49,6 @@ static void __init cam60_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 10 MHz crystal */
|
||||
at91_initialize(10000000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -175,6 +169,8 @@ static void __init cam60_add_device_nand(void)
|
|||
static void __init cam60_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* SPI */
|
||||
at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
|
||||
|
|
|
@ -44,17 +44,6 @@ static void __init carmeva_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 20.000 MHz crystal */
|
||||
at91_initialize(20000000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata carmeva_eth_data = {
|
||||
|
@ -139,6 +128,13 @@ static struct gpio_led carmeva_leds[] = {
|
|||
static void __init carmeva_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&carmeva_eth_data);
|
||||
|
|
|
@ -52,34 +52,6 @@ static void __init cpu9krea_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
|
||||
|
||||
/* USART4 on ttyS5. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -352,6 +324,30 @@ static void __init cpu9krea_board_init(void)
|
|||
/* NOR */
|
||||
cpu9krea_add_device_nor();
|
||||
/* Serial */
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
|
||||
|
||||
/* USART4 on ttyS5. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&cpu9krea_usbh_data);
|
||||
|
|
|
@ -59,28 +59,6 @@ static void __init cpuat91_init_early(void)
|
|||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART2 on ttyS3 (Rx, Tx) */
|
||||
at91_register_uart(AT91RM9200_ID_US2, 3, 0);
|
||||
|
||||
/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata cpuat91_eth_data = {
|
||||
|
@ -161,6 +139,24 @@ static struct platform_device *platform_devices[] __initdata = {
|
|||
static void __init cpuat91_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART2 on ttyS3 (Rx, Tx) */
|
||||
at91_register_uart(AT91RM9200_ID_US2, 3, 0);
|
||||
|
||||
/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* LEDs. */
|
||||
at91_gpio_leds(cpuat91_leds, ARRAY_SIZE(cpuat91_leds));
|
||||
|
|
|
@ -47,15 +47,6 @@ static void __init csb337_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 3.6864 MHz crystal */
|
||||
at91_initialize(3686400);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
|
||||
|
||||
/* DBGU on ttyS0 */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* make console=ttyS0 the default */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata csb337_eth_data = {
|
||||
|
@ -228,7 +219,11 @@ static struct gpio_led csb_leds[] = {
|
|||
|
||||
static void __init csb337_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0 */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&csb337_eth_data);
|
||||
|
|
|
@ -44,12 +44,6 @@ static void __init csb637_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 3.6864 MHz crystal */
|
||||
at91_initialize(3686400);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* make console=ttyS0 (ie, DBGU) the default */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata csb637_eth_data = {
|
||||
|
@ -118,6 +112,8 @@ static void __init csb637_board_init(void)
|
|||
/* LED(s) */
|
||||
at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&csb637_eth_data);
|
||||
|
|
|
@ -1,10 +1,6 @@
|
|||
/*
|
||||
* Setup code for AT91SAM Evaluation Kits with Device Tree support
|
||||
*
|
||||
* Covers: * AT91SAM9G45-EKES board
|
||||
* * AT91SAM9M10-EKES board
|
||||
* * AT91SAM9M10G45-EK board
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
|
@ -49,9 +45,7 @@ static void __init at91_dt_device_init(void)
|
|||
}
|
||||
|
||||
static const char *at91_dt_board_compat[] __initdata = {
|
||||
"atmel,at91sam9m10g45ek",
|
||||
"atmel,at91sam9x5ek",
|
||||
"calao,usb-a9g20",
|
||||
"atmel,at91sam9",
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
@ -44,20 +44,6 @@ static void __init eb9200_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART2 on ttyS2. (Rx, Tx) - IRDA */
|
||||
at91_register_uart(AT91RM9200_ID_US2, 2, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata eb9200_eth_data = {
|
||||
|
@ -101,6 +87,16 @@ static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
|
|||
static void __init eb9200_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART2 on ttyS2. (Rx, Tx) - IRDA */
|
||||
at91_register_uart(AT91RM9200_ID_US2, 2, 0);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&eb9200_eth_data);
|
||||
|
|
|
@ -50,18 +50,6 @@ static void __init ecb_at91init_early(void)
|
|||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx & Tx only) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata ecb_at91eth_data = {
|
||||
|
@ -151,7 +139,15 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = {
|
|||
|
||||
static void __init ecb_at91board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx & Tx only) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
|
||||
at91_add_device_serial();
|
||||
|
||||
/* Ethernet */
|
||||
|
|
|
@ -37,15 +37,6 @@ static void __init eco920_init_early(void)
|
|||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata eco920_eth_data = {
|
||||
|
@ -103,6 +94,10 @@ static struct spi_board_info eco920_spi_devices[] = {
|
|||
|
||||
static void __init eco920_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
|
||||
/* DBGU on ttyS0. (Rx & Tx only */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
at91_add_device_eth(&eco920_eth_data);
|
||||
at91_add_device_usbh(&eco920_usbh_data);
|
||||
|
|
|
@ -41,12 +41,6 @@ static void __init flexibity_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/* USB Host port */
|
||||
|
@ -143,6 +137,8 @@ static struct gpio_led flexibity_leds[] = {
|
|||
static void __init flexibity_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&flexibity_usbh_data);
|
||||
|
|
|
@ -61,44 +61,6 @@ static void __init foxg20_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR
|
||||
| ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx & Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4,
|
||||
ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART4 on ttyS5. (Rx & Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx & Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
|
||||
/* Set the internal pull-up resistor on DRXD */
|
||||
at91_set_A_periph(AT91_PIN_PB14, 1);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -241,6 +203,39 @@ static struct i2c_board_info __initdata foxg20_i2c_devices[] = {
|
|||
static void __init foxg20_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR
|
||||
| ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx & Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4,
|
||||
ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART4 on ttyS5. (Rx & Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx & Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
|
||||
/* Set the internal pull-up resistor on DRXD */
|
||||
at91_set_A_periph(AT91_PIN_PB14, 1);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&foxg20_usbh_data);
|
||||
|
|
|
@ -41,38 +41,6 @@
|
|||
static void __init gsia18s_init_early(void)
|
||||
{
|
||||
stamp9g20_init_early();
|
||||
|
||||
/*
|
||||
* USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
|
||||
* Used for Internal Analog Modem.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS |
|
||||
ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
/*
|
||||
* USART1 on ttyS2 (Rx, Tx, CTS, RTS).
|
||||
* Used for GPS or WiFi or Data stream.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
/*
|
||||
* USART2 on ttyS3 (Rx, Tx, CTS, RTS).
|
||||
* Used for External Modem.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
/*
|
||||
* USART3 on ttyS4 (Rx, Tx, RTS).
|
||||
* Used for RS-485.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
|
||||
|
||||
/*
|
||||
* USART4 on ttyS5 (Rx, Tx).
|
||||
* Used for TRX433 Radio Module.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -558,6 +526,37 @@ static int __init gsia18s_power_off_init(void)
|
|||
|
||||
static void __init gsia18s_board_init(void)
|
||||
{
|
||||
/*
|
||||
* USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
|
||||
* Used for Internal Analog Modem.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS |
|
||||
ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
/*
|
||||
* USART1 on ttyS2 (Rx, Tx, CTS, RTS).
|
||||
* Used for GPS or WiFi or Data stream.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
/*
|
||||
* USART2 on ttyS3 (Rx, Tx, CTS, RTS).
|
||||
* Used for External Modem.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
/*
|
||||
* USART3 on ttyS4 (Rx, Tx, RTS).
|
||||
* Used for RS-485.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
|
||||
|
||||
/*
|
||||
* USART4 on ttyS5 (Rx, Tx).
|
||||
* Used for TRX433 Radio Module.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
stamp9g20_board_init();
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
at91_add_device_udc(&udc_data);
|
||||
|
|
|
@ -47,18 +47,6 @@ static void __init kafa_init_early(void)
|
|||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Set up the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata kafa_eth_data = {
|
||||
|
@ -79,7 +67,15 @@ static struct at91_udc_data __initdata kafa_udc_data = {
|
|||
|
||||
static void __init kafa_board_init(void)
|
||||
{
|
||||
/* Set up the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&kafa_eth_data);
|
||||
|
|
|
@ -50,24 +50,6 @@ static void __init kb9202_init_early(void)
|
|||
|
||||
/* Initialize processor: 10 MHz crystal */
|
||||
at91_initialize(10000000);
|
||||
|
||||
/* Set up the LEDs */
|
||||
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx & Tx only) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
|
||||
|
||||
/* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, 0);
|
||||
|
||||
/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata kb9202_eth_data = {
|
||||
|
@ -115,7 +97,21 @@ static struct atmel_nand_data __initdata kb9202_nand_data = {
|
|||
|
||||
static void __init kb9202_board_init(void)
|
||||
{
|
||||
/* Set up the LEDs */
|
||||
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx & Tx only) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
|
||||
|
||||
/* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, 0);
|
||||
|
||||
/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&kb9202_eth_data);
|
||||
|
|
|
@ -55,15 +55,6 @@ static void __init neocore926_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 20 MHz crystal */
|
||||
at91_initialize(20000000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -341,6 +332,11 @@ static struct ac97c_platform_data neocore926_ac97_data = {
|
|||
static void __init neocore926_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
|
||||
/* USB Host */
|
||||
|
|
|
@ -40,17 +40,6 @@
|
|||
static void __init pcontrol_g20_init_early(void)
|
||||
{
|
||||
stamp9g20_init_early();
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
|
||||
}
|
||||
|
||||
static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
|
||||
|
@ -199,6 +188,16 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = {
|
|||
|
||||
static void __init pcontrol_g20_board_init(void)
|
||||
{
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
|
||||
stamp9g20_board_init();
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
at91_add_device_eth(&macb_data);
|
||||
|
|
|
@ -48,17 +48,6 @@ static void __init picotux200_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata picotux200_eth_data = {
|
||||
|
@ -106,6 +95,13 @@ static struct platform_device picotux200_flash = {
|
|||
static void __init picotux200_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&picotux200_eth_data);
|
||||
|
|
|
@ -52,24 +52,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 12.000 MHz crystal */
|
||||
at91_initialize(12000000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS1 (ie, USART0) */
|
||||
at91_set_serial_console(1);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -235,6 +217,19 @@ static struct gpio_led ek_leds[] = {
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -50,20 +50,6 @@ static void __init dk_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata dk_eth_data = {
|
||||
|
@ -190,7 +176,17 @@ static struct gpio_led dk_leds[] = {
|
|||
|
||||
static void __init dk_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&dk_eth_data);
|
||||
|
|
|
@ -50,20 +50,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata ek_eth_data = {
|
||||
|
@ -161,7 +147,17 @@ static struct gpio_led ek_leds[] = {
|
|||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&ek_eth_data);
|
||||
|
|
|
@ -35,26 +35,6 @@ static void __init rsi_ews_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
/* This one is for debugging */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
/* Dialin/-out modem interface */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx, RTS) */
|
||||
/* RS485 communication */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -204,7 +184,23 @@ static struct platform_device rsiews_nor_flash = {
|
|||
*/
|
||||
static void __init rsi_ews_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
/* This one is for debugging */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
/* Dialin/-out modem interface */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx, RTS) */
|
||||
/* RS485 communication */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
at91_set_gpio_output(AT91_PIN_PA21, 0);
|
||||
/* Ethernet */
|
||||
|
|
|
@ -48,23 +48,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -184,7 +167,20 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
|
|||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -54,20 +54,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -320,6 +306,16 @@ static void __init ek_add_device_buttons(void) {}
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -58,15 +58,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -576,7 +567,12 @@ static struct gpio_led ek_leds[] = {
|
|||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -57,15 +57,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 16.367 MHz crystal */
|
||||
at91_initialize(16367660);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -412,6 +403,11 @@ static struct at91_can_data ek_can_data = {
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -65,20 +65,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -372,6 +358,16 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -53,16 +53,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 12.000 MHz crystal */
|
||||
at91_initialize(12000000);
|
||||
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 not connected on the -EK board */
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -457,6 +447,12 @@ static struct platform_device *devices[] __initdata = {
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 not connected on the -EK board */
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB HS Host */
|
||||
at91_add_device_usbh_ohci(&ek_usbh_hs_data);
|
||||
|
|
|
@ -42,15 +42,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 12.000 MHz crystal */
|
||||
at91_initialize(12000000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -296,6 +287,11 @@ static void __init ek_add_device_buttons(void) {}
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB HS */
|
||||
at91_add_device_usba(&ek_usba_udc_data);
|
||||
|
|
|
@ -43,16 +43,6 @@
|
|||
static void __init snapper9260_init_early(void)
|
||||
{
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Debug on ttyS0 */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_set_serial_console(0);
|
||||
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
|
||||
}
|
||||
|
||||
static struct at91_usbh_data __initdata snapper9260_usbh_data = {
|
||||
|
@ -168,6 +158,14 @@ static void __init snapper9260_board_init(void)
|
|||
snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);
|
||||
i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1);
|
||||
|
||||
/* Debug on ttyS0 */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
|
||||
at91_add_device_serial();
|
||||
at91_add_device_usbh(&snapper9260_usbh_data);
|
||||
at91_add_device_udc(&snapper9260_udc_data);
|
||||
|
|
|
@ -36,44 +36,6 @@ void __init stamp9g20_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
static void __init stamp9g20evb_init_early(void)
|
||||
{
|
||||
stamp9g20_init_early();
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
}
|
||||
|
||||
static void __init portuxg20_init_early(void)
|
||||
{
|
||||
stamp9g20_init_early();
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART4 on ttyS5. (Rx, Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx, Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -254,6 +216,8 @@ void add_w1(void)
|
|||
void __init stamp9g20_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* NAND */
|
||||
add_device_nand();
|
||||
|
@ -269,6 +233,22 @@ void __init stamp9g20_board_init(void)
|
|||
|
||||
static void __init portuxg20_board_init(void)
|
||||
{
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART4 on ttyS5. (Rx, Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx, Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
stamp9g20_board_init();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
|
@ -286,6 +266,10 @@ static void __init portuxg20_board_init(void)
|
|||
|
||||
static void __init stamp9g20evb_board_init(void)
|
||||
{
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
stamp9g20_board_init();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
|
@ -303,7 +287,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")
|
|||
/* Maintainer: taskit GmbH */
|
||||
.timer = &at91sam926x_timer,
|
||||
.map_io = at91_map_io,
|
||||
.init_early = portuxg20_init_early,
|
||||
.init_early = stamp9g20_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = portuxg20_board_init,
|
||||
MACHINE_END
|
||||
|
@ -312,7 +296,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")
|
|||
/* Maintainer: taskit GmbH */
|
||||
.timer = &at91sam926x_timer,
|
||||
.map_io = at91_map_io,
|
||||
.init_early = stamp9g20evb_init_early,
|
||||
.init_early = stamp9g20_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = stamp9g20evb_board_init,
|
||||
MACHINE_END
|
||||
|
|
|
@ -53,12 +53,6 @@ static void __init ek_init_early(void)
|
|||
{
|
||||
/* Initialize processor: 12.00 MHz crystal */
|
||||
at91_initialize(12000000);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -325,6 +319,8 @@ static void __init ek_add_device_leds(void)
|
|||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
|
|
|
@ -58,26 +58,6 @@ static void __init yl9200_init_early(void)
|
|||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
|
||||
/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
|
||||
at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
|
||||
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART0 on ttyS2. (Rx & Tx only to JP3) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 2, 0);
|
||||
|
||||
/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
|
||||
|
||||
/* set serial console to ttyS0 (ie, DBGU) */
|
||||
at91_set_serial_console(0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -560,7 +540,23 @@ void __init yl9200_add_device_video(void) {}
|
|||
|
||||
static void __init yl9200_board_init(void)
|
||||
{
|
||||
/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
|
||||
at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART0 on ttyS2. (Rx & Tx only to JP3) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 2, 0);
|
||||
|
||||
/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&yl9200_eth_data);
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/export.h>
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/cpuidle.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "pm.h"
|
||||
|
||||
|
@ -33,7 +34,12 @@ static int at91_enter_idle(struct cpuidle_device *dev,
|
|||
struct cpuidle_driver *drv,
|
||||
int index)
|
||||
{
|
||||
at91_standby();
|
||||
if (cpu_is_at91rm9200())
|
||||
at91rm9200_standby();
|
||||
else if (cpu_is_at91sam9g45())
|
||||
at91sam9g45_standby();
|
||||
else
|
||||
at91sam9_standby();
|
||||
|
||||
return index;
|
||||
}
|
||||
|
|
|
@ -40,17 +40,6 @@ extern struct sys_timer at91sam926x_timer;
|
|||
extern struct sys_timer at91x40_timer;
|
||||
|
||||
/* Clocks */
|
||||
/*
|
||||
* function to specify the clock of the default console. As we do not
|
||||
* use the device/driver bus, the dev_name is not intialize. So we need
|
||||
* to link the clock to a specific con_id only "usart"
|
||||
*/
|
||||
extern void __init at91rm9200_set_console_clock(int id);
|
||||
extern void __init at91sam9260_set_console_clock(int id);
|
||||
extern void __init at91sam9261_set_console_clock(int id);
|
||||
extern void __init at91sam9263_set_console_clock(int id);
|
||||
extern void __init at91sam9rl_set_console_clock(int id);
|
||||
extern void __init at91sam9g45_set_console_clock(int id);
|
||||
#ifdef CONFIG_AT91_PMC_UNIT
|
||||
extern int __init at91_clock_init(unsigned long main_clock);
|
||||
extern int __init at91_dt_clock_init(void);
|
||||
|
|
|
@ -88,11 +88,6 @@
|
|||
#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
|
||||
#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */
|
||||
|
||||
#define AT91_USART0 AT91RM9200_BASE_US0
|
||||
#define AT91_USART1 AT91RM9200_BASE_US1
|
||||
#define AT91_USART2 AT91RM9200_BASE_US2
|
||||
#define AT91_USART3 AT91RM9200_BASE_US3
|
||||
|
||||
/*
|
||||
* Internal Memory.
|
||||
*/
|
||||
|
|
|
@ -95,13 +95,6 @@
|
|||
#define AT91SAM9260_BASE_WDT 0xfffffd40
|
||||
#define AT91SAM9260_BASE_GPBR 0xfffffd50
|
||||
|
||||
#define AT91_USART0 AT91SAM9260_BASE_US0
|
||||
#define AT91_USART1 AT91SAM9260_BASE_US1
|
||||
#define AT91_USART2 AT91SAM9260_BASE_US2
|
||||
#define AT91_USART3 AT91SAM9260_BASE_US3
|
||||
#define AT91_USART4 AT91SAM9260_BASE_US4
|
||||
#define AT91_USART5 AT91SAM9260_BASE_US5
|
||||
|
||||
|
||||
/*
|
||||
* Internal Memory.
|
||||
|
|
|
@ -79,10 +79,6 @@
|
|||
#define AT91SAM9261_BASE_WDT 0xfffffd40
|
||||
#define AT91SAM9261_BASE_GPBR 0xfffffd50
|
||||
|
||||
#define AT91_USART0 AT91SAM9261_BASE_US0
|
||||
#define AT91_USART1 AT91SAM9261_BASE_US1
|
||||
#define AT91_USART2 AT91SAM9261_BASE_US2
|
||||
|
||||
|
||||
/*
|
||||
* Internal Memory.
|
||||
|
|
|
@ -95,10 +95,6 @@
|
|||
#define AT91SAM9263_BASE_RTT1 0xfffffd50
|
||||
#define AT91SAM9263_BASE_GPBR 0xfffffd60
|
||||
|
||||
#define AT91_USART0 AT91SAM9263_BASE_US0
|
||||
#define AT91_USART1 AT91SAM9263_BASE_US1
|
||||
#define AT91_USART2 AT91SAM9263_BASE_US2
|
||||
|
||||
#define AT91_SMC AT91_SMC0
|
||||
|
||||
/*
|
||||
|
|
|
@ -106,11 +106,6 @@
|
|||
#define AT91SAM9G45_BASE_RTC 0xfffffdb0
|
||||
#define AT91SAM9G45_BASE_GPBR 0xfffffd60
|
||||
|
||||
#define AT91_USART0 AT91SAM9G45_BASE_US0
|
||||
#define AT91_USART1 AT91SAM9G45_BASE_US1
|
||||
#define AT91_USART2 AT91SAM9G45_BASE_US2
|
||||
#define AT91_USART3 AT91SAM9G45_BASE_US3
|
||||
|
||||
/*
|
||||
* Internal Memory.
|
||||
*/
|
||||
|
|
|
@ -89,11 +89,6 @@
|
|||
#define AT91SAM9RL_BASE_GPBR 0xfffffd60
|
||||
#define AT91SAM9RL_BASE_RTC 0xfffffe00
|
||||
|
||||
#define AT91_USART0 AT91SAM9RL_BASE_US0
|
||||
#define AT91_USART1 AT91SAM9RL_BASE_US1
|
||||
#define AT91_USART2 AT91SAM9RL_BASE_US2
|
||||
#define AT91_USART3 AT91SAM9RL_BASE_US3
|
||||
|
||||
|
||||
/*
|
||||
* Internal Memory.
|
||||
|
|
|
@ -54,14 +54,6 @@
|
|||
#define AT91SAM9X5_BASE_USART1 0xf8020000
|
||||
#define AT91SAM9X5_BASE_USART2 0xf8024000
|
||||
|
||||
/*
|
||||
* Base addresses for early serial code (uncompress.h)
|
||||
*/
|
||||
#define AT91_DBGU AT91_BASE_DBGU0
|
||||
#define AT91_USART0 AT91SAM9X5_BASE_USART0
|
||||
#define AT91_USART1 AT91SAM9X5_BASE_USART1
|
||||
#define AT91_USART2 AT91SAM9X5_BASE_USART2
|
||||
|
||||
/*
|
||||
* Internal Memory.
|
||||
*/
|
||||
|
|
|
@ -121,7 +121,6 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de
|
|||
#define ATMEL_UART_RI 0x20
|
||||
|
||||
extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
|
||||
extern void __init at91_set_serial_console(unsigned portnr);
|
||||
|
||||
extern struct platform_device *atmel_default_console_device;
|
||||
|
||||
|
|
|
@ -54,6 +54,7 @@
|
|||
#define ARCH_REVISON_9200_BGA (0 << 0)
|
||||
#define ARCH_REVISON_9200_PQFP (1 << 0)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
enum at91_soc_type {
|
||||
/* 920T */
|
||||
AT91_SOC_RM9200,
|
||||
|
@ -106,7 +107,7 @@ static inline int at91_soc_is_detected(void)
|
|||
return at91_soc_initdata.type != AT91_SOC_NONE;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91RM9200
|
||||
#ifdef CONFIG_SOC_AT91RM9200
|
||||
#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
|
||||
#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
|
||||
#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
|
||||
|
@ -116,45 +117,37 @@ static inline int at91_soc_is_detected(void)
|
|||
#define cpu_is_at91rm9200_pqfp() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9260
|
||||
#ifdef CONFIG_SOC_AT91SAM9260
|
||||
#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
|
||||
#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
|
||||
#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
|
||||
#else
|
||||
#define cpu_is_at91sam9xe() (0)
|
||||
#define cpu_is_at91sam9260() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9G20
|
||||
#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
|
||||
#else
|
||||
#define cpu_is_at91sam9g20() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9261
|
||||
#ifdef CONFIG_SOC_AT91SAM9261
|
||||
#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
|
||||
#else
|
||||
#define cpu_is_at91sam9261() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9G10
|
||||
#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
|
||||
#else
|
||||
#define cpu_is_at91sam9261() (0)
|
||||
#define cpu_is_at91sam9g10() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9263
|
||||
#ifdef CONFIG_SOC_AT91SAM9263
|
||||
#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
|
||||
#else
|
||||
#define cpu_is_at91sam9263() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9RL
|
||||
#ifdef CONFIG_SOC_AT91SAM9RL
|
||||
#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
|
||||
#else
|
||||
#define cpu_is_at91sam9rl() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9G45
|
||||
#ifdef CONFIG_SOC_AT91SAM9G45
|
||||
#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
|
||||
#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
|
||||
#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
|
||||
|
@ -168,7 +161,7 @@ static inline int at91_soc_is_detected(void)
|
|||
#define cpu_is_at91sam9m11() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9X5
|
||||
#ifdef CONFIG_SOC_AT91SAM9X5
|
||||
#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
|
||||
#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
|
||||
#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
|
||||
|
@ -189,5 +182,6 @@ static inline int at91_soc_is_detected(void)
|
|||
* definitions may reduce clutter in common drivers.
|
||||
*/
|
||||
#define cpu_is_at32ap7000() (0)
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __MACH_CPU_H__ */
|
||||
|
|
|
@ -22,27 +22,17 @@
|
|||
/* 9263, 9g45 */
|
||||
#define AT91_BASE_DBGU1 0xffffee00
|
||||
|
||||
#if defined(CONFIG_ARCH_AT91RM9200)
|
||||
#include <mach/at91rm9200.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
|
||||
#include <mach/at91sam9260.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)
|
||||
#include <mach/at91sam9261.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9263)
|
||||
#include <mach/at91sam9263.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9RL)
|
||||
#include <mach/at91sam9rl.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
#include <mach/at91sam9g45.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9X5)
|
||||
#include <mach/at91sam9x5.h>
|
||||
#elif defined(CONFIG_ARCH_AT91X40)
|
||||
#if defined(CONFIG_ARCH_AT91X40)
|
||||
#include <mach/at91x40.h>
|
||||
#else
|
||||
#error "Unsupported AT91 processor"
|
||||
#endif
|
||||
#include <mach/at91rm9200.h>
|
||||
#include <mach/at91sam9260.h>
|
||||
#include <mach/at91sam9261.h>
|
||||
#include <mach/at91sam9263.h>
|
||||
#include <mach/at91sam9rl.h>
|
||||
#include <mach/at91sam9g45.h>
|
||||
#include <mach/at91sam9x5.h>
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91X40)
|
||||
/*
|
||||
* On all at91 except rm9200 and x40 have the System Controller starts
|
||||
* at address 0xffffc000 and has a size of 16KiB.
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* arch/arm/mach-at91/include/mach/uncompress.h
|
||||
*
|
||||
* Copyright (C) 2003 SAN People
|
||||
* Copyright (C) 2003 SAN People
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@ -25,22 +26,147 @@
|
|||
#include <linux/atmel_serial.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#if defined(CONFIG_AT91_EARLY_DBGU0)
|
||||
#define UART_OFFSET AT91_BASE_DBGU0
|
||||
#elif defined(CONFIG_AT91_EARLY_DBGU1)
|
||||
#define UART_OFFSET AT91_BASE_DBGU1
|
||||
#elif defined(CONFIG_AT91_EARLY_USART0)
|
||||
#define UART_OFFSET AT91_USART0
|
||||
#elif defined(CONFIG_AT91_EARLY_USART1)
|
||||
#define UART_OFFSET AT91_USART1
|
||||
#elif defined(CONFIG_AT91_EARLY_USART2)
|
||||
#define UART_OFFSET AT91_USART2
|
||||
#elif defined(CONFIG_AT91_EARLY_USART3)
|
||||
#define UART_OFFSET AT91_USART3
|
||||
#elif defined(CONFIG_AT91_EARLY_USART4)
|
||||
#define UART_OFFSET AT91_USART4
|
||||
#elif defined(CONFIG_AT91_EARLY_USART5)
|
||||
#define UART_OFFSET AT91_USART5
|
||||
#include <mach/at91_dbgu.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
void __iomem *at91_uart;
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91X40)
|
||||
static const u32 uarts_rm9200[] = {
|
||||
AT91_BASE_DBGU0,
|
||||
AT91RM9200_BASE_US0,
|
||||
AT91RM9200_BASE_US1,
|
||||
AT91RM9200_BASE_US2,
|
||||
AT91RM9200_BASE_US3,
|
||||
0,
|
||||
};
|
||||
|
||||
static const u32 uarts_sam9260[] = {
|
||||
AT91_BASE_DBGU0,
|
||||
AT91SAM9260_BASE_US0,
|
||||
AT91SAM9260_BASE_US1,
|
||||
AT91SAM9260_BASE_US2,
|
||||
AT91SAM9260_BASE_US3,
|
||||
AT91SAM9260_BASE_US4,
|
||||
AT91SAM9260_BASE_US5,
|
||||
0,
|
||||
};
|
||||
|
||||
static const u32 uarts_sam9261[] = {
|
||||
AT91_BASE_DBGU0,
|
||||
AT91SAM9261_BASE_US0,
|
||||
AT91SAM9261_BASE_US1,
|
||||
AT91SAM9261_BASE_US2,
|
||||
0,
|
||||
};
|
||||
|
||||
static const u32 uarts_sam9263[] = {
|
||||
AT91_BASE_DBGU1,
|
||||
AT91SAM9263_BASE_US0,
|
||||
AT91SAM9263_BASE_US1,
|
||||
AT91SAM9263_BASE_US2,
|
||||
0,
|
||||
};
|
||||
|
||||
static const u32 uarts_sam9g45[] = {
|
||||
AT91_BASE_DBGU1,
|
||||
AT91SAM9G45_BASE_US0,
|
||||
AT91SAM9G45_BASE_US1,
|
||||
AT91SAM9G45_BASE_US2,
|
||||
AT91SAM9G45_BASE_US3,
|
||||
0,
|
||||
};
|
||||
|
||||
static const u32 uarts_sam9rl[] = {
|
||||
AT91_BASE_DBGU0,
|
||||
AT91SAM9RL_BASE_US0,
|
||||
AT91SAM9RL_BASE_US1,
|
||||
AT91SAM9RL_BASE_US2,
|
||||
AT91SAM9RL_BASE_US3,
|
||||
0,
|
||||
};
|
||||
|
||||
static const u32 uarts_sam9x5[] = {
|
||||
AT91_BASE_DBGU0,
|
||||
AT91SAM9X5_BASE_USART0,
|
||||
AT91SAM9X5_BASE_USART1,
|
||||
AT91SAM9X5_BASE_USART2,
|
||||
0,
|
||||
};
|
||||
|
||||
static inline const u32* decomp_soc_detect(u32 dbgu_base)
|
||||
{
|
||||
u32 cidr, socid;
|
||||
|
||||
cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
|
||||
socid = cidr & ~AT91_CIDR_VERSION;
|
||||
|
||||
switch (socid) {
|
||||
case ARCH_ID_AT91RM9200:
|
||||
return uarts_rm9200;
|
||||
|
||||
case ARCH_ID_AT91SAM9G20:
|
||||
case ARCH_ID_AT91SAM9260:
|
||||
return uarts_sam9260;
|
||||
|
||||
case ARCH_ID_AT91SAM9261:
|
||||
return uarts_sam9261;
|
||||
|
||||
case ARCH_ID_AT91SAM9263:
|
||||
return uarts_sam9263;
|
||||
|
||||
case ARCH_ID_AT91SAM9G45:
|
||||
return uarts_sam9g45;
|
||||
|
||||
case ARCH_ID_AT91SAM9RL64:
|
||||
return uarts_sam9rl;
|
||||
|
||||
case ARCH_ID_AT91SAM9X5:
|
||||
return uarts_sam9x5;
|
||||
}
|
||||
|
||||
/* at91sam9g10 */
|
||||
if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
|
||||
return uarts_sam9261;
|
||||
}
|
||||
/* at91sam9xe */
|
||||
else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
|
||||
return uarts_sam9260;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void arch_decomp_setup(void)
|
||||
{
|
||||
int i = 0;
|
||||
const u32* usarts;
|
||||
|
||||
usarts = decomp_soc_detect(AT91_BASE_DBGU0);
|
||||
|
||||
if (!usarts)
|
||||
usarts = decomp_soc_detect(AT91_BASE_DBGU1);
|
||||
if (!usarts) {
|
||||
at91_uart = NULL;
|
||||
return;
|
||||
}
|
||||
|
||||
do {
|
||||
/* physical address */
|
||||
at91_uart = (void __iomem *)usarts[i];
|
||||
|
||||
if (__raw_readl(at91_uart + ATMEL_US_BRGR))
|
||||
return;
|
||||
i++;
|
||||
} while (usarts[i]);
|
||||
|
||||
at91_uart = NULL;
|
||||
}
|
||||
#else
|
||||
static inline void arch_decomp_setup(void)
|
||||
{
|
||||
at91_uart = NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
@ -52,28 +178,24 @@
|
|||
*/
|
||||
static void putc(int c)
|
||||
{
|
||||
#ifdef UART_OFFSET
|
||||
void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
|
||||
if (!at91_uart)
|
||||
return;
|
||||
|
||||
while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
|
||||
while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
|
||||
barrier();
|
||||
__raw_writel(c, sys + ATMEL_US_THR);
|
||||
#endif
|
||||
__raw_writel(c, at91_uart + ATMEL_US_THR);
|
||||
}
|
||||
|
||||
static inline void flush(void)
|
||||
{
|
||||
#ifdef UART_OFFSET
|
||||
void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
|
||||
if (!at91_uart)
|
||||
return;
|
||||
|
||||
/* wait for transmission to complete */
|
||||
while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
|
||||
while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
|
||||
barrier();
|
||||
#endif
|
||||
}
|
||||
|
||||
#define arch_decomp_setup()
|
||||
|
||||
#define arch_decomp_wdog()
|
||||
|
||||
#endif
|
||||
|
|
|
@ -261,7 +261,12 @@ static int at91_pm_enter(suspend_state_t state)
|
|||
* For ARM 926 based chips, this requirement is weaker
|
||||
* as at91sam9 can access a RAM in self-refresh mode.
|
||||
*/
|
||||
at91_standby();
|
||||
if (cpu_is_at91rm9200())
|
||||
at91rm9200_standby();
|
||||
else if (cpu_is_at91sam9g45())
|
||||
at91sam9g45_standby();
|
||||
else
|
||||
at91sam9_standby();
|
||||
break;
|
||||
|
||||
case PM_SUSPEND_ON:
|
||||
|
@ -307,10 +312,9 @@ static int __init at91_pm_init(void)
|
|||
|
||||
pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91RM9200
|
||||
/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
|
||||
at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
|
||||
#endif
|
||||
if (cpu_is_at91rm9200())
|
||||
at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
|
||||
|
||||
suspend_set_ops(&at91_pm_ops);
|
||||
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
#define __ARCH_ARM_MACH_AT91_PM
|
||||
|
||||
#include <mach/at91_ramc.h>
|
||||
#ifdef CONFIG_ARCH_AT91RM9200
|
||||
#include <mach/at91rm9200_sdramc.h>
|
||||
|
||||
/*
|
||||
|
@ -43,10 +42,6 @@ static inline void at91rm9200_standby(void)
|
|||
"r" (lpr));
|
||||
}
|
||||
|
||||
#define at91_standby at91rm9200_standby
|
||||
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
|
||||
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
|
||||
* remember.
|
||||
*/
|
||||
|
@ -75,11 +70,7 @@ static inline void at91sam9g45_standby(void)
|
|||
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
|
||||
}
|
||||
|
||||
#define at91_standby at91sam9g45_standby
|
||||
|
||||
#else
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9263
|
||||
#ifdef CONFIG_SOC_AT91SAM9263
|
||||
/*
|
||||
* FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
|
||||
* handle those cases both here and in the Suspend-To-RAM support.
|
||||
|
@ -102,8 +93,4 @@ static inline void at91sam9_standby(void)
|
|||
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
|
||||
}
|
||||
|
||||
#define at91_standby at91sam9_standby
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include <mach/at91_ramc.h>
|
||||
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9263
|
||||
#ifdef CONFIG_SOC_AT91SAM9263
|
||||
/*
|
||||
* FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
|
||||
* handle those cases both here and in the Suspend-To-RAM support.
|
||||
|
|
|
@ -26,30 +26,30 @@ static inline int at91_soc_is_enabled(void)
|
|||
return at91_boot_soc.init != NULL;
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91RM9200)
|
||||
#if !defined(CONFIG_SOC_AT91RM9200)
|
||||
#define at91rm9200_soc at91_boot_soc
|
||||
#endif
|
||||
|
||||
#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20))
|
||||
#if !defined(CONFIG_SOC_AT91SAM9260)
|
||||
#define at91sam9260_soc at91_boot_soc
|
||||
#endif
|
||||
|
||||
#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10))
|
||||
#if !defined(CONFIG_SOC_AT91SAM9261)
|
||||
#define at91sam9261_soc at91_boot_soc
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91SAM9263)
|
||||
#if !defined(CONFIG_SOC_AT91SAM9263)
|
||||
#define at91sam9263_soc at91_boot_soc
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
#if !defined(CONFIG_SOC_AT91SAM9G45)
|
||||
#define at91sam9g45_soc at91_boot_soc
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91SAM9RL)
|
||||
#if !defined(CONFIG_SOC_AT91SAM9RL)
|
||||
#define at91sam9rl_soc at91_boot_soc
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_ARCH_AT91SAM9X5)
|
||||
#if !defined(CONFIG_SOC_AT91SAM9X5)
|
||||
#define at91sam9x5_soc at91_boot_soc
|
||||
#endif
|
||||
|
|
|
@ -368,6 +368,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
|
|||
|
||||
config MACH_EXYNOS4_DT
|
||||
bool "Samsung Exynos4 Machine using device tree"
|
||||
depends on ARCH_EXYNOS4
|
||||
select CPU_EXYNOS4210
|
||||
select USE_OF
|
||||
select ARM_AMBA
|
||||
|
@ -380,6 +381,7 @@ config MACH_EXYNOS4_DT
|
|||
|
||||
config MACH_EXYNOS5_DT
|
||||
bool "SAMSUNG EXYNOS5 Machine using device tree"
|
||||
depends on ARCH_EXYNOS5
|
||||
select SOC_EXYNOS5250
|
||||
select USE_OF
|
||||
select ARM_AMBA
|
||||
|
|
|
@ -212,6 +212,8 @@
|
|||
#define IRQ_MFC EXYNOS4_IRQ_MFC
|
||||
#define IRQ_SDO EXYNOS4_IRQ_SDO
|
||||
|
||||
#define IRQ_I2S0 EXYNOS4_IRQ_I2S0
|
||||
|
||||
#define IRQ_ADC EXYNOS4_IRQ_ADC0
|
||||
#define IRQ_TC EXYNOS4_IRQ_PEN0
|
||||
|
||||
|
|
|
@ -89,6 +89,10 @@
|
|||
#define EXYNOS4_PA_MDMA1 0x12840000
|
||||
#define EXYNOS4_PA_PDMA0 0x12680000
|
||||
#define EXYNOS4_PA_PDMA1 0x12690000
|
||||
#define EXYNOS5_PA_MDMA0 0x10800000
|
||||
#define EXYNOS5_PA_MDMA1 0x11C10000
|
||||
#define EXYNOS5_PA_PDMA0 0x121A0000
|
||||
#define EXYNOS5_PA_PDMA1 0x121B0000
|
||||
|
||||
#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
|
||||
#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
|
||||
|
|
|
@ -255,9 +255,15 @@
|
|||
|
||||
/* For EXYNOS5250 */
|
||||
|
||||
#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
|
||||
#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
|
||||
#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
|
||||
#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
|
||||
#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
|
||||
#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
|
||||
#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
|
||||
#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
|
||||
|
||||
#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
|
||||
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
|
||||
|
||||
|
|
|
@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
|
|||
"exynos4210-uart.3", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
|
||||
{},
|
||||
};
|
||||
|
||||
|
|
|
@ -307,49 +307,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
|
|||
};
|
||||
|
||||
/* TSP */
|
||||
static u8 mxt_init_vals[] = {
|
||||
/* MXT_GEN_COMMAND(6) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_GEN_POWER(7) */
|
||||
0x20, 0xff, 0x32,
|
||||
/* MXT_GEN_ACQUIRE(8) */
|
||||
0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
|
||||
/* MXT_TOUCH_MULTI(9) */
|
||||
0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
|
||||
0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00,
|
||||
/* MXT_TOUCH_KEYARRAY(15) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
|
||||
0x00,
|
||||
/* MXT_SPT_GPIOPWM(19) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_PROCI_GRIPFACE(20) */
|
||||
0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
|
||||
0x0f, 0x0a,
|
||||
/* MXT_PROCG_NOISE(22) */
|
||||
0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
|
||||
0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
|
||||
/* MXT_TOUCH_PROXIMITY(23) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_PROCI_ONETOUCH(24) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_SPT_SELFTEST(25) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_PROCI_TWOTOUCH(27) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_SPT_CTECONFIG(28) */
|
||||
0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
|
||||
};
|
||||
|
||||
static struct mxt_platform_data mxt_platform_data = {
|
||||
.config = mxt_init_vals,
|
||||
.config_length = ARRAY_SIZE(mxt_init_vals),
|
||||
|
||||
.x_line = 18,
|
||||
.y_line = 11,
|
||||
.x_size = 1024,
|
||||
|
@ -571,7 +529,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {
|
|||
|
||||
static struct regulator_init_data __initdata max8997_ldo8_data = {
|
||||
.constraints = {
|
||||
.name = "VUSB/VDAC_3.3V_C210",
|
||||
.name = "VUSB+VDAC_3.3V_C210",
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
|
@ -1347,6 +1305,7 @@ static struct platform_device *nuri_devices[] __initdata = {
|
|||
|
||||
static void __init nuri_map_io(void)
|
||||
{
|
||||
clk_xusbxti.rate = 24000000;
|
||||
exynos_init_io(NULL, 0);
|
||||
s3c24xx_init_clocks(24000000);
|
||||
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
|
||||
|
@ -1379,7 +1338,6 @@ static void __init nuri_machine_init(void)
|
|||
nuri_camera_init();
|
||||
|
||||
nuri_ehci_init();
|
||||
clk_xusbxti.rate = 24000000;
|
||||
|
||||
/* Last */
|
||||
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue