mirror of https://gitee.com/openkylin/linux.git
- fix boot issue with gxbb and gxl platforms
- fix racalculation error in the clk_audio_divider -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAls7K6wACgkQ5vwPHDfy 2oVqgA/+I7+quYyvKga+1oeIJUbbdlnldB25Fr/o0jsyMXqwRDPUsMmfg1JsUaSR symbn1Ic3H7dB+Gy2JWCwOl/Avz6D27CUeypt3A0ckhD1KcO+1+SahtRhiSKVxXw ZlXDEvTq7Ipb6xjX01LLHeXIXF/Fsic9DvTgBPFVjVELsTrl2H13UXQFSbFuFWMw /nLWYRAvjJqce7UZh+QZcjwJaev8RAFCcbt8ER4C8ReRcGYp3nJnOENTo5otYu/n i3xP458SDj8QUaMrsBj3zq07h3gpHhbb+mMSuo6ru0+h/V8eviSP1cDPNxy1DawT TOs56UfO5aQuelQuAC/Xxvne7iyUBa2OdMp8Nj0zhBrW0A39qZxNdZv8als7Ej8n Z4VhWgjk/3UCnLDYJ8VINIX9fmcljnMV02WY32Djn0p7GJqnQyoY1GwWlje1Jidd +CqlcMyYKaoIDTuYFHwuHLFy3Tepbq8u5fIuqJG1x9rF8rHeeWNRIMEPB7mCyPzS H9fcJdOiiCTyGGHT3HIBx3VYPyZkFj0gbGR4nBMEce9JIBWdrfTqhRzxh7HC29Ek 8GuqY6UXscD1cyh3jcmGdW9Y6XqXSvkmbzAUAdGvWBZPBGsFWMgWbQ5bgIhZe9cY LFrYsZ+D/bvkI9HBylCV2BGoHAU8ApgwCx/BNy/BIONqYyFjldA= =QyDk -----END PGP SIGNATURE----- Merge tag 'meson-clk-fixes-4.18-1' of https://github.com/BayLibre/clk-meson into clk-fixes Pull Amlogic clk driver fixes from Jerome Brunet: These are two simple fixes, yet the first one is quite important as it solves boots hangs we've been having when FDIV2 gets disabled. This did not show up before because this particular clock is heavily used and only gets disabled for a very short period of time before modules (such as ethernet or emmc) probe. - fix boot issue with gxbb and gxl platforms - fix racalculation error in the clk_audio_divider * tag 'meson-clk-fixes-4.18-1' of https://github.com/BayLibre/clk-meson: clk: meson: audio-divider is one based clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL
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commit
659e839c3c
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@ -51,7 +51,7 @@ static unsigned long audio_divider_recalc_rate(struct clk_hw *hw,
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struct meson_clk_audio_div_data *adiv = meson_clk_audio_div_data(clk);
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unsigned long divider;
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divider = meson_parm_read(clk->map, &adiv->div);
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divider = meson_parm_read(clk->map, &adiv->div) + 1;
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return DIV_ROUND_UP_ULL((u64)parent_rate, divider);
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}
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@ -498,6 +498,7 @@ static struct clk_regmap gxbb_fclk_div2 = {
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.ops = &clk_regmap_gate_ops,
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.parent_names = (const char *[]){ "fclk_div2_div" },
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.num_parents = 1,
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.flags = CLK_IS_CRITICAL,
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},
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};
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