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ARM: dts: r8a7794: Remove unit-address and reg from integrated cache 

The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: 34ea4b4a82 ("ARM: dts: r8a7794: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2017-03-06 17:40:43 +01:00 committed by Simon Horman
parent beffa8872a
commit 65d0b7ed40
1 changed files with 1 additions and 2 deletions
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3
arch/arm/boot/dts/r8a7794.dtsi
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@ -56,9 +56,8 @@ cpu1: cpu@1 {
next-level-cache = <&L2_CA7>;
};
L2_CA7: cache-controller@0 {
L2_CA7: cache-controller-0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;