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x86/vector: Add vector domain debugfs support
Add the debug callback for the vector domain, which gives a detailed information about vector usage if invoked for the domain by using rhe matrix allocator debug function and vector/target information when invoked for a particular interrupt. Extra information foir the Vector domain: Online bitmaps: 32 Global available: 6352 Global reserved: 5 Total allocated: 20 System: 41: 0-19,32,50,128,238-255 | CPU | avl | man | act | vectors 0 183 4 19 33-48,51-53 1 199 4 1 33 2 199 4 0 Extra information for interrupts: Vector: 42 Target: 4 This allows a detailed analysis of the vector usage and the association to interrupts and devices. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Yu Chen <yu.c.chen@intel.com> Acked-by: Juergen Gross <jgross@suse.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Rui Zhang <rui.zhang@intel.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Len Brown <lenb@kernel.org> Link: https://lkml.kernel.org/r/20170913213155.188137174@linutronix.de
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@ -11,6 +11,7 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/init.h>
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#include <linux/compiler.h>
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#include <linux/slab.h>
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@ -373,9 +374,54 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,
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return err;
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}
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#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
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void x86_vector_debug_show(struct seq_file *m, struct irq_domain *d,
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struct irq_data *irqd, int ind)
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{
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unsigned int cpu, vec, prev_cpu, prev_vec;
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struct apic_chip_data *apicd;
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unsigned long flags;
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int irq;
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if (!irqd) {
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irq_matrix_debug_show(m, vector_matrix, ind);
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return;
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}
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irq = irqd->irq;
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if (irq < nr_legacy_irqs() && !test_bit(irq, &io_apic_irqs)) {
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seq_printf(m, "%*sVector: %5d\n", ind, "", ISA_IRQ_VECTOR(irq));
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seq_printf(m, "%*sTarget: Legacy PIC all CPUs\n", ind, "");
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return;
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}
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apicd = irqd->chip_data;
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if (!apicd) {
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seq_printf(m, "%*sVector: Not assigned\n", ind, "");
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return;
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}
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raw_spin_lock_irqsave(&vector_lock, flags);
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cpu = apicd->cpu;
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vec = apicd->cfg.vector;
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prev_cpu = apicd->prev_cpu;
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prev_vec = apicd->cfg.old_vector;
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raw_spin_unlock_irqrestore(&vector_lock, flags);
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seq_printf(m, "%*sVector: %5u\n", ind, "", vec);
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seq_printf(m, "%*sTarget: %5u\n", ind, "", cpu);
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if (prev_vec) {
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seq_printf(m, "%*sPrevious vector: %5u\n", ind, "", prev_vec);
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seq_printf(m, "%*sPrevious target: %5u\n", ind, "", prev_cpu);
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}
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}
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#endif
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static const struct irq_domain_ops x86_vector_domain_ops = {
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.alloc = x86_vector_alloc_irqs,
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.free = x86_vector_free_irqs,
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.alloc = x86_vector_alloc_irqs,
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.free = x86_vector_free_irqs,
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#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
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.debug_show = x86_vector_debug_show,
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#endif
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};
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int __init arch_probe_nr_irqs(void)
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