mirror of https://gitee.com/openkylin/linux.git
igb: fix init on 82575 with MNG enabled
This patch resolves an issue seen on 82575 adapters with managability pass-thru enabled, which could cause the system to panic. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -1227,6 +1227,79 @@ static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw)
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temp = rd32(E1000_SCVPC);
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}
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/**
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* igb_rx_fifo_flush_82575 - Clean rx fifo after RX enable
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* @hw: pointer to the HW structure
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*
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* After rx enable if managability is enabled then there is likely some
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* bad data at the start of the fifo and possibly in the DMA fifo. This
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* function clears the fifos and flushes any packets that came in as rx was
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* being enabled.
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**/
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void igb_rx_fifo_flush_82575(struct e1000_hw *hw)
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{
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u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
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int i, ms_wait;
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if (hw->mac.type != e1000_82575 ||
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!(rd32(E1000_MANC) & E1000_MANC_RCV_TCO_EN))
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return;
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/* Disable all RX queues */
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for (i = 0; i < 4; i++) {
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rxdctl[i] = rd32(E1000_RXDCTL(i));
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wr32(E1000_RXDCTL(i),
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rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
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}
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/* Poll all queues to verify they have shut down */
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for (ms_wait = 0; ms_wait < 10; ms_wait++) {
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msleep(1);
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rx_enabled = 0;
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for (i = 0; i < 4; i++)
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rx_enabled |= rd32(E1000_RXDCTL(i));
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if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
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break;
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}
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if (ms_wait == 10)
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hw_dbg("Queue disable timed out after 10ms\n");
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/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
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* incoming packets are rejected. Set enable and wait 2ms so that
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* any packet that was coming in as RCTL.EN was set is flushed
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*/
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rfctl = rd32(E1000_RFCTL);
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wr32(E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
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rlpml = rd32(E1000_RLPML);
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wr32(E1000_RLPML, 0);
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rctl = rd32(E1000_RCTL);
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temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
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temp_rctl |= E1000_RCTL_LPE;
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wr32(E1000_RCTL, temp_rctl);
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wr32(E1000_RCTL, temp_rctl | E1000_RCTL_EN);
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wrfl();
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msleep(2);
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/* Enable RX queues that were previously enabled and restore our
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* previous state
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*/
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for (i = 0; i < 4; i++)
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wr32(E1000_RXDCTL(i), rxdctl[i]);
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wr32(E1000_RCTL, rctl);
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wrfl();
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wr32(E1000_RLPML, rlpml);
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wr32(E1000_RFCTL, rfctl);
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/* Flush receive errors generated by workaround */
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rd32(E1000_ROC);
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rd32(E1000_RNBC);
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rd32(E1000_MPC);
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}
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static struct e1000_mac_operations e1000_mac_ops_82575 = {
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.reset_hw = igb_reset_hw_82575,
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.init_hw = igb_init_hw_82575,
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@ -28,6 +28,8 @@
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#ifndef _E1000_82575_H_
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#define _E1000_82575_H_
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extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw);
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#define E1000_RAR_ENTRIES_82575 16
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/* SRRCTL bit definitions */
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@ -340,6 +340,7 @@
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#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */
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/* Header split receive */
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#define E1000_RFCTL_LEF 0x00040000
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/* Collision related configuration parameters */
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#define E1000_COLLISION_THRESHOLD 15
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@ -630,6 +630,9 @@ static void igb_configure(struct igb_adapter *adapter)
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igb_configure_tx(adapter);
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igb_setup_rctl(adapter);
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igb_configure_rx(adapter);
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igb_rx_fifo_flush_82575(&adapter->hw);
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/* call IGB_DESC_UNUSED which always leaves
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* at least 1 descriptor unused to make sure
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* next_to_use != next_to_clean */
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