mirror of https://gitee.com/openkylin/linux.git
ASoC: fsl_esai: introduce SoC specific data
Introduce a SoC specific data structure which contains the differences between the different SoCs. This makes it easier to support more differences without having to introduce a new if/else each time. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Link: https://lore.kernel.org/r/c188279975bd216995904f9bf8a84c7887b759a0.1589537601.git.shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -21,6 +21,17 @@
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_LE)
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SNDRV_PCM_FMTBIT_S24_LE)
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/**
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* fsl_esai_soc_data: soc specific data
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*
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* @imx: for imx platform
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* @reset_at_xrun: flags for enable reset operaton
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*/
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struct fsl_esai_soc_data {
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bool imx;
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bool reset_at_xrun;
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};
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/**
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/**
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* fsl_esai: ESAI private data
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* fsl_esai: ESAI private data
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*
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*
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@ -33,6 +44,7 @@
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* @fsysclk: system clock source to derive HCK, SCK and FS
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* @fsysclk: system clock source to derive HCK, SCK and FS
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* @spbaclk: SPBA clock (optional, depending on SoC design)
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* @spbaclk: SPBA clock (optional, depending on SoC design)
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* @task: tasklet to handle the reset operation
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* @task: tasklet to handle the reset operation
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* @soc: soc specific data
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* @lock: spin lock between hw_reset() and trigger()
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* @lock: spin lock between hw_reset() and trigger()
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* @fifo_depth: depth of tx/rx FIFO
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* @fifo_depth: depth of tx/rx FIFO
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* @slot_width: width of each DAI slot
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* @slot_width: width of each DAI slot
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@ -44,7 +56,6 @@
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* @sck_div: if using PSR/PM dividers for SCKx clock
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* @sck_div: if using PSR/PM dividers for SCKx clock
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* @slave_mode: if fully using DAI slave mode
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* @slave_mode: if fully using DAI slave mode
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* @synchronous: if using tx/rx synchronous mode
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* @synchronous: if using tx/rx synchronous mode
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* @reset_at_xrun: flags for enable reset operaton
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* @name: driver name
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* @name: driver name
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*/
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*/
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struct fsl_esai {
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struct fsl_esai {
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@ -57,6 +68,7 @@ struct fsl_esai {
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struct clk *fsysclk;
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struct clk *fsysclk;
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struct clk *spbaclk;
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struct clk *spbaclk;
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struct tasklet_struct task;
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struct tasklet_struct task;
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const struct fsl_esai_soc_data *soc;
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spinlock_t lock; /* Protect hw_reset and trigger */
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spinlock_t lock; /* Protect hw_reset and trigger */
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u32 fifo_depth;
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u32 fifo_depth;
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u32 slot_width;
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u32 slot_width;
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@ -70,10 +82,24 @@ struct fsl_esai {
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bool sck_div[2];
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bool sck_div[2];
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bool slave_mode;
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bool slave_mode;
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bool synchronous;
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bool synchronous;
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bool reset_at_xrun;
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char name[32];
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char name[32];
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};
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};
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static struct fsl_esai_soc_data fsl_esai_vf610 = {
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.imx = false,
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.reset_at_xrun = true,
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};
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static struct fsl_esai_soc_data fsl_esai_imx35 = {
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.imx = true,
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.reset_at_xrun = true,
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};
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static struct fsl_esai_soc_data fsl_esai_imx6ull = {
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.imx = true,
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.reset_at_xrun = false,
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};
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static irqreturn_t esai_isr(int irq, void *devid)
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static irqreturn_t esai_isr(int irq, void *devid)
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{
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{
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struct fsl_esai *esai_priv = (struct fsl_esai *)devid;
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struct fsl_esai *esai_priv = (struct fsl_esai *)devid;
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@ -85,7 +111,7 @@ static irqreturn_t esai_isr(int irq, void *devid)
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regmap_read(esai_priv->regmap, REG_ESAI_SAISR, &saisr);
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regmap_read(esai_priv->regmap, REG_ESAI_SAISR, &saisr);
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if ((saisr & (ESAI_SAISR_TUE | ESAI_SAISR_ROE)) &&
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if ((saisr & (ESAI_SAISR_TUE | ESAI_SAISR_ROE)) &&
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esai_priv->reset_at_xrun) {
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esai_priv->soc->reset_at_xrun) {
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dev_dbg(&pdev->dev, "reset module for xrun\n");
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dev_dbg(&pdev->dev, "reset module for xrun\n");
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regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,
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regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,
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ESAI_xCR_xEIE_MASK, 0);
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ESAI_xCR_xEIE_MASK, 0);
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@ -936,9 +962,11 @@ static int fsl_esai_probe(struct platform_device *pdev)
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esai_priv->pdev = pdev;
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esai_priv->pdev = pdev;
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snprintf(esai_priv->name, sizeof(esai_priv->name), "%pOFn", np);
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snprintf(esai_priv->name, sizeof(esai_priv->name), "%pOFn", np);
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if (of_device_is_compatible(np, "fsl,vf610-esai") ||
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esai_priv->soc = of_device_get_match_data(&pdev->dev);
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of_device_is_compatible(np, "fsl,imx35-esai"))
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if (!esai_priv->soc) {
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esai_priv->reset_at_xrun = true;
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dev_err(&pdev->dev, "failed to get soc data\n");
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return -ENODEV;
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}
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/* Get the addresses and IRQ */
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/* Get the addresses and IRQ */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -1063,9 +1091,9 @@ static int fsl_esai_remove(struct platform_device *pdev)
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}
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}
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static const struct of_device_id fsl_esai_dt_ids[] = {
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static const struct of_device_id fsl_esai_dt_ids[] = {
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{ .compatible = "fsl,imx35-esai", },
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{ .compatible = "fsl,imx35-esai", .data = &fsl_esai_imx35 },
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{ .compatible = "fsl,vf610-esai", },
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{ .compatible = "fsl,vf610-esai", .data = &fsl_esai_vf610 },
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{ .compatible = "fsl,imx6ull-esai", },
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{ .compatible = "fsl,imx6ull-esai", .data = &fsl_esai_imx6ull },
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{}
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{}
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};
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};
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MODULE_DEVICE_TABLE(of, fsl_esai_dt_ids);
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MODULE_DEVICE_TABLE(of, fsl_esai_dt_ids);
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