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drm/amd/display: add dsclk to pipe bw struct 

This will allow us to program dscclk to required value

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2018-09-18 14:24:05 -04:00 committed by Alex Deucher
parent 4fd994c448
commit 69338c1f4e
2 changed files with 2 additions and 7 deletions
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2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -2048,7 +2048,7 @@ void update_dchubp_dpp(
dc->res_pool->dccg->funcs->update_dpp_dto(
dc->res_pool->dccg,
dpp->inst,
pipe_ctx->plane_res.bw.calc.dppclk_khz);
pipe_ctx->plane_res.bw.dppclk_khz);
else
dc->res_pool->clk_mgr->clks.dppclk_khz = should_divided_by_2 ?
dc->res_pool->clk_mgr->clks.dispclk_khz / 2 :

7
drivers/gpu/drm/amd/display/dc/inc/core_types.h
View File

@ -180,13 +180,8 @@ struct resource_pool {
const struct resource_caps *res_cap;
};
struct dcn_fe_clocks {
int dppclk_khz;
};
struct dcn_fe_bandwidth {
struct dcn_fe_clocks calc;
struct dcn_fe_clocks cur;
int dppclk_khz;
};
struct stream_resource {