mirror of https://gitee.com/openkylin/linux.git
gpio: ftgpio010: Fix some more registers
There is a register for "bypass" which seems to not be used for anything in some silicon designs, but may be used in others, and there is both a raw and masked interrupt status register. Define them all for clarity, no semantic changes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -21,12 +21,14 @@
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#define GPIO_DATA_OUT 0x00
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#define GPIO_DATA_IN 0x04
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#define GPIO_DIR 0x08
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#define GPIO_BYPASS_IN 0x0C
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#define GPIO_DATA_SET 0x10
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#define GPIO_DATA_CLR 0x14
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#define GPIO_PULL_EN 0x18
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#define GPIO_PULL_TYPE 0x1C
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#define GPIO_INT_EN 0x20
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#define GPIO_INT_STAT 0x24
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#define GPIO_INT_STAT_RAW 0x24
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#define GPIO_INT_STAT_MASKED 0x28
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#define GPIO_INT_MASK 0x2C
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#define GPIO_INT_CLR 0x30
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#define GPIO_INT_TYPE 0x34
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@ -147,7 +149,7 @@ static void ftgpio_gpio_irq_handler(struct irq_desc *desc)
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chained_irq_enter(irqchip, desc);
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stat = readl(g->base + GPIO_INT_STAT);
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stat = readl(g->base + GPIO_INT_STAT_RAW);
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if (stat)
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for_each_set_bit(offset, &stat, gc->ngpio)
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generic_handle_irq(irq_find_mapping(gc->irq.domain,
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