mirror of https://gitee.com/openkylin/linux.git
sh: sh7722: use runtime PM implementation, common with arm/mach-shmobile
Switch sh7722 to a runtime PM implementation, common with ARM-based sh-mobile platforms. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Guennadi Liakhovetski
Paul Mundt
parent
8cc88a55b0
commit
6a06d5bf26
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@ -44,7 +44,7 @@ struct hwblk_info {
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int nr_hwblks;
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};
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#if !defined(CONFIG_CPU_SUBTYPE_SH7724)
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#if !defined(CONFIG_CPU_SUBTYPE_SH7724) && !defined(CONFIG_CPU_SUBTYPE_SH7722)
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/* Should be defined by processor-specific code */
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int arch_hwblk_init(void);
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int arch_hwblk_sleep_mode(void);
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@ -19,6 +19,6 @@ obj-$(CONFIG_SH_ADC) += adc.o
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obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
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obj-y += irq/ init.o clock.o fpu.o proc.o
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ifneq ($(CONFIG_CPU_SUBTYPE_SH7724),y)
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ifneq ($(CONFIG_CPU_SUBTYPE_SH7724)$(CONFIG_CPU_SUBTYPE_SH7722),y)
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obj-y += hwblk.o
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endif
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@ -27,7 +27,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o
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@ -22,8 +22,8 @@
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/clkdev.h>
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#include <linux/sh_clk.h>
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#include <asm/clock.h>
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#include <asm/hwblk.h>
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#include <cpu/sh7722.h>
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/* SH7722 registers */
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@ -33,6 +33,9 @@
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#define SCLKBCR 0xa415000c
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#define IRDACLKCR 0xa4150018
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#define PLLCR 0xa4150024
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#define MSTPCR0 0xa4150030
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#define MSTPCR1 0xa4150034
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#define MSTPCR2 0xa4150038
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#define DLLFRQ 0xa4150050
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/* Fixed 32 KHz root clock for RTC and Power Management purposes */
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@ -148,31 +151,31 @@ struct clk div6_clks[DIV6_NR] = {
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};
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static struct clk mstp_clks[HWBLK_NR] = {
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SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK(HWBLK_XYMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK(HWBLK_TMU, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
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SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
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SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
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[HWBLK_URAM] = SH_CLK_MSTP32(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
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[HWBLK_XYMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
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[HWBLK_TMU] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
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[HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
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[HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
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[HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
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[HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
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[HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 6, 0),
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[HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 5, 0),
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SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
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[HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
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[HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
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SH_HWBLK_CLK(HWBLK_SDHI, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
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SH_HWBLK_CLK(HWBLK_USBF, &div4_clks[DIV4_P], 0),
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SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_VEU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
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SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0),
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[HWBLK_SDHI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 18, 0),
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[HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
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[HWBLK_USBF] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 11, 0),
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[HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0),
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[HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0),
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[HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0),
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[HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
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[HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
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[HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
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[HWBLK_VEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0),
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[HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0),
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[HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 0, 0),
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};
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static struct clk_lookup lookups[] = {
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@ -205,27 +208,27 @@ static struct clk_lookup lookups[] = {
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CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
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CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
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CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
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CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
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CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
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CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
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CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
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CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
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CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
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CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
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CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
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CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
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CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
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CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]),
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CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
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CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI]),
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CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
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CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]),
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CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
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CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
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CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
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CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]),
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CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
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CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
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CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
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CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
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CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]),
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CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]),
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CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
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CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
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CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
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};
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int __init arch_clk_init(void)
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@ -258,7 +261,7 @@ int __init arch_clk_init(void)
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ret = sh_clk_div6_register(div6_clks, DIV6_NR);
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if (!ret)
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ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
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ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
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return ret;
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}
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@ -1,106 +0,0 @@
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/*
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* arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
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*
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* SH7722 hardware block support
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*
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* Copyright (C) 2009 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/suspend.h>
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#include <asm/hwblk.h>
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#include <cpu/sh7722.h>
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/* SH7722 registers */
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#define MSTPCR0 0xa4150030
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#define MSTPCR1 0xa4150034
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#define MSTPCR2 0xa4150038
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/* SH7722 Power Domains */
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enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
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static struct hwblk_area sh7722_hwblk_area[] = {
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[CORE_AREA] = HWBLK_AREA(0, 0),
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[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
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[SUB_AREA] = HWBLK_AREA(0, 0),
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};
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/* Table mapping HWBLK to Module Stop Bit and Power Domain */
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static struct hwblk sh7722_hwblk[HWBLK_NR] = {
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[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
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[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
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[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
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[HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
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[HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
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[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
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[HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
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[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
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[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
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[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
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[HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
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[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
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[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
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[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
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[HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
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[HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
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[HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
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[HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
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[HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
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[HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
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[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
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[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
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[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
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[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
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[HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
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[HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
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[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
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[HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
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[HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
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[HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
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[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
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[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
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[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
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[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
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[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
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[HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
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[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
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[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
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};
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static struct hwblk_info sh7722_hwblk_info = {
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.areas = sh7722_hwblk_area,
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.nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
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.hwblks = sh7722_hwblk,
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.nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
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};
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int arch_hwblk_sleep_mode(void)
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{
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if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
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return SUSP_SH_STANDBY | SUSP_SH_SF;
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if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
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return SUSP_SH_SLEEP | SUSP_SH_SF;
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return SUSP_SH_SLEEP;
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}
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int __init arch_hwblk_init(void)
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{
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return hwblk_register(&sh7722_hwblk_info);
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}
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@ -5,6 +5,6 @@
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# Power Management & Sleep mode
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obj-$(CONFIG_PM) += pm.o sleep.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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ifneq ($(CONFIG_CPU_SUBTYPE_SH7724),y)
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ifneq ($(CONFIG_CPU_SUBTYPE_SH7724)$(CONFIG_CPU_SUBTYPE_SH7722),y)
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obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o
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endif
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@ -16,3 +16,4 @@ obj-$(CONFIG_GENERIC_GPIO) += pfc.o
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#
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obj-$(CONFIG_SUPERH)$(CONFIG_ARCH_SHMOBILE) += pm_runtime.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7724) += pm_runtime.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7722) += pm_runtime.o
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