mirror of https://gitee.com/openkylin/linux.git
lguest: decode mmio accesses for PCI in example launcher.
We don't do anything with them yet (emulate_mmio_write and emulate_mmio_read are stubs), but we decode the instructions and search for the device they're hitting. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
This commit is contained in:
Rusty Russell
parent
0a6bcc183f
commit
6a54f9ab0d
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@ -99,6 +99,9 @@ static int lguest_fd;
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/* a per-cpu variable indicating whose vcpu is currently running */
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static unsigned int __thread cpu_id;
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/* 5 bit device number in the PCI_CONFIG_ADDR => 32 only */
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#define MAX_PCI_DEVICES 32
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/* This is our list of devices. */
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struct device_list {
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/* Counter to assign interrupt numbers. */
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@ -114,6 +117,9 @@ struct device_list {
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struct device *dev;
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/* And a pointer to the last device for easy append. */
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struct device *lastdev;
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/* PCI devices. */
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struct device *pci[MAX_PCI_DEVICES];
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};
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/* The list of Guest devices, based on command line arguments. */
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@ -140,6 +146,10 @@ struct device {
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/* Is it operational */
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bool running;
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/* PCI MMIO resources (all in BAR0) */
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size_t mmio_size;
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u32 mmio_addr;
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/* Device-specific data. */
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void *priv;
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};
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@ -1197,6 +1207,77 @@ static void setreg_off(size_t offset, u32 val)
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err(1, "Setting register %u", offset);
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}
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/* Get register by instruction encoding */
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static u32 getreg_num(unsigned regnum, u32 mask)
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{
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/* 8 bit ops use regnums 4-7 for high parts of word */
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if (mask == 0xFF && (regnum & 0x4))
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return getreg_num(regnum & 0x3, 0xFFFF) >> 8;
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switch (regnum) {
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case 0: return getreg(eax) & mask;
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case 1: return getreg(ecx) & mask;
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case 2: return getreg(edx) & mask;
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case 3: return getreg(ebx) & mask;
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case 4: return getreg(esp) & mask;
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case 5: return getreg(ebp) & mask;
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case 6: return getreg(esi) & mask;
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case 7: return getreg(edi) & mask;
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}
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abort();
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}
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/* Set register by instruction encoding */
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static void setreg_num(unsigned regnum, u32 val, u32 mask)
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{
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/* Don't try to set bits out of range */
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assert(~(val & ~mask));
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/* 8 bit ops use regnums 4-7 for high parts of word */
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if (mask == 0xFF && (regnum & 0x4)) {
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/* Construct the 16 bits we want. */
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val = (val << 8) | getreg_num(regnum & 0x3, 0xFF);
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setreg_num(regnum & 0x3, val, 0xFFFF);
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return;
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}
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switch (regnum) {
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case 0: setreg(eax, val | (getreg(eax) & ~mask)); return;
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case 1: setreg(ecx, val | (getreg(ecx) & ~mask)); return;
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case 2: setreg(edx, val | (getreg(edx) & ~mask)); return;
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case 3: setreg(ebx, val | (getreg(ebx) & ~mask)); return;
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case 4: setreg(esp, val | (getreg(esp) & ~mask)); return;
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case 5: setreg(ebp, val | (getreg(ebp) & ~mask)); return;
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case 6: setreg(esi, val | (getreg(esi) & ~mask)); return;
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case 7: setreg(edi, val | (getreg(edi) & ~mask)); return;
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}
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abort();
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}
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/* Get bytes of displacement appended to instruction, from r/m encoding */
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static u32 insn_displacement_len(u8 mod_reg_rm)
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{
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/* Switch on the mod bits */
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switch (mod_reg_rm >> 6) {
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case 0:
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/* If mod == 0, and r/m == 101, 16-bit displacement follows */
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if ((mod_reg_rm & 0x7) == 0x5)
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return 2;
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/* Normally, mod == 0 means no literal displacement */
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return 0;
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case 1:
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/* One byte displacement */
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return 1;
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case 2:
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/* Four byte displacement */
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return 4;
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case 3:
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/* Register mode */
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return 0;
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}
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abort();
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}
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static void emulate_insn(const u8 insn[])
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{
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unsigned long args[] = { LHREQ_TRAP, 13 };
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@ -1310,6 +1391,88 @@ static void emulate_insn(const u8 insn[])
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err(1, "Reinjecting trap 13 for fault at %#x", getreg(eip));
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}
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static struct device *find_mmio_region(unsigned long paddr, u32 *off)
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{
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unsigned int i;
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for (i = 1; i < MAX_PCI_DEVICES; i++) {
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struct device *d = devices.pci[i];
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if (!d)
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continue;
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if (paddr < d->mmio_addr)
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continue;
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if (paddr >= d->mmio_addr + d->mmio_size)
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continue;
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*off = paddr - d->mmio_addr;
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return d;
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}
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return NULL;
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}
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static void emulate_mmio_write(struct device *d, u32 off, u32 val, u32 mask)
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{
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}
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static u32 emulate_mmio_read(struct device *d, u32 off, u32 mask)
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{
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return 0xFFFFFFFF;
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}
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static void emulate_mmio(unsigned long paddr, const u8 *insn)
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{
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u32 val, off, mask = 0xFFFFFFFF, insnlen = 0;
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struct device *d = find_mmio_region(paddr, &off);
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unsigned long args[] = { LHREQ_TRAP, 14 };
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if (!d) {
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warnx("MMIO touching %#08lx (not a device)", paddr);
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goto reinject;
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}
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/* Prefix makes it a 16 bit op */
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if (insn[0] == 0x66) {
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mask = 0xFFFF;
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insnlen++;
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}
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/* iowrite */
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if (insn[insnlen] == 0x89) {
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/* Next byte is r/m byte: bits 3-5 are register. */
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val = getreg_num((insn[insnlen+1] >> 3) & 0x7, mask);
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emulate_mmio_write(d, off, val, mask);
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insnlen += 2 + insn_displacement_len(insn[insnlen+1]);
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} else if (insn[insnlen] == 0x8b) { /* ioread */
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/* Next byte is r/m byte: bits 3-5 are register. */
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val = emulate_mmio_read(d, off, mask);
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setreg_num((insn[insnlen+1] >> 3) & 0x7, val, mask);
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insnlen += 2 + insn_displacement_len(insn[insnlen+1]);
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} else if (insn[0] == 0x88) { /* 8-bit iowrite */
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mask = 0xff;
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/* Next byte is r/m byte: bits 3-5 are register. */
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val = getreg_num((insn[1] >> 3) & 0x7, mask);
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emulate_mmio_write(d, off, val, mask);
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insnlen = 2 + insn_displacement_len(insn[1]);
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} else if (insn[0] == 0x8a) { /* 8-bit ioread */
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mask = 0xff;
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val = emulate_mmio_read(d, off, mask);
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setreg_num((insn[1] >> 3) & 0x7, val, mask);
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insnlen = 2 + insn_displacement_len(insn[1]);
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} else {
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warnx("Unknown MMIO instruction touching %#08lx:"
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" %02x %02x %02x %02x at %u",
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paddr, insn[0], insn[1], insn[2], insn[3], getreg(eip));
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reinject:
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/* Inject trap into Guest. */
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if (write(lguest_fd, args, sizeof(args)) < 0)
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err(1, "Reinjecting trap 14 for fault at %#x",
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getreg(eip));
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return;
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}
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/* Finally, we've "done" the instruction, so move past it. */
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setreg(eip, getreg(eip) + insnlen);
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}
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/*L:190
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* Device Setup
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@ -2004,6 +2167,10 @@ static void __attribute__((noreturn)) run_guest(void)
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verbose("Emulating instruction at %#x\n",
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getreg(eip));
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emulate_insn(notify.insn);
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} else if (notify.trap == 14) {
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verbose("Emulating MMIO at %#x\n",
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getreg(eip));
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emulate_mmio(notify.addr, notify.insn);
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} else
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errx(1, "Unknown trap %i addr %#08x\n",
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notify.trap, notify.addr);
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