mirror of https://gitee.com/openkylin/linux.git
Merge branch 'for-linus' into next
This commit is contained in:
commit
6b327a028f
|
@ -572,9 +572,11 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
|
||||||
|
|
||||||
imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));
|
imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));
|
||||||
|
|
||||||
dev_dbg(imxdma->dev, "%s channel: %d dest=0x%08x src=0x%08x "
|
dev_dbg(imxdma->dev,
|
||||||
"dma_length=%d\n", __func__, imxdmac->channel,
|
"%s channel: %d dest=0x%08llx src=0x%08llx dma_length=%zu\n",
|
||||||
d->dest, d->src, d->len);
|
__func__, imxdmac->channel,
|
||||||
|
(unsigned long long)d->dest,
|
||||||
|
(unsigned long long)d->src, d->len);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
/* Cyclic transfer is the same as slave_sg with special sg configuration. */
|
/* Cyclic transfer is the same as slave_sg with special sg configuration. */
|
||||||
|
@ -586,20 +588,22 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
|
||||||
imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,
|
imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,
|
||||||
DMA_CCR(imxdmac->channel));
|
DMA_CCR(imxdmac->channel));
|
||||||
|
|
||||||
dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d "
|
dev_dbg(imxdma->dev,
|
||||||
"total length=%d dev_addr=0x%08x (dev2mem)\n",
|
"%s channel: %d sg=%p sgcount=%d total length=%zu dev_addr=0x%08llx (dev2mem)\n",
|
||||||
__func__, imxdmac->channel, d->sg, d->sgcount,
|
__func__, imxdmac->channel,
|
||||||
d->len, imxdmac->per_address);
|
d->sg, d->sgcount, d->len,
|
||||||
|
(unsigned long long)imxdmac->per_address);
|
||||||
} else if (d->direction == DMA_MEM_TO_DEV) {
|
} else if (d->direction == DMA_MEM_TO_DEV) {
|
||||||
imx_dmav1_writel(imxdma, imxdmac->per_address,
|
imx_dmav1_writel(imxdma, imxdmac->per_address,
|
||||||
DMA_DAR(imxdmac->channel));
|
DMA_DAR(imxdmac->channel));
|
||||||
imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,
|
imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,
|
||||||
DMA_CCR(imxdmac->channel));
|
DMA_CCR(imxdmac->channel));
|
||||||
|
|
||||||
dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d "
|
dev_dbg(imxdma->dev,
|
||||||
"total length=%d dev_addr=0x%08x (mem2dev)\n",
|
"%s channel: %d sg=%p sgcount=%d total length=%zu dev_addr=0x%08llx (mem2dev)\n",
|
||||||
__func__, imxdmac->channel, d->sg, d->sgcount,
|
__func__, imxdmac->channel,
|
||||||
d->len, imxdmac->per_address);
|
d->sg, d->sgcount, d->len,
|
||||||
|
(unsigned long long)imxdmac->per_address);
|
||||||
} else {
|
} else {
|
||||||
dev_err(imxdma->dev, "%s channel: %d bad dma mode\n",
|
dev_err(imxdma->dev, "%s channel: %d bad dma mode\n",
|
||||||
__func__, imxdmac->channel);
|
__func__, imxdmac->channel);
|
||||||
|
@ -870,7 +874,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
|
||||||
int i;
|
int i;
|
||||||
unsigned int periods = buf_len / period_len;
|
unsigned int periods = buf_len / period_len;
|
||||||
|
|
||||||
dev_dbg(imxdma->dev, "%s channel: %d buf_len=%d period_len=%d\n",
|
dev_dbg(imxdma->dev, "%s channel: %d buf_len=%zu period_len=%zu\n",
|
||||||
__func__, imxdmac->channel, buf_len, period_len);
|
__func__, imxdmac->channel, buf_len, period_len);
|
||||||
|
|
||||||
if (list_empty(&imxdmac->ld_free) ||
|
if (list_empty(&imxdmac->ld_free) ||
|
||||||
|
@ -926,8 +930,9 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_memcpy(
|
||||||
struct imxdma_engine *imxdma = imxdmac->imxdma;
|
struct imxdma_engine *imxdma = imxdmac->imxdma;
|
||||||
struct imxdma_desc *desc;
|
struct imxdma_desc *desc;
|
||||||
|
|
||||||
dev_dbg(imxdma->dev, "%s channel: %d src=0x%x dst=0x%x len=%d\n",
|
dev_dbg(imxdma->dev, "%s channel: %d src=0x%llx dst=0x%llx len=%zu\n",
|
||||||
__func__, imxdmac->channel, src, dest, len);
|
__func__, imxdmac->channel, (unsigned long long)src,
|
||||||
|
(unsigned long long)dest, len);
|
||||||
|
|
||||||
if (list_empty(&imxdmac->ld_free) ||
|
if (list_empty(&imxdmac->ld_free) ||
|
||||||
imxdma_chan_is_doing_cyclic(imxdmac))
|
imxdma_chan_is_doing_cyclic(imxdmac))
|
||||||
|
@ -956,9 +961,10 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_interleaved(
|
||||||
struct imxdma_engine *imxdma = imxdmac->imxdma;
|
struct imxdma_engine *imxdma = imxdmac->imxdma;
|
||||||
struct imxdma_desc *desc;
|
struct imxdma_desc *desc;
|
||||||
|
|
||||||
dev_dbg(imxdma->dev, "%s channel: %d src_start=0x%x dst_start=0x%x\n"
|
dev_dbg(imxdma->dev, "%s channel: %d src_start=0x%llx dst_start=0x%llx\n"
|
||||||
" src_sgl=%s dst_sgl=%s numf=%d frame_size=%d\n", __func__,
|
" src_sgl=%s dst_sgl=%s numf=%zu frame_size=%zu\n", __func__,
|
||||||
imxdmac->channel, xt->src_start, xt->dst_start,
|
imxdmac->channel, (unsigned long long)xt->src_start,
|
||||||
|
(unsigned long long) xt->dst_start,
|
||||||
xt->src_sgl ? "true" : "false", xt->dst_sgl ? "true" : "false",
|
xt->src_sgl ? "true" : "false", xt->dst_sgl ? "true" : "false",
|
||||||
xt->numf, xt->frame_size);
|
xt->numf, xt->frame_size);
|
||||||
|
|
||||||
|
|
|
@ -3036,8 +3036,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
probe_err3:
|
probe_err3:
|
||||||
amba_set_drvdata(adev, NULL);
|
|
||||||
|
|
||||||
/* Idle the DMAC */
|
/* Idle the DMAC */
|
||||||
list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
|
list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
|
||||||
chan.device_node) {
|
chan.device_node) {
|
||||||
|
@ -3068,7 +3066,6 @@ static int pl330_remove(struct amba_device *adev)
|
||||||
of_dma_controller_free(adev->dev.of_node);
|
of_dma_controller_free(adev->dev.of_node);
|
||||||
|
|
||||||
dma_async_device_unregister(&pdmac->ddma);
|
dma_async_device_unregister(&pdmac->ddma);
|
||||||
amba_set_drvdata(adev, NULL);
|
|
||||||
|
|
||||||
/* Idle the DMAC */
|
/* Idle the DMAC */
|
||||||
list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
|
list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
|
||||||
|
|
Loading…
Reference in New Issue