mirror of https://gitee.com/openkylin/linux.git
staging: mfd: hi6421-spmi-pmic: cleanup the code
There are several small cleanups that can be done in order to make the code more prepared to be upstreamed. Suggested-by: Jonathan Cameron <Jonathan.Cameron@Huawei.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/823792ba2f69e613629ab52a33e5728d54e2288b.1597647359.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mauro Carvalho Chehab
Greg Kroah-Hartman
parent
926648d479
commit
6b94669925
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@ -17,26 +17,23 @@
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*
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*/
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/mfd/hi6421-spmi-pmic.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/mfd/hi6421-spmi-pmic.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spmi.h>
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#ifndef NO_IRQ
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#define NO_IRQ 0
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#endif
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/* 8-bit register offset in PMIC */
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#define HISI_MASK_STATE 0xff
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@ -46,12 +43,11 @@
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#define HISI_IRQ_KEY_DOWN 7
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#define HISI_IRQ_KEY_UP 6
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/*#define HISI_NR_IRQ 25*/
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#define HISI_MASK_FIELD 0xFF
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#define HISI_MASK_FIELD 0xFF
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#define HISI_BITS 8
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/*define the first group interrupt register number*/
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#define HISI_PMIC_FIRST_GROUP_INT_NUM 2
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#define HISI_PMIC_FIRST_GROUP_INT_NUM 2
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static const struct mfd_cell hi6421v600_devs[] = {
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{ .name = "hi6421v600-regulator", },
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@ -62,58 +58,60 @@ static const struct mfd_cell hi6421v600_devs[] = {
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* Hisilicon SoC use hardware to map PMIC register into SoC mapping.
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* At here, we are accessing SoC register with 32-bit.
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*/
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u32 hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg)
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int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg)
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{
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u32 ret;
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u8 read_value = 0;
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struct spmi_device *pdev;
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u8 read_value = 0;
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u32 ret;
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pdev = to_spmi_device(pmic->dev);
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if (!pdev) {
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pr_err("%s: pdev get failed!\n", __func__);
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return 0;
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return -ENODEV;
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}
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ret = spmi_ext_register_readl(pdev, reg,
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(unsigned char *)&read_value, 1);
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ret = spmi_ext_register_readl(pdev, reg, &read_value, 1);
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if (ret) {
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pr_err("%s: spmi_ext_register_readl failed!\n", __func__);
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return 0;
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return ret;
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}
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return (u32)read_value;
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return read_value;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_read);
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void hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val)
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int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val)
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{
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u32 ret;
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struct spmi_device *pdev;
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u32 ret;
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pdev = to_spmi_device(pmic->dev);
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if (!pdev) {
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pr_err("%s: pdev get failed!\n", __func__);
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return;
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return -ENODEV;
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}
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ret = spmi_ext_register_writel(pdev, reg, (unsigned char *)&val, 1);
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if (ret) {
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if (ret)
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pr_err("%s: spmi_ext_register_writel failed!\n", __func__);
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return;
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}
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return ret;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_write);
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void hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
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u32 mask, u32 bits)
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int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
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u32 mask, u32 bits)
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{
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u32 data;
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unsigned long flags;
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u32 data;
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int ret;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, reg) & ~mask;
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data |= mask & bits;
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hi6421_spmi_pmic_write(pmic, reg, data);
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ret = hi6421_spmi_pmic_write(pmic, reg, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_rmw);
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@ -124,16 +122,16 @@ static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data)
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int i, offset;
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for (i = 0; i < pmic->irqarray; i++) {
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pending = hi6421_spmi_pmic_read(pmic, (i + pmic->irq_addr.start_addr));
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pending = hi6421_spmi_pmic_read(pmic, (i + pmic->irq_addr));
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pending &= HISI_MASK_FIELD;
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if (pending != 0)
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pr_debug("pending[%d]=0x%lx\n\r", i, pending);
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hi6421_spmi_pmic_write(pmic, (i + pmic->irq_addr.start_addr),
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pending);
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hi6421_spmi_pmic_write(pmic, (i + pmic->irq_addr), pending);
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/* solve powerkey order */
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if ((i == HISI_IRQ_KEY_NUM) && ((pending & HISI_IRQ_KEY_VALUE) == HISI_IRQ_KEY_VALUE)) {
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if ((i == HISI_IRQ_KEY_NUM) &&
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((pending & HISI_IRQ_KEY_VALUE) == HISI_IRQ_KEY_VALUE)) {
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generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_DOWN]);
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generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_UP]);
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pending &= (~HISI_IRQ_KEY_VALUE);
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@ -155,7 +153,7 @@ static void hi6421_spmi_irq_mask(struct irq_data *d)
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unsigned long flags;
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offset = (irqd_to_hwirq(d) >> 3);
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offset += pmic->irq_mask_addr.start_addr;
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offset += pmic->irq_mask_addr;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, offset);
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@ -171,7 +169,7 @@ static void hi6421_spmi_irq_unmask(struct irq_data *d)
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unsigned long flags;
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offset = (irqd_to_hwirq(d) >> 3);
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offset += pmic->irq_mask_addr.start_addr;
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offset += pmic->irq_mask_addr;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, offset);
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@ -211,36 +209,32 @@ static int get_pmic_device_tree_data(struct device_node *np,
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{
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int ret = 0;
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/*get pmic irq num*/
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ret = of_property_read_u32_array(np, "irq-num",
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&pmic->irqnum, 1);
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/* IRQ number */
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ret = of_property_read_u32(np, "irq-num", &pmic->irqnum);
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if (ret) {
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pr_err("no irq-num property set\n");
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ret = -ENODEV;
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return ret;
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}
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/*get pmic irq array number*/
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ret = of_property_read_u32_array(np, "irq-array",
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&pmic->irqarray, 1);
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/* Size of IRQ array */
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ret = of_property_read_u32(np, "irq-array", &pmic->irqarray);
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if (ret) {
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pr_err("no irq-array property set\n");
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ret = -ENODEV;
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return ret;
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}
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/*SOC_PMIC_IRQ_MASK_0_ADDR*/
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ret = of_property_read_u32_array(np, "irq-mask-addr",
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(int *)&pmic->irq_mask_addr, 2);
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/* SOC_PMIC_IRQ_MASK_0_ADDR */
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ret = of_property_read_u32(np, "irq-mask-addr", &pmic->irq_mask_addr);
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if (ret) {
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pr_err("no irq-mask-addr property set\n");
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ret = -ENODEV;
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return ret;
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}
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/*SOC_PMIC_IRQ0_ADDR*/
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ret = of_property_read_u32_array(np, "irq-addr",
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(int *)&pmic->irq_addr, 2);
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/* SOC_PMIC_IRQ0_ADDR */
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ret = of_property_read_u32(np, "irq-addr", &pmic->irq_addr);
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if (ret) {
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pr_err("no irq-addr property set\n");
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ret = -ENODEV;
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@ -252,18 +246,18 @@ static int get_pmic_device_tree_data(struct device_node *np,
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static void hi6421_spmi_pmic_irq_prc(struct hi6421_spmi_pmic *pmic)
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{
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int i;
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int i, pending;
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for (i = 0 ; i < pmic->irq_mask_addr.array; i++)
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hi6421_spmi_pmic_write(pmic, pmic->irq_mask_addr.start_addr + i,
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for (i = 0 ; i < pmic->irqarray; i++)
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hi6421_spmi_pmic_write(pmic, pmic->irq_mask_addr + i,
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HISI_MASK_STATE);
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for (i = 0 ; i < pmic->irq_addr.array; i++) {
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unsigned int pending = hi6421_spmi_pmic_read(pmic, pmic->irq_addr.start_addr + i);
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for (i = 0 ; i < pmic->irqarray; i++) {
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pending = hi6421_spmi_pmic_read(pmic, pmic->irq_addr + i);
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pr_debug("PMU IRQ address value:irq[0x%x] = 0x%x\n",
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pmic->irq_addr.start_addr + i, pending);
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hi6421_spmi_pmic_write(pmic, pmic->irq_addr.start_addr + i,
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pmic->irq_addr + i, pending);
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hi6421_spmi_pmic_write(pmic, pmic->irq_addr + i,
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HISI_MASK_STATE);
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}
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}
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@ -272,36 +266,32 @@ static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct hi6421_spmi_pmic *pmic = NULL;
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enum of_gpio_flags flags;
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int ret = 0;
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int i;
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struct hi6421_spmi_pmic *pmic;
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unsigned int virq;
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int ret, i;
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pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
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if (!pmic)
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return -ENOMEM;
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/*TODO: get pmic dts info*/
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ret = get_pmic_device_tree_data(np, pmic);
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if (ret) {
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dev_err(&pdev->dev, "Error reading hisi pmic dts\n");
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dev_err(dev, "Error reading hisi pmic dts\n");
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return ret;
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}
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/* TODO: get and enable clk request */
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spin_lock_init(&pmic->lock);
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pmic->dev = dev;
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pmic->gpio = of_get_gpio_flags(np, 0, &flags);
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pmic->gpio = of_get_gpio(np, 0);
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if (pmic->gpio < 0)
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return pmic->gpio;
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if (!gpio_is_valid(pmic->gpio))
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return -EINVAL;
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ret = gpio_request_one(pmic->gpio, GPIOF_IN, "pmic");
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ret = devm_gpio_request_one(dev, pmic->gpio, GPIOF_IN, "pmic");
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if (ret < 0) {
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dev_err(dev, "failed to request gpio%d\n", pmic->gpio);
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return ret;
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@ -309,7 +299,6 @@ static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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pmic->irq = gpio_to_irq(pmic->gpio);
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/* mask && clear IRQ status */
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hi6421_spmi_pmic_irq_prc(pmic);
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pmic->irqs = devm_kzalloc(dev, pmic->irqnum * sizeof(int), GFP_KERNEL);
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@ -321,27 +310,27 @@ static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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if (!pmic->domain) {
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dev_err(dev, "failed irq domain add simple!\n");
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ret = -ENODEV;
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goto irq_domain;
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goto irq_malloc;
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}
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for (i = 0; i < pmic->irqnum; i++) {
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virq = irq_create_mapping(pmic->domain, i);
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if (virq == NO_IRQ) {
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pr_debug("Failed mapping hwirq\n");
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if (!virq) {
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dev_err(dev, "Failed mapping hwirq\n");
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ret = -ENOSPC;
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goto irq_create_mapping;
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goto irq_malloc;
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}
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pmic->irqs[i] = virq;
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pr_info("[%s]. pmic->irqs[%d] = %d\n", __func__, i, pmic->irqs[i]);
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dev_dbg(dev, "%s: pmic->irqs[%d] = %d\n",
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__func__, i, pmic->irqs[i]);
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}
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ret = request_threaded_irq(pmic->irq, hi6421_spmi_irq_handler, NULL,
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IRQF_TRIGGER_LOW | IRQF_SHARED | IRQF_NO_SUSPEND,
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"pmic", pmic);
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if (ret < 0) {
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dev_err(dev, "could not claim pmic %d\n", ret);
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ret = -ENODEV;
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goto request_theaded_irq;
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dev_err(dev, "could not claim pmic IRQ: error %d\n", ret);
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goto irq_malloc;
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}
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dev_set_drvdata(&pdev->dev, pmic);
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@ -355,18 +344,14 @@ static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
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hi6421v600_devs, ARRAY_SIZE(hi6421v600_devs),
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NULL, 0, NULL);
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if (ret) {
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dev_err(&pdev->dev, "Failed to add child devices: %d\n", ret);
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return ret;
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}
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if (!ret)
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return 0;
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return 0;
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dev_err(dev, "Failed to add child devices: %d\n", ret);
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request_theaded_irq:
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irq_create_mapping:
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irq_domain:
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irq_malloc:
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gpio_free(pmic->gpio);
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free_irq(pmic->irq, pmic);
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return ret;
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}
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@ -375,8 +360,6 @@ static void hi6421_spmi_pmic_remove(struct spmi_device *pdev)
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struct hi6421_spmi_pmic *pmic = dev_get_drvdata(&pdev->dev);
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free_irq(pmic->irq, pmic);
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gpio_free(pmic->gpio);
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devm_kfree(&pdev->dev, pmic);
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}
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static const struct of_device_id pmic_spmi_id_table[] = {
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@ -36,15 +36,17 @@ struct hi6421_spmi_pmic {
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int irq;
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int gpio;
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unsigned int *irqs;
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int irqnum;
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int irqarray;
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struct hi6421_spmi_irq_mask_info irq_mask_addr;
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struct hi6421_spmi_irq_info irq_addr;
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int irq_mask_addr;
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int irq_addr;
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};
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u32 hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg);
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void hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val);
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void hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg, u32 mask, u32 bits);
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int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg);
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int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val);
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int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
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u32 mask, u32 bits);
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enum hi6421_spmi_pmic_irq_list {
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OTMP = 0,
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