[media] drxd: Run lindent across sources

Take a first cleanup pass over the sources to bring them closer to the
Linux coding style.

Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Devin Heitmueller 2011-03-24 13:44:01 -03:00 committed by Mauro Carvalho Chehab
parent 9b316d6b42
commit 6cacdd46e2
5 changed files with 1753 additions and 3609 deletions

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@ -27,8 +27,7 @@
#include <linux/types.h> #include <linux/types.h>
#include <linux/i2c.h> #include <linux/i2c.h>
struct drxd_config struct drxd_config {
{
u8 index; u8 index;
u8 pll_address; u8 pll_address;
@ -49,9 +48,9 @@ struct drxd_config
u8 disable_i2c_gate_ctrl; u8 disable_i2c_gate_ctrl;
u32 IF; u32 IF;
int (*pll_set) (void *priv, void *priv_params, int (*pll_set) (void *priv, void *priv_params,
u8 pll_addr, u8 demoda_addr, s32 *off); u8 pll_addr, u8 demoda_addr, s32 * off);
s16 (*osc_deviation) (void *priv, s16 dev, int flag); s16(*osc_deviation) (void *priv, s16 dev, int flag);
}; };
extern extern

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@ -40,7 +40,7 @@ typedef unsigned long u32_t;
#define HI_I2C_DELAY 84 #define HI_I2C_DELAY 84
#define HI_I2C_BRIDGE_DELAY 750 #define HI_I2C_BRIDGE_DELAY 750
#define EQ_TD_TPS_PWR_UNKNOWN 0x00C0 /* Unknown configurations */ #define EQ_TD_TPS_PWR_UNKNOWN 0x00C0 /* Unknown configurations */
#define EQ_TD_TPS_PWR_QPSK 0x016a #define EQ_TD_TPS_PWR_QPSK 0x016a
#define EQ_TD_TPS_PWR_QAM16_ALPHAN 0x0195 #define EQ_TD_TPS_PWR_QAM16_ALPHAN 0x0195
#define EQ_TD_TPS_PWR_QAM16_ALPHA1 0x0195 #define EQ_TD_TPS_PWR_QAM16_ALPHA1 0x0195
@ -65,7 +65,6 @@ typedef unsigned long u32_t;
#define DRXD_SCAN_TIMEOUT (650) #define DRXD_SCAN_TIMEOUT (650)
#define DRXD_BANDWIDTH_8MHZ_IN_HZ (0x8B8249L) #define DRXD_BANDWIDTH_8MHZ_IN_HZ (0x8B8249L)
#define DRXD_BANDWIDTH_7MHZ_IN_HZ (0x7A1200L) #define DRXD_BANDWIDTH_7MHZ_IN_HZ (0x7A1200L)
#define DRXD_BANDWIDTH_6MHZ_IN_HZ (0x68A1B6L) #define DRXD_BANDWIDTH_6MHZ_IN_HZ (0x68A1B6L)
@ -78,7 +77,6 @@ typedef unsigned long u32_t;
#define DIFF_TARGET (4) #define DIFF_TARGET (4)
#define DIFF_MARGIN (1) #define DIFF_MARGIN (1)
extern u8_t DRXD_InitAtomicRead[]; extern u8_t DRXD_InitAtomicRead[];
extern u8_t DRXD_HiI2cPatch_1[]; extern u8_t DRXD_HiI2cPatch_1[];
extern u8_t DRXD_HiI2cPatch_3[]; extern u8_t DRXD_HiI2cPatch_3[];
@ -95,7 +93,7 @@ extern u8_t DRXD_InitECA2[];
extern u8_t DRXD_ResetECA2[]; extern u8_t DRXD_ResetECA2[];
extern u8_t DRXD_ResetECRAM[]; extern u8_t DRXD_ResetECRAM[];
extern u8_t DRXD_A2_microcode[]; extern u8_t DRXD_A2_microcode[];
extern u32_t DRXD_A2_microcode_length; extern u32_t DRXD_A2_microcode_length;
extern u8_t DRXD_InitFEB1_1[]; extern u8_t DRXD_InitFEB1_1[];
@ -114,7 +112,7 @@ extern u8_t DRXD_StartDiversityEnd[];
extern u8_t DRXD_DiversityDelay8MHZ[]; extern u8_t DRXD_DiversityDelay8MHZ[];
extern u8_t DRXD_DiversityDelay6MHZ[]; extern u8_t DRXD_DiversityDelay6MHZ[];
extern u8_t DRXD_B1_microcode[]; extern u8_t DRXD_B1_microcode[];
extern u32_t DRXD_B1_microcode_length; extern u32_t DRXD_B1_microcode_length;
#endif #endif

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