mirror of https://gitee.com/openkylin/linux.git
tty: serial: uartlite: Support uartlite on big and little endian systems
Use big and little endian accessors function to reflect system configuration. Detection is done via control register in ulite_request_port. Tested on Microblaze LE, BE, PPC440 and Arm zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Michal Simek
Greg Kroah-Hartman
parent
3240b48d49
commit
6d53c3b71d
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@ -57,6 +57,54 @@
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#define ULITE_CONTROL_RST_RX 0x02
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#define ULITE_CONTROL_IE 0x10
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struct uartlite_reg_ops {
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u32 (*in)(void __iomem *addr);
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void (*out)(u32 val, void __iomem *addr);
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};
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static u32 uartlite_inbe32(void __iomem *addr)
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{
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return ioread32be(addr);
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}
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static void uartlite_outbe32(u32 val, void __iomem *addr)
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{
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iowrite32be(val, addr);
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}
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static struct uartlite_reg_ops uartlite_be = {
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.in = uartlite_inbe32,
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.out = uartlite_outbe32,
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};
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static u32 uartlite_inle32(void __iomem *addr)
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{
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return ioread32(addr);
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}
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static void uartlite_outle32(u32 val, void __iomem *addr)
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{
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iowrite32(val, addr);
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}
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static struct uartlite_reg_ops uartlite_le = {
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.in = uartlite_inle32,
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.out = uartlite_outle32,
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};
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static inline u32 uart_in32(u32 offset, struct uart_port *port)
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{
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struct uartlite_reg_ops *reg_ops = port->private_data;
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return reg_ops->in(port->membase + offset);
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}
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static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
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{
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struct uartlite_reg_ops *reg_ops = port->private_data;
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reg_ops->out(val, port->membase + offset);
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}
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static struct uart_port ulite_ports[ULITE_NR_UARTS];
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@ -77,7 +125,7 @@ static int ulite_receive(struct uart_port *port, int stat)
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/* stats */
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if (stat & ULITE_STATUS_RXVALID) {
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port->icount.rx++;
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ch = ioread32be(port->membase + ULITE_RX);
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ch = uart_in32(ULITE_RX, port);
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if (stat & ULITE_STATUS_PARITY)
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port->icount.parity++;
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@ -122,7 +170,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
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return 0;
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if (port->x_char) {
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iowrite32be(port->x_char, port->membase + ULITE_TX);
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uart_out32(port->x_char, ULITE_TX, port);
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port->x_char = 0;
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port->icount.tx++;
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return 1;
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@ -131,7 +179,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
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if (uart_circ_empty(xmit) || uart_tx_stopped(port))
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return 0;
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iowrite32be(xmit->buf[xmit->tail], port->membase + ULITE_TX);
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uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
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port->icount.tx++;
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@ -148,7 +196,7 @@ static irqreturn_t ulite_isr(int irq, void *dev_id)
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int busy, n = 0;
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do {
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int stat = ioread32be(port->membase + ULITE_STATUS);
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int stat = uart_in32(ULITE_STATUS, port);
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busy = ulite_receive(port, stat);
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busy |= ulite_transmit(port, stat);
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n++;
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@ -169,7 +217,7 @@ static unsigned int ulite_tx_empty(struct uart_port *port)
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unsigned int ret;
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spin_lock_irqsave(&port->lock, flags);
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ret = ioread32be(port->membase + ULITE_STATUS);
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ret = uart_in32(ULITE_STATUS, port);
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spin_unlock_irqrestore(&port->lock, flags);
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return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
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@ -192,7 +240,7 @@ static void ulite_stop_tx(struct uart_port *port)
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static void ulite_start_tx(struct uart_port *port)
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{
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ulite_transmit(port, ioread32be(port->membase + ULITE_STATUS));
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ulite_transmit(port, uart_in32(ULITE_STATUS, port));
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}
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static void ulite_stop_rx(struct uart_port *port)
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@ -220,17 +268,17 @@ static int ulite_startup(struct uart_port *port)
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if (ret)
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return ret;
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iowrite32be(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
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port->membase + ULITE_CONTROL);
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iowrite32be(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
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uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
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ULITE_CONTROL, port);
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uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
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return 0;
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}
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static void ulite_shutdown(struct uart_port *port)
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{
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iowrite32be(0, port->membase + ULITE_CONTROL);
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ioread32be(port->membase + ULITE_CONTROL); /* dummy */
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uart_out32(0, ULITE_CONTROL, port);
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uart_in32(ULITE_CONTROL, port); /* dummy */
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free_irq(port->irq, port);
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}
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@ -281,6 +329,8 @@ static void ulite_release_port(struct uart_port *port)
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static int ulite_request_port(struct uart_port *port)
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{
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int ret;
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pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
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port, (unsigned long long) port->mapbase);
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@ -296,6 +346,14 @@ static int ulite_request_port(struct uart_port *port)
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return -EBUSY;
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}
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port->private_data = &uartlite_be;
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ret = uart_in32(ULITE_CONTROL, port);
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uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
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ret = uart_in32(ULITE_STATUS, port);
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/* Endianess detection */
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if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
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port->private_data = &uartlite_le;
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return 0;
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}
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@ -314,20 +372,19 @@ static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
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#ifdef CONFIG_CONSOLE_POLL
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static int ulite_get_poll_char(struct uart_port *port)
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{
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if (!(ioread32be(port->membase + ULITE_STATUS)
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& ULITE_STATUS_RXVALID))
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if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
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return NO_POLL_CHAR;
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return ioread32be(port->membase + ULITE_RX);
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return uart_in32(ULITE_RX, port);
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}
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static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
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{
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while (ioread32be(port->membase + ULITE_STATUS) & ULITE_STATUS_TXFULL)
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while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
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cpu_relax();
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/* write char to device */
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iowrite32be(ch, port->membase + ULITE_TX);
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uart_out32(ch, ULITE_TX, port);
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}
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#endif
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@ -366,7 +423,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
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/* Spin waiting for TX fifo to have space available */
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for (i = 0; i < 100000; i++) {
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val = ioread32be(port->membase + ULITE_STATUS);
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val = uart_in32(ULITE_STATUS, port);
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if ((val & ULITE_STATUS_TXFULL) == 0)
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break;
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cpu_relax();
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@ -376,7 +433,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
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static void ulite_console_putchar(struct uart_port *port, int ch)
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{
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ulite_console_wait_tx(port);
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iowrite32be(ch, port->membase + ULITE_TX);
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uart_out32(ch, ULITE_TX, port);
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}
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static void ulite_console_write(struct console *co, const char *s,
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@ -393,8 +450,8 @@ static void ulite_console_write(struct console *co, const char *s,
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spin_lock_irqsave(&port->lock, flags);
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/* save and disable interrupt */
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ier = ioread32be(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
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iowrite32be(0, port->membase + ULITE_CONTROL);
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ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
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uart_out32(0, ULITE_CONTROL, port);
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uart_console_write(port, s, count, ulite_console_putchar);
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@ -402,7 +459,7 @@ static void ulite_console_write(struct console *co, const char *s,
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/* restore interrupt state */
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if (ier)
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iowrite32be(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
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uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
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if (locked)
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spin_unlock_irqrestore(&port->lock, flags);
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