mirror of https://gitee.com/openkylin/linux.git
mwifiex: add support for 8997 chipset
This patch adds support for 8997 chipset to mwifiex with SDIO/PCIe/USB interface. The corresponding firmware image files are located in: "mrvl/sd8997_uapsta.bin" "mrvl/pcie8997_uapsta.bin" "mrvl/usb8997_uapsta.bin" Signed-off-by: Zhaoyang Liu <liuzy@marvell.com> Signed-off-by: Cathy Luo <cluo@marvell.com> Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
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3b1f0e8695
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6d85ef00d9
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@ -9,36 +9,36 @@ config MWIFIEX
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mwifiex.
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config MWIFIEX_SDIO
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tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797/SD8887/SD8897"
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tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797/SD8887/SD8897/SD8997"
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depends on MWIFIEX && MMC
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select FW_LOADER
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select WANT_DEV_COREDUMP
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---help---
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This adds support for wireless adapters based on Marvell
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8786/8787/8797/8887/8897 chipsets with SDIO interface.
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8786/8787/8797/8887/8897/8997 chipsets with SDIO interface.
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If you choose to build it as a module, it will be called
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mwifiex_sdio.
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config MWIFIEX_PCIE
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tristate "Marvell WiFi-Ex Driver for PCIE 8766/8897"
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tristate "Marvell WiFi-Ex Driver for PCIE 8766/8897/8997"
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depends on MWIFIEX && PCI
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select FW_LOADER
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select WANT_DEV_COREDUMP
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---help---
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This adds support for wireless adapters based on Marvell
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8766/8897 chipsets with PCIe interface.
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8766/8897/8997 chipsets with PCIe interface.
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If you choose to build it as a module, it will be called
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mwifiex_pcie.
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config MWIFIEX_USB
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tristate "Marvell WiFi-Ex Driver for USB8766/8797/8897"
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tristate "Marvell WiFi-Ex Driver for USB8766/8797/8897/8997"
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depends on MWIFIEX && USB
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select FW_LOADER
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---help---
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This adds support for wireless adapters based on Marvell
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8797/8897 chipset with USB interface.
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8797/8897/8997 chipset with USB interface.
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If you choose to build it as a module, it will be called
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mwifiex_usb.
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@ -266,12 +266,17 @@ static const struct pci_device_id mwifiex_ids[] = {
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{
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PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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.driver_data = (unsigned long) &mwifiex_pcie8766,
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.driver_data = (unsigned long)&mwifiex_pcie8766,
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},
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{
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PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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.driver_data = (unsigned long) &mwifiex_pcie8897,
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.driver_data = (unsigned long)&mwifiex_pcie8897,
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},
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{
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PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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.driver_data = (unsigned long)&mwifiex_pcie8997,
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},
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{},
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};
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@ -1082,6 +1087,7 @@ static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
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card->txbd_rdptr++;
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break;
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case PCIE_DEVICE_ID_MARVELL_88W8897:
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case PCIE_DEVICE_ID_MARVELL_88W8997:
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card->txbd_rdptr += reg->ring_tx_start_ptr;
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break;
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}
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@ -1179,6 +1185,7 @@ mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
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card->txbd_wrptr++;
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break;
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case PCIE_DEVICE_ID_MARVELL_88W8897:
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case PCIE_DEVICE_ID_MARVELL_88W8997:
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card->txbd_wrptr += reg->ring_tx_start_ptr;
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break;
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}
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@ -2733,3 +2740,4 @@ MODULE_VERSION(PCIE_VERSION);
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MODULE_LICENSE("GPL v2");
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MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(PCIE8997_DEFAULT_FW_NAME);
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@ -30,10 +30,12 @@
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#define PCIE8766_DEFAULT_FW_NAME "mrvl/pcie8766_uapsta.bin"
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#define PCIE8897_DEFAULT_FW_NAME "mrvl/pcie8897_uapsta.bin"
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#define PCIE8997_DEFAULT_FW_NAME "mrvl/pcie8997_uapsta.bin"
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#define PCIE_VENDOR_ID_MARVELL (0x11ab)
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#define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30)
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#define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38)
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#define PCIE_DEVICE_ID_MARVELL_88W8997 (0x2b42)
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/* Constants for Buffer Descriptor (BD) rings */
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#define MWIFIEX_MAX_TXRX_BD 0x20
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@ -197,7 +199,38 @@ static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = {
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.sleep_cookie = 0,
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.fw_dump_ctrl = 0xcf4,
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.fw_dump_start = 0xcf8,
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.fw_dump_end = 0xcff
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.fw_dump_end = 0xcff,
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};
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static const struct mwifiex_pcie_card_reg mwifiex_reg_8997 = {
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.cmd_addr_lo = PCIE_SCRATCH_0_REG,
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.cmd_addr_hi = PCIE_SCRATCH_1_REG,
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.cmd_size = PCIE_SCRATCH_2_REG,
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.fw_status = PCIE_SCRATCH_3_REG,
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.cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
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.cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
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.tx_rdptr = 0xC1A4,
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.tx_wrptr = 0xC1A8,
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.rx_rdptr = 0xC1A8,
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.rx_wrptr = 0xC1A4,
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.evt_rdptr = PCIE_SCRATCH_10_REG,
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.evt_wrptr = PCIE_SCRATCH_11_REG,
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.drv_rdy = PCIE_SCRATCH_12_REG,
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.tx_start_ptr = 16,
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.tx_mask = 0x0FFF0000,
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.tx_wrap_mask = 0x01FF0000,
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.rx_mask = 0x00000FFF,
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.rx_wrap_mask = 0x000001FF,
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.tx_rollover_ind = BIT(28),
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.rx_rollover_ind = BIT(12),
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.evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
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.ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
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.ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
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.ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
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.ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
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.ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
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.pfu_enabled = 1,
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.sleep_cookie = 0,
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};
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struct mwifiex_pcie_device {
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@ -227,6 +260,15 @@ static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
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.can_ext_scan = true,
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};
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static const struct mwifiex_pcie_device mwifiex_pcie8997 = {
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.firmware = PCIE8997_DEFAULT_FW_NAME,
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.reg = &mwifiex_reg_8997,
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.blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
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.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
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.can_dump_fw = false,
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.can_ext_scan = true,
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};
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struct mwifiex_evt_buf_desc {
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u64 paddr;
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u16 len;
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@ -325,6 +367,7 @@ mwifiex_pcie_txbd_not_full(struct pcie_service_card *card)
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return 1;
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break;
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case PCIE_DEVICE_ID_MARVELL_88W8897:
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case PCIE_DEVICE_ID_MARVELL_88W8997:
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if (((card->txbd_wrptr & reg->tx_mask) !=
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(card->txbd_rdptr & reg->tx_mask)) ||
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((card->txbd_wrptr & reg->tx_rollover_ind) ==
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@ -288,6 +288,8 @@ static int mwifiex_sdio_suspend(struct device *dev)
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#define SDIO_DEVICE_ID_MARVELL_8887 (0x9135)
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/* Device ID for SD8801 */
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#define SDIO_DEVICE_ID_MARVELL_8801 (0x9139)
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/* Device ID for SD8997 */
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#define SDIO_DEVICE_ID_MARVELL_8997 (0x9141)
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/* WLAN IDs */
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@ -304,6 +306,8 @@ static const struct sdio_device_id mwifiex_ids[] = {
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.driver_data = (unsigned long)&mwifiex_sdio_sd8887},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801),
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.driver_data = (unsigned long)&mwifiex_sdio_sd8801},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997),
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.driver_data = (unsigned long)&mwifiex_sdio_sd8997},
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{},
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};
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@ -2531,3 +2535,4 @@ MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME);
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@ -35,6 +35,7 @@
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#define SD8897_DEFAULT_FW_NAME "mrvl/sd8897_uapsta.bin"
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#define SD8887_DEFAULT_FW_NAME "mrvl/sd8887_uapsta.bin"
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#define SD8801_DEFAULT_FW_NAME "mrvl/sd8801_uapsta.bin"
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#define SD8997_DEFAULT_FW_NAME "mrvl/sd8997_uapsta.bin"
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#define BLOCK_MODE 1
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#define BYTE_MODE 0
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@ -364,6 +365,55 @@ static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
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0x59, 0x5c, 0x5d},
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};
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static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = {
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.start_rd_port = 0,
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.start_wr_port = 0,
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.base_0_reg = 0xF8,
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.base_1_reg = 0xF9,
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.poll_reg = 0x5C,
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.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
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CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
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.host_int_rsr_reg = 0x4,
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.host_int_status_reg = 0x0C,
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.host_int_mask_reg = 0x08,
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.status_reg_0 = 0xE8,
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.status_reg_1 = 0xE9,
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.sdio_int_mask = 0xff,
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.data_port_mask = 0xffffffff,
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.io_port_0_reg = 0xE4,
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.io_port_1_reg = 0xE5,
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.io_port_2_reg = 0xE6,
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.max_mp_regs = 196,
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.rd_bitmap_l = 0x10,
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.rd_bitmap_u = 0x11,
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.rd_bitmap_1l = 0x12,
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.rd_bitmap_1u = 0x13,
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.wr_bitmap_l = 0x14,
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.wr_bitmap_u = 0x15,
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.wr_bitmap_1l = 0x16,
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.wr_bitmap_1u = 0x17,
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.rd_len_p0_l = 0x18,
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.rd_len_p0_u = 0x19,
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.card_misc_cfg_reg = 0xd8,
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.card_cfg_2_1_reg = 0xd9,
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.cmd_rd_len_0 = 0xc0,
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.cmd_rd_len_1 = 0xc1,
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.cmd_rd_len_2 = 0xc2,
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.cmd_rd_len_3 = 0xc3,
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.cmd_cfg_0 = 0xc4,
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.cmd_cfg_1 = 0xc5,
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.cmd_cfg_2 = 0xc6,
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.cmd_cfg_3 = 0xc7,
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.func1_dump_reg_start = 0x10,
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.func1_dump_reg_end = 0x17,
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.func1_scratch_reg = 0xe8,
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.func1_spec_reg_num = 13,
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.func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
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0x60, 0x61, 0x62, 0x64,
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0x65, 0x66, 0x68, 0x69,
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0x6a},
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};
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static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = {
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.start_rd_port = 0,
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.start_wr_port = 0,
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.can_ext_scan = true,
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};
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static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = {
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.firmware = SD8997_DEFAULT_FW_NAME,
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.reg = &mwifiex_reg_sd8997,
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.max_ports = 32,
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.mp_agg_pkt_limit = 16,
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.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
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.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
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.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
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.supports_sdio_new_mode = true,
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.has_control_mask = false,
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.can_dump_fw = false,
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.can_auto_tdls = false,
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.can_ext_scan = true,
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};
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static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
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.firmware = SD8887_DEFAULT_FW_NAME,
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.reg = &mwifiex_reg_sd8887,
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@ -47,6 +47,11 @@ static struct usb_device_id mwifiex_usb_table[] = {
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{USB_DEVICE_AND_INTERFACE_INFO(USB8XXX_VID, USB8897_PID_2,
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USB_CLASS_VENDOR_SPEC,
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USB_SUBCLASS_VENDOR_SPEC, 0xff)},
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/* 8997 */
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{USB_DEVICE(USB8XXX_VID, USB8997_PID_1)},
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{USB_DEVICE_AND_INTERFACE_INFO(USB8XXX_VID, USB8997_PID_2,
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USB_CLASS_VENDOR_SPEC,
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USB_SUBCLASS_VENDOR_SPEC, 0xff)},
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{ } /* Terminating entry */
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};
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@ -382,12 +387,14 @@ static int mwifiex_usb_probe(struct usb_interface *intf,
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case USB8797_PID_1:
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case USB8801_PID_1:
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case USB8897_PID_1:
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case USB8997_PID_1:
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card->usb_boot_state = USB8XXX_FW_DNLD;
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break;
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case USB8766_PID_2:
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case USB8797_PID_2:
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case USB8801_PID_2:
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case USB8897_PID_2:
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case USB8997_PID_2:
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card->usb_boot_state = USB8XXX_FW_READY;
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break;
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default:
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@ -814,6 +821,12 @@ static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
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adapter->dev = &card->udev->dev;
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switch (le16_to_cpu(card->udev->descriptor.idProduct)) {
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case USB8997_PID_1:
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case USB8997_PID_2:
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adapter->tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
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strcpy(adapter->fw_name, USB8997_DEFAULT_FW_NAME);
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adapter->ext_scan = true;
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break;
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case USB8897_PID_1:
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case USB8897_PID_2:
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adapter->tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
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@ -1123,3 +1136,4 @@ MODULE_FIRMWARE(USB8766_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(USB8797_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(USB8801_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(USB8897_DEFAULT_FW_NAME);
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MODULE_FIRMWARE(USB8997_DEFAULT_FW_NAME);
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@ -32,6 +32,8 @@
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#define USB8897_PID_2 0x2046
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#define USB8801_PID_1 0x2049
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#define USB8801_PID_2 0x204a
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#define USB8997_PID_1 0x204d
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#define USB8997_PID_2 0x204e
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#define USB8XXX_FW_DNLD 1
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#define USB8797_DEFAULT_FW_NAME "mrvl/usb8797_uapsta.bin"
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#define USB8801_DEFAULT_FW_NAME "mrvl/usb8801_uapsta.bin"
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#define USB8897_DEFAULT_FW_NAME "mrvl/usb8897_uapsta.bin"
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#define USB8997_DEFAULT_FW_NAME "mrvl/usb8997_uapsta.bin"
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#define FW_DNLD_TX_BUF_SIZE 620
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#define FW_DNLD_RX_BUF_SIZE 2048
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